Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/131614/?format=api
{ "id": 131614, "url": "http://patchwork.dpdk.org/api/patches/131614/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230919095440.45445-25-chaoyong.he@corigine.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230919095440.45445-25-chaoyong.he@corigine.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230919095440.45445-25-chaoyong.he@corigine.com", "date": "2023-09-19T09:54:38", "name": "[v5,24/26] net/nfp: refact the PCIe module", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "1e22d98e39ad3dc9e9b08224e2a19cd3c56637a3", "submitter": { "id": 2554, "url": "http://patchwork.dpdk.org/api/people/2554/?format=api", "name": "Chaoyong He", "email": "chaoyong.he@corigine.com" }, "delegate": { "id": 319, "url": "http://patchwork.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230919095440.45445-25-chaoyong.he@corigine.com/mbox/", "series": [ { "id": 29547, "url": "http://patchwork.dpdk.org/api/series/29547/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=29547", "date": "2023-09-19T09:54:14", "name": "refact the nfpcore module", "version": 5, "mbox": "http://patchwork.dpdk.org/series/29547/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/131614/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/131614/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 2558042600;\n\tTue, 19 Sep 2023 11:58:09 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id D40C6427E4;\n\tTue, 19 Sep 2023 11:56:11 +0200 (CEST)", "from NAM12-DM6-obe.outbound.protection.outlook.com\n (mail-dm6nam12on2113.outbound.protection.outlook.com [40.107.243.113])\n by mails.dpdk.org (Postfix) with ESMTP id 4B45B41104\n for <dev@dpdk.org>; Tue, 19 Sep 2023 11:56:10 +0200 (CEST)", "from SJ0PR13MB5545.namprd13.prod.outlook.com (2603:10b6:a03:424::5)\n by MW5PR13MB5877.namprd13.prod.outlook.com (2603:10b6:303:1c7::18)\n with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6792.28; Tue, 19 Sep\n 2023 09:55:58 +0000", "from SJ0PR13MB5545.namprd13.prod.outlook.com\n ([fe80::7a1c:2887:348a:84bd]) by SJ0PR13MB5545.namprd13.prod.outlook.com\n ([fe80::7a1c:2887:348a:84bd%6]) with mapi id 15.20.6792.026; Tue, 19 Sep 2023\n 09:55:58 +0000" ], "ARC-Seal": "i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none;\n b=Rp+Lqb06j3shevX6/ZbUlV+ypONdxKq3YRVkUVM52j3A63TM2g0iWQ8m3j7XcBd3yVfRqCZh74J+wJDa+i/xIubNtSOPkJWup2zX99GfW7NU0AYBWcMmnERa+dt06RVhVMb9OplIcUzm8Ih8Yd+MIk1vAY+Uug+h0qFU+YF5zO8e5sd/4Qsb89ECcxkmAzh1syX0NG+suj4w/8k06M/AXJ5BCMmgOmQfaLspI0kZTqbbH2JwSenh7DtOywSJ1/vpDc1rABjsRPGkfUCK5bgr2hZNxbYMoNWlnaLNhIIXwG1YdMgH/L+YSmtfnPfjboiIINyMbqCenCRBrSHNDAhMWQ==", "ARC-Message-Signature": "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector9901;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;\n bh=z1W8RGbvRphu6ol/4bDEOO2oovSXr9ZXDjLoLcMR5qs=;\n b=d5MO5vv2bYbf1+ONVBlsbV2BI3mtoV8F3pzatybcx3PKo0H7XlM7KZXlz2TXRemXgQdCwN4XSnN4CPspKEXBXRuGRrW2hydQggmyWX9bwjjj9ziD4ZPL6EqeCRzeemj6EQzkWSe4qzLYwStt+txibO4/nbQf+ydHIhSViNVRHXm03b49uT95D7StOlN9aYLrRi9cj9WRc4XU+4jkCV1hnDdPy8+gcSMZ/cOKgG4xCXj41K7HwcEJz+blkZgE8wu2+1raljNK4fzmMQ8DyGZgiSy3An7PV9WFFb1W+Xn2+Sh3kcz19U9p4j7GrB7cLa4lM4ub8sxHVpuKYZpVJGCB1g==", "ARC-Authentication-Results": "i=1; mx.microsoft.com 1; spf=pass\n smtp.mailfrom=corigine.com; dmarc=pass action=none header.from=corigine.com;\n dkim=pass header.d=corigine.com; arc=none", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=corigine.onmicrosoft.com; s=selector2-corigine-onmicrosoft-com;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=z1W8RGbvRphu6ol/4bDEOO2oovSXr9ZXDjLoLcMR5qs=;\n b=ieCTwiI8lthUUbhF0oWQuQTK4vvNHNn49hti2iuGcDtwy1g3BuCw3JgfjtRlqqURlhZFkMsocE9fF/OjVP7cq5xnZQYmQFRuk82JIq5648riXsQo2khn2Q84mBomLgiNLY7AVDonpsZcWlqeMljYFciA69TH8Xwo09JsTLpVhGU=", "Authentication-Results": "dkim=none (message not signed)\n header.d=none;dmarc=none action=none header.from=corigine.com;", "From": "Chaoyong He <chaoyong.he@corigine.com>", "To": "dev@dpdk.org", "Cc": "oss-drivers@corigine.com,\n\tChaoyong He <chaoyong.he@corigine.com>", "Subject": "[PATCH v5 24/26] net/nfp: refact the PCIe module", "Date": "Tue, 19 Sep 2023 17:54:38 +0800", "Message-Id": "<20230919095440.45445-25-chaoyong.he@corigine.com>", "X-Mailer": "git-send-email 2.39.1", "In-Reply-To": "<20230919095440.45445-1-chaoyong.he@corigine.com>", "References": "<20230918024612.1600536-1-chaoyong.he@corigine.com>\n <20230919095440.45445-1-chaoyong.he@corigine.com>", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-ClientProxiedBy": "BY5PR04CA0014.namprd04.prod.outlook.com\n (2603:10b6:a03:1d0::24) To SJ0PR13MB5545.namprd13.prod.outlook.com\n (2603:10b6:a03:424::5)", "MIME-Version": "1.0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "SJ0PR13MB5545:EE_|MW5PR13MB5877:EE_", "X-MS-Office365-Filtering-Correlation-Id": "50535de3-8e29-46e3-d2e3-08dbb8f69f8e", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n GMycC13Y5jf2w4YnG4bIwDG1UqOODuMixiyhY65RPI0y5C2EqNEJYYIX9gTmmwRkznTdEhH8YYOHvBnVL+VpOrw8xdqiKbYHRYuWLRzYqq3HzdOeOy3WBooloO4ehThe/7mU4jJBynKlzjWm3sNUrXez5DUSWXoP3JH1cVOuKO7fI/ITlL1QLnZnQJh3+pzpoLYYou+Fo/7CaDTwP/zZoxeKDYysxtyYf/+84923AGJ0Q3KHEdZFd1k8eHngwCr+hfNCMxSdZ+NSKp0rTA64swCHTe5FBFTNF3yBii2y6HIZwI4lr8MhHY+P9+kGDa+uY9s3Q4r9oMpfV7uJ4lLMZmoFiUuDBRxBFceiFtdCFea/lJkpkx7HN/csUBCKUxy+HEpQHXudplWqesPqamZnOZV0bWafzh3+/3ZJjGG13IzJ76Q8tT9crbGV+h5mjCaXlI176tFEDG+Ui0IEt/cXmkaS4vQo/wblPoTCUmkfxsov0aBCZeyN/fPXfvUXkfGubTZ9ATpdV0KPL7uaZ2Ugfz9/SZUnaoh9qZrBe6mkboWEx1ILZZ0VFNAvlq7KIZG8Lsz4X4Vsun3tBWhYDxgvq7gInaeZxSwtSx6YJNOId5JyQ+55XIbaVQ4yUfEza2bCsivhyAHFevrGFJnq45bVJN2Am5/Ssa34W3wNQBumZa4=", "X-Forefront-Antispam-Report": "CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:;\n IPV:NLI; SFV:NSPM; H:SJ0PR13MB5545.namprd13.prod.outlook.com; PTR:; CAT:NONE;\n SFS:(13230031)(346002)(136003)(396003)(39840400004)(366004)(376002)(186009)(451199024)(1800799009)(6506007)(6486002)(6666004)(52116002)(86362001)(36756003)(38350700002)(38100700002)(2616005)(1076003)(107886003)(26005)(2906002)(6512007)(478600001)(83380400001)(8676002)(5660300002)(4326008)(41300700001)(8936002)(44832011)(66946007)(66556008)(66476007)(6916009)(316002);\n DIR:OUT; SFP:1102;", "X-MS-Exchange-AntiSpam-MessageData-ChunkCount": "1", "X-MS-Exchange-AntiSpam-MessageData-0": "\n 7P2OqXfDcBaFJ7vXnHLMdz99BS1IKseLGpQCbTJQDh3PhnthIjkEtCoqAORukhPFY5wSHtJ0qazPxUeR8WAcetDrIFw50Cw9YDVm05AhV0kvjldWDgtktz4HMw5lMgRK895P+BK22ac4xCDIzOuH5OMp1Ae0cR9LbF5zNvAwY54DFqPqt0y/ibiykUUlJt5sej3+Kx9K4Zx2zoMwUWgNL7wxD+0BegFfxVy1Voeopgi3QoRSsVg1hjEI+LhoBaHOOZKQb6lZOX+6mp/4G0NncpmlUYHayi8Ggrlvuv8pmiH+X1zilZ9L44B4xSJRAADFxIIZtuvLgkytPK6785PrE6K/j1vZdprURsO/0Lzp7rlc7vZ6xM04LfFgnwIda1lBVWrdjhIJ7jYEoriHdg+6HOB+AQlCUr422pwcQJrs7YRH0xgTXCPwVMwG0vR+P4x4ozBaToIqMqHpUzJS0lKqpSlo80O6wv038ER0Wj8PHnJSPZOCPfgJYrRO9Moxm7DfWsXr1mk2aJJyZkYKqFGxZDA7CzHANOAiVVIyYVDXepGl627Qt4LKidNsB24u6CMyqcbht8OyTZAR/ZoPdlHxrm35JeBnfbMJYnjL9JGsLMqljU36a3jNwhfYe4HOoWfL3bZHkc/u404dHaAxWAk9N8RReru5O2xSlTAMBu8l0SvFZnq3AMKFrfP4SAnTgPDTdMZ2hL4efZQj63r/0Zgbs5epdvfmxitGeSQzH6IBbAsUeH6nYT5Td9Hv6ZXr7AHKEcGDXu9kJk66HNL71OK53vPuWuk9Y3ZOrEIqicMi0OlirebDs4HpPjcIPryeFCbk7JdfnXiK/7AL8JYEGAeIOAmofLCBgsa61eBjqrzpMTJ+1p9kuCk/2gWkJMSA3e8awsRBX/IL4Rpjpp2M6tvALQXRRh8R6xjaEx328mgCIW4s0B6raqH3jE/Ok5PJCJ5UBPfwg4vmbVZooZrblaxjVKjHim9py0s+wr90RUW65ZLGSfI6JbikSrJ4lvtBS3ujrGqIcksSzxJgZV7De16Fp17hakTsT3rCyr4a/xxPBlQy0Z7G+RRPrGWhT/Kg9QQTjR9W9y0MF+iupilAFYjrgoRYKTlt4vGP1Hfz4w1vh+Ykl9K4AzwDQfHDkC4kkYeEEr4/pzm5iRlRsoyWSoYO+giIxQGDFhSh6reC0L6sS5TDtrpP/66x27X4yRj8ByPqzwETBAdbTJJxntCWf1nIaQlh+z4/qEUO0xge5D5ZmNJv2uYhZucZG4tZH4cjZ19NwBVMay9W7QOuVFY7C1s5sldojlAuuRHMgi3WCFicxh/LrDoa0vSqw1aad3r1YH1GQdQEQmbawmPBWen4IrMQ39XGa76cWC5WVIEJM46MZ4UgT8/9znSE/ik7aMT2npd5egA46/9XLkwWrC+j4rtLgI18ArYoes4MuPiaWh4RduSW1Xv47QLpbo8Q9sYmoROR5w/X5Y8OAIa36D8v7ufdImEmnBRSTUsxiQCjl7mLu0yCyFSkph9PFxAFfmpXGTy6F80FQ154kMKYhdIQez2Avv9Gao1NtLA4xW2dPcx69dvLOXFwg/VHn+1nwW6KrUjoirBzJ4jV7qoyCAquNWS1jQ==", "X-OriginatorOrg": "corigine.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 50535de3-8e29-46e3-d2e3-08dbb8f69f8e", "X-MS-Exchange-CrossTenant-AuthSource": "SJ0PR13MB5545.namprd13.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "19 Sep 2023 09:55:58.4185 (UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "fe128f2c-073b-4c20-818e-7246a585940c", "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED", "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n km/VjDXRPA8C/q80wUTQHt/qkLdysoXRJ4Xct3SNVn5BuZnAjhnZYnneW9hJpYb1IbCIGLn0Antpotv134MDV1XTorJJ6axaDHGGTKgu8ps=", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "MW5PR13MB5877", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Sync the logic from kernel driver and remove the unneeded header\nfile include statements.\n\nSigned-off-by: Chaoyong He <chaoyong.he@corigine.com>\n---\n drivers/net/nfp/nfpcore/nfp6000_pcie.c | 211 +++++++++++++++++--------\n drivers/net/nfp/nfpcore/nfp_cpp.h | 9 ++\n 2 files changed, 150 insertions(+), 70 deletions(-)", "diff": "diff --git a/drivers/net/nfp/nfpcore/nfp6000_pcie.c b/drivers/net/nfp/nfpcore/nfp6000_pcie.c\nindex 45645e04f8..4f453f19a9 100644\n--- a/drivers/net/nfp/nfpcore/nfp6000_pcie.c\n+++ b/drivers/net/nfp/nfpcore/nfp6000_pcie.c\n@@ -16,23 +16,8 @@\n \n #include \"nfp6000_pcie.h\"\n \n-#include <assert.h>\n-#include <stdio.h>\n-#include <stdlib.h>\n #include <unistd.h>\n-#include <stdint.h>\n-#include <stdbool.h>\n #include <fcntl.h>\n-#include <string.h>\n-#include <errno.h>\n-#include <dirent.h>\n-#include <libgen.h>\n-\n-#include <sys/mman.h>\n-#include <sys/file.h>\n-#include <sys/stat.h>\n-\n-#include <ethdev_pci.h>\n \n #include \"nfp_cpp.h\"\n #include \"nfp_logs.h\"\n@@ -43,8 +28,11 @@\n #define NFP_PCIE_BAR(_pf) (0x30000 + ((_pf) & 7) * 0xc0)\n \n #define NFP_PCIE_BAR_PCIE2CPP_ACTION_BASEADDRESS(_x) (((_x) & 0x1f) << 16)\n+#define NFP_PCIE_BAR_PCIE2CPP_ACTION_BASEADDRESS_OF(_x) (((_x) >> 16) & 0x1f)\n #define NFP_PCIE_BAR_PCIE2CPP_BASEADDRESS(_x) (((_x) & 0xffff) << 0)\n+#define NFP_PCIE_BAR_PCIE2CPP_BASEADDRESS_OF(_x) (((_x) >> 0) & 0xffff)\n #define NFP_PCIE_BAR_PCIE2CPP_LENGTHSELECT(_x) (((_x) & 0x3) << 27)\n+#define NFP_PCIE_BAR_PCIE2CPP_LENGTHSELECT_OF(_x) (((_x) >> 27) & 0x3)\n #define NFP_PCIE_BAR_PCIE2CPP_LENGTHSELECT_32BIT 0\n #define NFP_PCIE_BAR_PCIE2CPP_LENGTHSELECT_64BIT 1\n #define NFP_PCIE_BAR_PCIE2CPP_LENGTHSELECT_0BYTE 3\n@@ -55,7 +43,9 @@\n #define NFP_PCIE_BAR_PCIE2CPP_MAPTYPE_TARGET 2\n #define NFP_PCIE_BAR_PCIE2CPP_MAPTYPE_GENERAL 3\n #define NFP_PCIE_BAR_PCIE2CPP_TARGET_BASEADDRESS(_x) (((_x) & 0xf) << 23)\n+#define NFP_PCIE_BAR_PCIE2CPP_TARGET_BASEADDRESS_OF(_x) (((_x) >> 23) & 0xf)\n #define NFP_PCIE_BAR_PCIE2CPP_TOKEN_BASEADDRESS(_x) (((_x) & 0x3) << 21)\n+#define NFP_PCIE_BAR_PCIE2CPP_TOKEN_BASEADDRESS_OF(_x) (((_x) >> 21) & 0x3)\n \n /*\n * Minimal size of the PCIe cfg memory we depend on being mapped,\n@@ -132,7 +122,7 @@ nfp_compute_bar(const struct nfp_bar *bar,\n \tuint32_t newcfg;\n \tuint32_t bitsize;\n \n-\tif (target >= 16)\n+\tif (target >= NFP_CPP_NUM_TARGETS)\n \t\treturn -EINVAL;\n \n \tswitch (width) {\n@@ -182,10 +172,6 @@ nfp_compute_bar(const struct nfp_bar *bar,\n \t\toffset &= mask;\n \t\tbitsize = 40 - 21;\n \t}\n-\n-\tif (bar->bitsize < bitsize)\n-\t\treturn -EINVAL;\n-\n \tnewcfg |= offset >> bitsize;\n \n \tif (bar_base != NULL)\n@@ -434,7 +420,7 @@ nfp6000_area_acquire(struct nfp_cpp_area *area)\n \n \t/* Must have been too big. Sub-allocate. */\n \tif (priv->bar->iomem == NULL)\n-\t\treturn (-ENOMEM);\n+\t\treturn -ENOMEM;\n \n \tpriv->iomem = priv->bar->iomem + priv->bar_offset;\n \n@@ -464,9 +450,9 @@ nfp6000_area_read(struct nfp_cpp_area *area,\n \t\tuint32_t offset,\n \t\tsize_t length)\n {\n+\tint ret;\n \tsize_t n;\n \tint width;\n-\tbool is_64;\n \tuint32_t *wrptr32 = address;\n \tuint64_t *wrptr64 = address;\n \tstruct nfp6000_area_priv *priv;\n@@ -484,47 +470,54 @@ nfp6000_area_read(struct nfp_cpp_area *area,\n \tif (width <= 0)\n \t\treturn -EINVAL;\n \n+\t/* MU reads via a PCIe2CPP BAR support 32bit (and other) lengths */\n+\tif (priv->target == (NFP_CPP_TARGET_MU & NFP_CPP_TARGET_ID_MASK) &&\n+\t\t\tpriv->action == NFP_CPP_ACTION_RW &&\n+\t\t\t(offset % sizeof(uint64_t) == 4 ||\n+\t\t\tlength % sizeof(uint64_t) == 4))\n+\t\twidth = TARGET_WIDTH_32;\n+\n \t/* Unaligned? Translate to an explicit access */\n \tif (((priv->offset + offset) & (width - 1)) != 0) {\n \t\tPMD_DRV_LOG(ERR, \"aread_read unaligned!!!\");\n \t\treturn -EINVAL;\n \t}\n \n-\tis_64 = width == TARGET_WIDTH_64;\n-\n-\t/* MU reads via a PCIe2CPP BAR supports 32bit (and other) lengths */\n-\tif (priv->target == (NFP_CPP_TARGET_ID_MASK & NFP_CPP_TARGET_MU) &&\n-\t\t\tpriv->action == NFP_CPP_ACTION_RW) {\n-\t\tis_64 = false;\n-\t}\n+\tif (priv->bar == NULL)\n+\t\treturn -EFAULT;\n \n-\tif (is_64) {\n-\t\tif (offset % sizeof(uint64_t) != 0 ||\n-\t\t\t\tlength % sizeof(uint64_t) != 0)\n-\t\t\treturn -EINVAL;\n-\t} else {\n+\tswitch (width) {\n+\tcase TARGET_WIDTH_32:\n \t\tif (offset % sizeof(uint32_t) != 0 ||\n \t\t\t\tlength % sizeof(uint32_t) != 0)\n \t\t\treturn -EINVAL;\n-\t}\n \n-\tif (priv->bar == NULL)\n-\t\treturn -EFAULT;\n+\t\tfor (n = 0; n < length; n += sizeof(uint32_t)) {\n+\t\t\t*wrptr32 = *rdptr32;\n+\t\t\twrptr32++;\n+\t\t\trdptr32++;\n+\t\t}\n+\n+\t\tret = n;\n+\t\tbreak;\n+\tcase TARGET_WIDTH_64:\n+\t\tif (offset % sizeof(uint64_t) != 0 ||\n+\t\t\t\tlength % sizeof(uint64_t) != 0)\n+\t\t\treturn -EINVAL;\n \n-\tif (is_64)\n \t\tfor (n = 0; n < length; n += sizeof(uint64_t)) {\n \t\t\t*wrptr64 = *rdptr64;\n \t\t\twrptr64++;\n \t\t\trdptr64++;\n \t\t}\n-\telse\n-\t\tfor (n = 0; n < length; n += sizeof(uint32_t)) {\n-\t\t\t*wrptr32 = *rdptr32;\n-\t\t\twrptr32++;\n-\t\t\trdptr32++;\n-\t\t}\n \n-\treturn n;\n+\t\tret = n;\n+\t\tbreak;\n+\tdefault:\n+\t\treturn -EINVAL;\n+\t}\n+\n+\treturn ret;\n }\n \n static int\n@@ -533,9 +526,9 @@ nfp6000_area_write(struct nfp_cpp_area *area,\n \t\tuint32_t offset,\n \t\tsize_t length)\n {\n+\tint ret;\n \tsize_t n;\n \tint width;\n-\tbool is_64;\n \tuint32_t *wrptr32;\n \tuint64_t *wrptr64;\n \tstruct nfp6000_area_priv *priv;\n@@ -553,47 +546,53 @@ nfp6000_area_write(struct nfp_cpp_area *area,\n \tif (width <= 0)\n \t\treturn -EINVAL;\n \n+\t/* MU reads via a PCIe2CPP BAR support 32bit (and other) lengths */\n+\tif (priv->target == (NFP_CPP_TARGET_MU & NFP_CPP_TARGET_ID_MASK) &&\n+\t\t\tpriv->action == NFP_CPP_ACTION_RW &&\n+\t\t\t(offset % sizeof(uint64_t) == 4 ||\n+\t\t\tlength % sizeof(uint64_t) == 4))\n+\t\twidth = TARGET_WIDTH_32;\n+\n \t/* Unaligned? Translate to an explicit access */\n \tif (((priv->offset + offset) & (width - 1)) != 0)\n \t\treturn -EINVAL;\n \n-\tis_64 = width == TARGET_WIDTH_64;\n-\n-\t/* MU writes via a PCIe2CPP BAR supports 32bit (and other) lengths */\n-\tif (priv->target == (NFP_CPP_TARGET_ID_MASK & NFP_CPP_TARGET_MU) &&\n-\t\t\tpriv->action == NFP_CPP_ACTION_RW)\n-\t\tis_64 = false;\n+\tif (priv->bar == NULL)\n+\t\treturn -EFAULT;\n \n-\tif (is_64) {\n-\t\tif (offset % sizeof(uint64_t) != 0 ||\n-\t\t\t\tlength % sizeof(uint64_t) != 0)\n-\t\t\treturn -EINVAL;\n-\t} else {\n+\tswitch (width) {\n+\tcase TARGET_WIDTH_32:\n \t\tif (offset % sizeof(uint32_t) != 0 ||\n \t\t\t\tlength % sizeof(uint32_t) != 0)\n \t\t\treturn -EINVAL;\n-\t}\n \n-\tif (priv->bar == NULL)\n-\t\treturn -EFAULT;\n+\t\tfor (n = 0; n < length; n += sizeof(uint32_t)) {\n+\t\t\t*wrptr32 = *rdptr32;\n+\t\t\twrptr32++;\n+\t\t\trdptr32++;\n+\t\t}\n+\n+\t\tret = n;\n+\t\tbreak;\n+\tcase TARGET_WIDTH_64:\n+\t\tif (offset % sizeof(uint64_t) != 0 ||\n+\t\t\t\tlength % sizeof(uint64_t) != 0)\n+\t\t\treturn -EINVAL;\n \n-\tif (is_64)\n \t\tfor (n = 0; n < length; n += sizeof(uint64_t)) {\n \t\t\t*wrptr64 = *rdptr64;\n \t\t\twrptr64++;\n \t\t\trdptr64++;\n \t\t}\n-\telse\n-\t\tfor (n = 0; n < length; n += sizeof(uint32_t)) {\n-\t\t\t*wrptr32 = *rdptr32;\n-\t\t\twrptr32++;\n-\t\t\trdptr32++;\n-\t\t}\n \n-\treturn n;\n-}\n+\t\tret = n;\n+\t\tbreak;\n+\tdefault:\n+\t\treturn -EINVAL;\n+\t}\n \n-#define PCI_DEVICES \"/sys/bus/pci/devices\"\n+\treturn ret;\n+}\n \n static int\n nfp_acquire_process_lock(struct nfp_pcie_user *desc)\n@@ -706,6 +705,74 @@ nfp6000_set_serial(struct rte_pci_device *dev,\n \treturn 0;\n }\n \n+static int\n+nfp6000_get_dsn(struct rte_pci_device *pci_dev,\n+\t\tuint64_t *dsn)\n+{\n+\toff_t pos;\n+\tsize_t len;\n+\tuint64_t tmp = 0;\n+\n+\tpos = rte_pci_find_ext_capability(pci_dev, RTE_PCI_EXT_CAP_ID_DSN);\n+\tif (pos <= 0) {\n+\t\tPMD_DRV_LOG(ERR, \"PCI_EXT_CAP_ID_DSN not found\");\n+\t\treturn -ENODEV;\n+\t}\n+\n+\tpos += 4;\n+\tlen = sizeof(tmp);\n+\n+\tif (rte_pci_read_config(pci_dev, &tmp, len, pos) < 0) {\n+\t\tPMD_DRV_LOG(ERR, \"nfp get device serial number failed\");\n+\t\treturn -ENOENT;\n+\t}\n+\n+\t*dsn = tmp;\n+\n+\treturn 0;\n+}\n+\n+static int\n+nfp6000_get_interface(struct rte_pci_device *dev,\n+\t\tuint16_t *interface)\n+{\n+\tint ret;\n+\tuint64_t dsn = 0;\n+\n+\tret = nfp6000_get_dsn(dev, &dsn);\n+\tif (ret != 0)\n+\t\treturn ret;\n+\n+\t*interface = dsn & 0xffff;\n+\n+\treturn 0;\n+}\n+\n+static int\n+nfp6000_get_serial(struct rte_pci_device *dev,\n+\t\tuint8_t *serial,\n+\t\tsize_t length)\n+{\n+\tint ret;\n+\tuint64_t dsn = 0;\n+\n+\tif (length < NFP_SERIAL_LEN)\n+\t\treturn -ENOMEM;\n+\n+\tret = nfp6000_get_dsn(dev, &dsn);\n+\tif (ret != 0)\n+\t\treturn ret;\n+\n+\tserial[0] = (dsn >> 56) & 0xff;\n+\tserial[1] = (dsn >> 48) & 0xff;\n+\tserial[2] = (dsn >> 40) & 0xff;\n+\tserial[3] = (dsn >> 32) & 0xff;\n+\tserial[4] = (dsn >> 24) & 0xff;\n+\tserial[5] = (dsn >> 16) & 0xff;\n+\n+\treturn 0;\n+}\n+\n static int\n nfp6000_set_barsz(struct rte_pci_device *dev,\n \t\tstruct nfp_pcie_user *desc)\n@@ -789,6 +856,10 @@ static const struct nfp_cpp_operations nfp6000_pcie_ops = {\n \t.free = nfp6000_free,\n \n \t.area_priv_size = sizeof(struct nfp6000_area_priv),\n+\n+\t.get_interface = nfp6000_get_interface,\n+\t.get_serial = nfp6000_get_serial,\n+\n \t.area_init = nfp6000_area_init,\n \t.area_acquire = nfp6000_area_acquire,\n \t.area_release = nfp6000_area_release,\ndiff --git a/drivers/net/nfp/nfpcore/nfp_cpp.h b/drivers/net/nfp/nfpcore/nfp_cpp.h\nindex 34ed50ceca..0f36ba0b50 100644\n--- a/drivers/net/nfp/nfpcore/nfp_cpp.h\n+++ b/drivers/net/nfp/nfpcore/nfp_cpp.h\n@@ -16,6 +16,8 @@ struct nfp_cpp_area;\n \n #define NFP_SERIAL_LEN 6\n \n+#define NFP_CPP_NUM_TARGETS 16\n+\n /*\n * NFP CPP operations structure\n */\n@@ -33,6 +35,13 @@ struct nfp_cpp_operations {\n \t */\n \tvoid (*free)(struct nfp_cpp *cpp);\n \n+\tint (*get_interface)(struct rte_pci_device *dev,\n+\t\t\tuint16_t *interface);\n+\n+\tint (*get_serial)(struct rte_pci_device *dev,\n+\t\t\tuint8_t *serial,\n+\t\t\tsize_t length);\n+\n \t/*\n \t * Initialize a new NFP CPP area\n \t * NOTE: This is _not_ serialized\n", "prefixes": [ "v5", "24/26" ] }