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GET /api/patches/131695/?format=api
{ "id": 131695, "url": "http://patchwork.dpdk.org/api/patches/131695/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230920072528.14185-21-syalavarthi@marvell.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230920072528.14185-21-syalavarthi@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230920072528.14185-21-syalavarthi@marvell.com", "date": "2023-09-20T07:25:11", "name": "[v2,20/34] ml/cnxk: add structures to support TVM model type", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "7fea923ffabac133699df39305793ed597ccf61f", "submitter": { "id": 2480, "url": "http://patchwork.dpdk.org/api/people/2480/?format=api", "name": "Srikanth Yalavarthi", "email": "syalavarthi@marvell.com" }, "delegate": { "id": 310, "url": "http://patchwork.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230920072528.14185-21-syalavarthi@marvell.com/mbox/", "series": [ { "id": 29567, "url": "http://patchwork.dpdk.org/api/series/29567/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=29567", "date": "2023-09-20T07:24:51", "name": "Implemenation of revised ml/cnxk driver", "version": 2, "mbox": "http://patchwork.dpdk.org/series/29567/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/131695/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/131695/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 61ED9425E4;\n\tWed, 20 Sep 2023 09:27:59 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id A3BBA42D7D;\n\tWed, 20 Sep 2023 09:26:01 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id 4EE49410D3\n for <dev@dpdk.org>; Wed, 20 Sep 2023 09:25:41 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 38K633lk002294 for <dev@dpdk.org>; Wed, 20 Sep 2023 00:25:40 -0700", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3t7u4d89j8-14\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Wed, 20 Sep 2023 00:25:40 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48;\n Wed, 20 Sep 2023 00:25:38 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend\n Transport; Wed, 20 Sep 2023 00:25:38 -0700", "from ml-host-33.caveonetworks.com (unknown [10.110.143.233])\n by maili.marvell.com (Postfix) with ESMTP id A42A55B6928;\n Wed, 20 Sep 2023 00:25:38 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=/dlEw8556uuHKZoPaj3vWTnDWOF0120mHN0j+XKXwHY=;\n b=XZLNl6MBtjEPp4ICb5uCn38oC68m3pLYo3dk6s0CEZi7sKS8lB8fA538mSYFf4j74/XQ\n 3kxur+GDqk4H2VmLGiYfyigKNFaclY169D7XRdMg03TZxQ92fHyZ5SaVymM0AGzRDSZU\n 8iy9aylOjYyXWOihYLCzEHtP43F2Z1QEXEluJvnKd7Azv6+DIbhl1YZgGXgjbuE2871+\n kW4t8b9+9aWqyKBQWLEdvnUeki3WGr0QGe68d8vbaa8OEZ6IXHMw6HKkcTB9eIPAmkNe\n f7M6fzepEDpxyzrLc+xooEUC26tjG8e+NyDBW82fOnwZFoiB1ZWqX/ersvinCs/TWkRz Ig==", "From": "Srikanth Yalavarthi <syalavarthi@marvell.com>", "To": "Srikanth Yalavarthi <syalavarthi@marvell.com>", "CC": "<dev@dpdk.org>, <sshankarnara@marvell.com>, <aprabhu@marvell.com>,\n <ptakkar@marvell.com>", "Subject": "[PATCH v2 20/34] ml/cnxk: add structures to support TVM model type", "Date": "Wed, 20 Sep 2023 00:25:11 -0700", "Message-ID": "<20230920072528.14185-21-syalavarthi@marvell.com>", "X-Mailer": "git-send-email 2.41.0", "In-Reply-To": "<20230920072528.14185-1-syalavarthi@marvell.com>", "References": "<20230830155927.3566-1-syalavarthi@marvell.com>\n <20230920072528.14185-1-syalavarthi@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "DZ6uxaHo8h2Dw_66OyqqtLQ02gtbcigR", "X-Proofpoint-GUID": "DZ6uxaHo8h2Dw_66OyqqtLQ02gtbcigR", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.601,FMLib:17.11.176.26\n definitions=2023-09-20_02,2023-09-19_01,2023-05-22_02", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Introduced model type, sub-type and layer type. Added\ninternal structures for TVM model objects.\n\nSigned-off-by: Srikanth Yalavarthi <syalavarthi@marvell.com>\n---\n drivers/ml/cnxk/cn10k_ml_ocm.c | 3 ++\n drivers/ml/cnxk/cn10k_ml_ops.c | 6 ++-\n drivers/ml/cnxk/cnxk_ml_model.h | 63 +++++++++++++++++++++++++++++++-\n drivers/ml/cnxk/cnxk_ml_ops.c | 60 +++++++++++++++++++++++++-----\n drivers/ml/cnxk/meson.build | 1 +\n drivers/ml/cnxk/mvtvm_ml_model.h | 46 +++++++++++++++++++++++\n 6 files changed, 166 insertions(+), 13 deletions(-)\n create mode 100644 drivers/ml/cnxk/mvtvm_ml_model.h", "diff": "diff --git a/drivers/ml/cnxk/cn10k_ml_ocm.c b/drivers/ml/cnxk/cn10k_ml_ocm.c\nindex 70d207e646..a7b64ddf05 100644\n--- a/drivers/ml/cnxk/cn10k_ml_ocm.c\n+++ b/drivers/ml/cnxk/cn10k_ml_ocm.c\n@@ -437,6 +437,9 @@ cn10k_ml_ocm_free_pages(struct cnxk_ml_dev *cnxk_mldev, uint16_t model_id, uint1\n \n \t\t\tfor (j = 0; j < local_model->nb_layers; j++) {\n \t\t\t\tlocal_layer = &local_model->layer[j];\n+\t\t\t\tif (local_layer->type != ML_CNXK_LAYER_TYPE_MRVL)\n+\t\t\t\t\tcontinue;\n+\n \t\t\t\tif (local_layer != layer &&\n \t\t\t\t local_layer->glow.ocm_map.ocm_reserved) {\n \t\t\t\t\tif (IS_BIT_SET(local_layer->glow.ocm_map.tilemask, tile_id))\ndiff --git a/drivers/ml/cnxk/cn10k_ml_ops.c b/drivers/ml/cnxk/cn10k_ml_ops.c\nindex daeb3b712c..db18f32052 100644\n--- a/drivers/ml/cnxk/cn10k_ml_ops.c\n+++ b/drivers/ml/cnxk/cn10k_ml_ops.c\n@@ -650,6 +650,9 @@ cn10k_ml_model_load(struct cnxk_ml_dev *cnxk_mldev, struct rte_ml_model_params *\n \tif (ret != 0)\n \t\treturn ret;\n \n+\t/* Set model sub type */\n+\tmodel->subtype = ML_CNXK_MODEL_SUBTYPE_GLOW_MRVL;\n+\n \t/* Copy metadata to internal buffer */\n \trte_memcpy(&model->glow.metadata, params->addr, sizeof(struct cn10k_ml_model_metadata));\n \tcn10k_ml_model_metadata_update(&model->glow.metadata);\n@@ -671,6 +674,7 @@ cn10k_ml_model_load(struct cnxk_ml_dev *cnxk_mldev, struct rte_ml_model_params *\n \n \t/* Load layer and get the index */\n \tlayer = &model->layer[0];\n+\tlayer->type = ML_CNXK_LAYER_TYPE_MRVL;\n \tret = cn10k_ml_layer_load(cnxk_mldev, model->model_id, NULL, params->addr, params->size,\n \t\t\t\t &layer->index);\n \tif (ret != 0) {\n@@ -894,7 +898,7 @@ cn10k_ml_layer_start(void *device, uint16_t model_id, const char *layer_name)\n \tif (ret < 0) {\n \t\tcn10k_ml_layer_stop(device, model_id, layer_name);\n \t} else {\n-\t\tif (cn10k_mldev->cache_model_data)\n+\t\tif (cn10k_mldev->cache_model_data && model->type == ML_CNXK_MODEL_TYPE_GLOW)\n \t\t\tret = cn10k_ml_cache_model_data(cnxk_mldev, layer);\n \t}\n \ndiff --git a/drivers/ml/cnxk/cnxk_ml_model.h b/drivers/ml/cnxk/cnxk_ml_model.h\nindex f618e5aa5f..b5d6ab2b1e 100644\n--- a/drivers/ml/cnxk/cnxk_ml_model.h\n+++ b/drivers/ml/cnxk/cnxk_ml_model.h\n@@ -11,6 +11,10 @@\n \n #include \"cn10k_ml_model.h\"\n \n+#ifdef RTE_MLDEV_CNXK_ENABLE_MVTVM\n+#include \"mvtvm_ml_model.h\"\n+#endif\n+\n #include \"cnxk_ml_io.h\"\n \n struct cnxk_ml_dev;\n@@ -18,6 +22,45 @@ struct cnxk_ml_model;\n struct cnxk_ml_qp;\n struct cnxk_ml_req;\n \n+/* Model type */\n+enum cnxk_ml_model_type {\n+\t/* Invalid model type */\n+\tML_CNXK_MODEL_TYPE_INVALID,\n+\n+\t/* Glow compiled model, for MLIP target */\n+\tML_CNXK_MODEL_TYPE_GLOW,\n+\n+\t/* TVM compiled model, for ARM64 / ARM64 + MLIP target */\n+\tML_CNXK_MODEL_TYPE_TVM,\n+};\n+\n+/* Model subtype */\n+enum cnxk_ml_model_subtype {\n+\t/* Marvell Glow model */\n+\tML_CNXK_MODEL_SUBTYPE_GLOW_MRVL,\n+\n+\t/* TVM model with single MRVL region */\n+\tML_CNXK_MODEL_SUBTYPE_TVM_MRVL,\n+\n+\t/* TVM model with LLVM regions only */\n+\tML_CNXK_MODEL_SUBTYPE_TVM_LLVM,\n+\n+\t/* TVM hybrid model, with both MRVL and LLVM regions or (> 1) MRVL regions*/\n+\tML_CNXK_MODEL_SUBTYPE_TVM_HYBRID,\n+};\n+\n+/* Layer type */\n+enum cnxk_ml_layer_type {\n+\t/* MRVL layer, for MLIP target*/\n+\tML_CNXK_LAYER_TYPE_UNKNOWN = 0,\n+\n+\t/* MRVL layer, for MLIP target*/\n+\tML_CNXK_LAYER_TYPE_MRVL,\n+\n+\t/* LLVM layer, for ARM64 target*/\n+\tML_CNXK_LAYER_TYPE_LLVM,\n+};\n+\n /* Model state */\n enum cnxk_ml_model_state {\n \t/* Unknown state */\n@@ -53,6 +96,9 @@ struct cnxk_ml_layer {\n \t/* Name*/\n \tchar name[RTE_ML_STR_MAX];\n \n+\t/* Type */\n+\tenum cnxk_ml_layer_type type;\n+\n \t/* Model handle */\n \tstruct cnxk_ml_model *model;\n \n@@ -83,14 +129,27 @@ struct cnxk_ml_model {\n \t/* Device reference */\n \tstruct cnxk_ml_dev *cnxk_mldev;\n \n+\t/* Type */\n+\tenum cnxk_ml_model_type type;\n+\n+\t/* Model subtype */\n+\tenum cnxk_ml_model_subtype subtype;\n+\n \t/* ID */\n \tuint16_t model_id;\n \n \t/* Name */\n \tchar name[RTE_ML_STR_MAX];\n \n-\t/* Model specific data - glow */\n-\tstruct cn10k_ml_model_data glow;\n+\tunion {\n+\t\t/* Model specific data - glow */\n+\t\tstruct cn10k_ml_model_data glow;\n+\n+#ifdef RTE_MLDEV_CNXK_ENABLE_MVTVM\n+\t\t/* Model type specific data - mvtvm */\n+\t\tstruct mvtvm_ml_model_data mvtvm;\n+#endif\n+\t};\n \n \t/* Batch size */\n \tuint32_t batch_size;\ndiff --git a/drivers/ml/cnxk/cnxk_ml_ops.c b/drivers/ml/cnxk/cnxk_ml_ops.c\nindex 358f16cead..a20937ea11 100644\n--- a/drivers/ml/cnxk/cnxk_ml_ops.c\n+++ b/drivers/ml/cnxk/cnxk_ml_ops.c\n@@ -1286,6 +1286,8 @@ cnxk_ml_io_quantize(struct rte_ml_dev *dev, uint16_t model_id, struct rte_ml_buf\n \tstruct cnxk_ml_model *model;\n \tuint8_t *lcl_dbuffer;\n \tuint8_t *lcl_qbuffer;\n+\tuint64_t d_offset;\n+\tuint64_t q_offset;\n \tuint32_t i;\n \tint ret;\n \n@@ -1298,17 +1300,35 @@ cnxk_ml_io_quantize(struct rte_ml_dev *dev, uint16_t model_id, struct rte_ml_buf\n \t\treturn -EINVAL;\n \t}\n \n-\tinfo = &model->layer[0].info;\n+\tif (model->type == ML_CNXK_MODEL_TYPE_GLOW)\n+\t\tinfo = &model->layer[0].info;\n+#ifdef RTE_MLDEV_CNXK_ENABLE_MVTVM\n+\telse\n+\t\tinfo = &model->mvtvm.info;\n+#endif\n+\n+\tif (info == NULL)\n+\t\treturn -EINVAL;\n \n-\tlcl_dbuffer = dbuffer[0]->addr;\n-\tlcl_qbuffer = qbuffer[0]->addr;\n+\td_offset = 0;\n+\tq_offset = 0;\n \tfor (i = 0; i < info->nb_inputs; i++) {\n+\t\tif (model->type == ML_CNXK_MODEL_TYPE_TVM) {\n+\t\t\tlcl_dbuffer = dbuffer[i]->addr;\n+\t\t\tlcl_qbuffer = qbuffer[i]->addr;\n+\t\t} else {\n+\t\t\tlcl_dbuffer = RTE_PTR_ADD(dbuffer[0]->addr, d_offset);\n+\t\t\tlcl_qbuffer = RTE_PTR_ADD(qbuffer[0]->addr, q_offset);\n+\t\t}\n+\n \t\tret = cnxk_ml_io_quantize_single(&info->input[i], lcl_dbuffer, lcl_qbuffer);\n \t\tif (ret < 0)\n \t\t\treturn ret;\n \n-\t\tlcl_dbuffer += info->input[i].sz_d;\n-\t\tlcl_qbuffer += info->input[i].sz_q;\n+\t\tif (model->type == ML_CNXK_MODEL_TYPE_GLOW) {\n+\t\t\td_offset += info->input[i].sz_d;\n+\t\t\tq_offset += info->input[i].sz_q;\n+\t\t}\n \t}\n \n \treturn 0;\n@@ -1322,6 +1342,8 @@ cnxk_ml_io_dequantize(struct rte_ml_dev *dev, uint16_t model_id, struct rte_ml_b\n \tstruct cnxk_ml_model *model;\n \tuint8_t *lcl_qbuffer;\n \tuint8_t *lcl_dbuffer;\n+\tuint64_t q_offset;\n+\tuint64_t d_offset;\n \tuint32_t i;\n \tint ret;\n \n@@ -1334,17 +1356,35 @@ cnxk_ml_io_dequantize(struct rte_ml_dev *dev, uint16_t model_id, struct rte_ml_b\n \t\treturn -EINVAL;\n \t}\n \n-\tinfo = &model->layer[model->nb_layers - 1].info;\n+\tif (model->type == ML_CNXK_MODEL_TYPE_GLOW)\n+\t\tinfo = &model->layer[model->nb_layers - 1].info;\n+#ifdef RTE_MLDEV_CNXK_ENABLE_MVTVM\n+\telse\n+\t\tinfo = &model->mvtvm.info;\n+#endif\n+\n+\tif (info == NULL)\n+\t\treturn -EINVAL;\n \n-\tlcl_qbuffer = qbuffer[0]->addr;\n-\tlcl_dbuffer = dbuffer[0]->addr;\n+\tq_offset = 0;\n+\td_offset = 0;\n \tfor (i = 0; i < info->nb_outputs; i++) {\n+\t\tif (model->type == ML_CNXK_MODEL_TYPE_TVM) {\n+\t\t\tlcl_qbuffer = qbuffer[i]->addr;\n+\t\t\tlcl_dbuffer = dbuffer[i]->addr;\n+\t\t} else {\n+\t\t\tlcl_qbuffer = RTE_PTR_ADD(qbuffer[0]->addr, q_offset);\n+\t\t\tlcl_dbuffer = RTE_PTR_ADD(dbuffer[0]->addr, d_offset);\n+\t\t}\n+\n \t\tret = cnxk_ml_io_dequantize_single(&info->output[i], lcl_qbuffer, lcl_dbuffer);\n \t\tif (ret < 0)\n \t\t\treturn ret;\n \n-\t\tlcl_qbuffer += info->output[i].sz_q;\n-\t\tlcl_dbuffer += info->output[i].sz_d;\n+\t\tif (model->type == ML_CNXK_MODEL_TYPE_GLOW) {\n+\t\t\tq_offset += info->output[i].sz_q;\n+\t\t\td_offset += info->output[i].sz_d;\n+\t\t}\n \t}\n \n \treturn 0;\ndiff --git a/drivers/ml/cnxk/meson.build b/drivers/ml/cnxk/meson.build\nindex 61f7fa32af..25b72cc8aa 100644\n--- a/drivers/ml/cnxk/meson.build\n+++ b/drivers/ml/cnxk/meson.build\n@@ -66,6 +66,7 @@ dpdk_conf.set('RTE_MLDEV_CNXK_ENABLE_MVTVM', true)\n \n driver_sdk_headers += files(\n 'mvtvm_ml_ops.h',\n+ 'mvtvm_ml_model.h',\n )\n \n sources += files(\ndiff --git a/drivers/ml/cnxk/mvtvm_ml_model.h b/drivers/ml/cnxk/mvtvm_ml_model.h\nnew file mode 100644\nindex 0000000000..1f6b435be0\n--- /dev/null\n+++ b/drivers/ml/cnxk/mvtvm_ml_model.h\n@@ -0,0 +1,46 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright (c) 2023 Marvell.\n+ */\n+\n+#ifndef _MVTVM_ML_MODEL_H_\n+#define _MVTVM_ML_MODEL_H_\n+\n+#include <tvmdp.h>\n+\n+#include <rte_mldev.h>\n+\n+#include \"cnxk_ml_io.h\"\n+\n+/* Maximum number of objects per model */\n+#define ML_MVTVM_MODEL_OBJECT_MAX 3\n+\n+/* Objects list */\n+extern char mvtvm_object_list[ML_MVTVM_MODEL_OBJECT_MAX][RTE_ML_STR_MAX];\n+\n+/* Model object structure */\n+struct mvtvm_ml_model_object {\n+\t/* Name */\n+\tchar name[RTE_ML_STR_MAX];\n+\n+\t/* Temporary buffer */\n+\tuint8_t *buffer;\n+\n+\t/* Buffer size */\n+\tint64_t size;\n+};\n+\n+struct mvtvm_ml_model_data {\n+\t/* Model metadata */\n+\tstruct tvmdp_model_metadata metadata;\n+\n+\t/* Model objects */\n+\tstruct tvmdp_model_object object;\n+\n+\t/* TVM runtime callbacks */\n+\tstruct tvmrt_glow_callback cb;\n+\n+\t/* Model I/O info */\n+\tstruct cnxk_ml_io_info info;\n+};\n+\n+#endif /* _MVTVM_ML_MODEL_H_ */\n", "prefixes": [ "v2", "20/34" ] }