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GET /api/patches/131914/?format=api
{ "id": 131914, "url": "http://patchwork.dpdk.org/api/patches/131914/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230926112931.4191107-5-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230926112931.4191107-5-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230926112931.4191107-5-qi.z.zhang@intel.com", "date": "2023-09-26T11:29:30", "name": "[v5,4/5] net/ice: refine supported flow pattern name", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "e440eb18210818df2f5bb18fece9c6bb65c53c12", "submitter": { "id": 504, "url": "http://patchwork.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 1540, "url": "http://patchwork.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230926112931.4191107-5-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 29623, "url": "http://patchwork.dpdk.org/api/series/29623/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=29623", "date": "2023-09-26T11:29:26", "name": "net/ice: refactor rte_flow", "version": 5, "mbox": "http://patchwork.dpdk.org/series/29623/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/131914/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/131914/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 4ECDA4263C;\n\tTue, 26 Sep 2023 05:09:54 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id E515440697;\n\tTue, 26 Sep 2023 05:09:33 +0200 (CEST)", "from mgamail.intel.com (mgamail.intel.com [134.134.136.24])\n by mails.dpdk.org (Postfix) with ESMTP id 8A1E8402E7\n for <dev@dpdk.org>; Tue, 26 Sep 2023 05:09:31 +0200 (CEST)", "from fmsmga004.fm.intel.com ([10.253.24.48])\n by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 25 Sep 2023 20:09:30 -0700", "from dpdk-qzhan15-test02.sh.intel.com ([10.67.115.37])\n by fmsmga004.fm.intel.com with ESMTP; 25 Sep 2023 20:09:27 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1695697771; x=1727233771;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=x2T9vQG7QdB8WiMnx1MivUW/YuJK6iGz9eIAD6zEP8w=;\n b=FML2XPOPJvcQwbt8b4sPPFbXpxmQ9UNmXQH5DgY3938CisUDg4EKSPB8\n D5aCtSq0F3+qbML9iyk4WyZxuKDpNYAiwzZmHYQxQKwnBBg3KZtaMReqg\n +lijhPJ9O0xXvABVBjr3nLtx7En/u+xN0xxDMsnlETDJLvJPI2CMuogPl\n XiAe3yCFJKNUnj2zaG0478pjMqpXKVnGD7aFOgsBQZaimU5YtNhH75Pnz\n CMa9iZfsGzCJyLwnkVX7fjglEF+AnIf+vI5BApCDvafQAfH65owL3v6zP\n G0l4RfYLBdMECCtae7U61dmgEXGuRmWXIuD+lVDo2dTQp/t6euDkPruqV w==;", "X-IronPort-AV": [ "E=McAfee;i=\"6600,9927,10843\"; a=\"384246966\"", "E=Sophos;i=\"6.03,176,1694761200\"; d=\"scan'208\";a=\"384246966\"", "E=McAfee;i=\"6600,9927,10843\"; a=\"818878531\"", "E=Sophos;i=\"6.03,176,1694761200\"; d=\"scan'208\";a=\"818878531\"" ], "X-ExtLoop1": "1", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "qiming.yang@intel.com", "Cc": "zhichaox.zeng@intel.com,\n\tdev@dpdk.org,\n\tQi Zhang <qi.z.zhang@intel.com>", "Subject": "[PATCH v5 4/5] net/ice: refine supported flow pattern name", "Date": "Tue, 26 Sep 2023 07:29:30 -0400", "Message-Id": "<20230926112931.4191107-5-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.31.1", "In-Reply-To": "<20230926112931.4191107-1-qi.z.zhang@intel.com>", "References": "<20230814202616.3346652-1-qi.z.zhang@intel.com>\n <20230926112931.4191107-1-qi.z.zhang@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Unified the supported pattern array name as\nice_<engine>_supported_pattern.\n\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/ice_acl_filter.c | 6 +++---\n drivers/net/ice/ice_fdir_filter.c | 6 +++---\n drivers/net/ice/ice_switch_filter.c | 6 +++---\n 3 files changed, 9 insertions(+), 9 deletions(-)", "diff": "diff --git a/drivers/net/ice/ice_acl_filter.c b/drivers/net/ice/ice_acl_filter.c\nindex e507bb927a..63a525b363 100644\n--- a/drivers/net/ice/ice_acl_filter.c\n+++ b/drivers/net/ice/ice_acl_filter.c\n@@ -47,7 +47,7 @@ struct acl_rule {\n };\n \n static struct\n-ice_pattern_match_item ice_acl_pattern[] = {\n+ice_pattern_match_item ice_acl_supported_pattern[] = {\n \t{pattern_eth_ipv4,\tICE_ACL_INSET_ETH_IPV4,\t\tICE_INSET_NONE,\tICE_INSET_NONE},\n \t{pattern_eth_ipv4_udp,\tICE_ACL_INSET_ETH_IPV4_UDP,\tICE_INSET_NONE,\tICE_INSET_NONE},\n \t{pattern_eth_ipv4_tcp,\tICE_ACL_INSET_ETH_IPV4_TCP,\tICE_INSET_NONE,\tICE_INSET_NONE},\n@@ -1050,8 +1050,8 @@ ice_flow_engine ice_acl_engine = {\n struct\n ice_flow_parser ice_acl_parser = {\n \t.engine = &ice_acl_engine,\n-\t.array = ice_acl_pattern,\n-\t.array_len = RTE_DIM(ice_acl_pattern),\n+\t.array = ice_acl_supported_pattern,\n+\t.array_len = RTE_DIM(ice_acl_supported_pattern),\n \t.parse_pattern_action = ice_acl_parse,\n \t.stage = ICE_FLOW_STAGE_DISTRIBUTOR,\n };\ndiff --git a/drivers/net/ice/ice_fdir_filter.c b/drivers/net/ice/ice_fdir_filter.c\nindex 6afcdf5376..0b7920ad44 100644\n--- a/drivers/net/ice/ice_fdir_filter.c\n+++ b/drivers/net/ice/ice_fdir_filter.c\n@@ -106,7 +106,7 @@\n \tICE_INSET_IPV6_SRC | ICE_INSET_IPV6_DST | \\\n \tICE_INSET_NAT_T_ESP_SPI)\n \n-static struct ice_pattern_match_item ice_fdir_pattern_list[] = {\n+static struct ice_pattern_match_item ice_fdir_supported_pattern[] = {\n \t{pattern_raw,\t\t\t\t\tICE_INSET_NONE,\t\t\tICE_INSET_NONE,\t\t\tICE_INSET_NONE},\n \t{pattern_ethertype,\t\t\t\tICE_FDIR_INSET_ETH,\t\tICE_INSET_NONE,\t\t\tICE_INSET_NONE},\n \t{pattern_eth_ipv4,\t\t\t\tICE_FDIR_INSET_ETH_IPV4,\tICE_INSET_NONE,\t\t\tICE_INSET_NONE},\n@@ -2494,8 +2494,8 @@ ice_fdir_parse(struct ice_adapter *ad,\n \n struct ice_flow_parser ice_fdir_parser = {\n \t.engine = &ice_fdir_engine,\n-\t.array = ice_fdir_pattern_list,\n-\t.array_len = RTE_DIM(ice_fdir_pattern_list),\n+\t.array = ice_fdir_supported_pattern,\n+\t.array_len = RTE_DIM(ice_fdir_supported_pattern),\n \t.parse_pattern_action = ice_fdir_parse,\n \t.stage = ICE_FLOW_STAGE_DISTRIBUTOR,\n };\ndiff --git a/drivers/net/ice/ice_switch_filter.c b/drivers/net/ice/ice_switch_filter.c\nindex 8f29326762..122b87f625 100644\n--- a/drivers/net/ice/ice_switch_filter.c\n+++ b/drivers/net/ice/ice_switch_filter.c\n@@ -202,7 +202,7 @@ struct ice_switch_filter_conf {\n };\n \n static struct\n-ice_pattern_match_item ice_switch_pattern_dist_list[] = {\n+ice_pattern_match_item ice_switch_supported_pattern[] = {\n \t{pattern_any,\t\t\t\t\tICE_INSET_NONE,\t\t\t\tICE_INSET_NONE,\t\t\t\tICE_INSET_NONE},\n \t{pattern_ethertype,\t\t\t\tICE_SW_INSET_ETHER,\t\t\tICE_INSET_NONE,\t\t\t\tICE_INSET_NONE},\n \t{pattern_ethertype_vlan,\t\t\tICE_SW_INSET_MAC_VLAN,\t\t\tICE_INSET_NONE,\t\t\t\tICE_INSET_NONE},\n@@ -2075,8 +2075,8 @@ ice_flow_engine ice_switch_engine = {\n struct\n ice_flow_parser ice_switch_parser = {\n \t.engine = &ice_switch_engine,\n-\t.array = ice_switch_pattern_dist_list,\n-\t.array_len = RTE_DIM(ice_switch_pattern_dist_list),\n+\t.array = ice_switch_supported_pattern,\n+\t.array_len = RTE_DIM(ice_switch_supported_pattern),\n \t.parse_pattern_action = ice_switch_parse_pattern_action,\n \t.stage = ICE_FLOW_STAGE_DISTRIBUTOR,\n };\n", "prefixes": [ "v5", "4/5" ] }