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GET /api/patches/132129/?format=api
{ "id": 132129, "url": "http://patchwork.dpdk.org/api/patches/132129/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230928103623.216287-10-amitprakashs@marvell.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230928103623.216287-10-amitprakashs@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230928103623.216287-10-amitprakashs@marvell.com", "date": "2023-09-28T10:36:20", "name": "[v5,09/12] eventdev/dma: support for adapter stats", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "b3353223388619d5aad56c3d0eee449f2c113647", "submitter": { "id": 2699, "url": "http://patchwork.dpdk.org/api/people/2699/?format=api", "name": "Amit Prakash Shukla", "email": "amitprakashs@marvell.com" }, "delegate": { "id": 310, "url": "http://patchwork.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230928103623.216287-10-amitprakashs@marvell.com/mbox/", "series": [ { "id": 29677, "url": "http://patchwork.dpdk.org/api/series/29677/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=29677", "date": "2023-09-28T10:36:11", "name": "event DMA adapter library support", "version": 5, "mbox": "http://patchwork.dpdk.org/series/29677/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/132129/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/132129/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 5A17042660;\n\tThu, 28 Sep 2023 12:38:21 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 4C91F40EDB;\n\tThu, 28 Sep 2023 12:38:21 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id 29D9D40EAB\n for <dev@dpdk.org>; Thu, 28 Sep 2023 12:38:17 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 38SAAUIb022981; Thu, 28 Sep 2023 03:38:16 -0700", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3tcu1qthms-2\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Thu, 28 Sep 2023 03:38:12 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48;\n Thu, 28 Sep 2023 03:38:05 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend\n Transport; Thu, 28 Sep 2023 03:38:05 -0700", "from localhost.localdomain (unknown [10.28.36.157])\n by maili.marvell.com (Postfix) with ESMTP id 63BA55C68F2;\n Thu, 28 Sep 2023 03:38:01 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=Oni4O77r3aBqn2TFb+rqnhRKrtStu1eavoYijWZvCCU=;\n b=PxI8akLkCKwzi7SWBiYsxxyysSAnhLS2bSW0bBQKeXykIQHZfw46Rhv4UoaTywECG90H\n IVBkNquTWht7yw9QInDlQdMOj4Z/xuaXUcYOD25DXfHxfaKxcAzUw+2WUysMtrdyEIfv\n CzdtkbFwbP+gHWq7msjAve8mn1iVlhEJfHyQQ8X6YDadFSMOCih/Xw2FE5eLswlD8g6z\n IEy3sQ7qdlR3tPhSUlooraIN/SIhGHVdiGK+IXklZ5FOx3yVrEu9cAucSEN4ixt3dYNi\n FSgI+vH8dv1puXaxH8TM8Da6yk3DzU4pGOTnY3BV/fmFKAMR4foCep1pRz66eqgXyy3e 8A==", "From": "Amit Prakash Shukla <amitprakashs@marvell.com>", "To": "Amit Prakash Shukla <amitprakashs@marvell.com>, Jerin Jacob\n <jerinj@marvell.com>", "CC": "<dev@dpdk.org>, <fengchengwen@huawei.com>, <kevin.laatz@intel.com>,\n <bruce.richardson@intel.com>, <conor.walsh@intel.com>,\n <vattunuru@marvell.com>, <g.singh@nxp.com>,\n <sachin.saxena@oss.nxp.com>, <hemant.agrawal@nxp.com>,\n <cheng1.jiang@intel.com>, <ndabilpuram@marvell.com>,\n <anoobj@marvell.com>, <mb@smartsharesystems.com>", "Subject": "[PATCH v5 09/12] eventdev/dma: support for adapter stats", "Date": "Thu, 28 Sep 2023 16:06:20 +0530", "Message-ID": "<20230928103623.216287-10-amitprakashs@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20230928103623.216287-1-amitprakashs@marvell.com>", "References": "<20230926103233.3956431-1-amitprakashs@marvell.com>\n <20230928103623.216287-1-amitprakashs@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "K0ZHj8Xw1Jx5Ay1XbNb_v3EgNNH7fMjJ", "X-Proofpoint-ORIG-GUID": "K0ZHj8Xw1Jx5Ay1XbNb_v3EgNNH7fMjJ", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26\n definitions=2023-09-28_08,2023-09-28_01,2023-05-22_02", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Added DMA adapter stats API support to get and reset stats. DMA\nSW adapter stats and eventdev driver supported stats for enqueue\nand dequeue are reported by get API.\n\nSigned-off-by: Amit Prakash Shukla <amitprakashs@marvell.com>\n---\n lib/eventdev/rte_event_dma_adapter.c | 95 ++++++++++++++++++++++++++++\n 1 file changed, 95 insertions(+)", "diff": "diff --git a/lib/eventdev/rte_event_dma_adapter.c b/lib/eventdev/rte_event_dma_adapter.c\nindex 850b010712..842fb74734 100644\n--- a/lib/eventdev/rte_event_dma_adapter.c\n+++ b/lib/eventdev/rte_event_dma_adapter.c\n@@ -142,6 +142,9 @@ struct event_dma_adapter {\n \n \t/* Loop counter to flush dma ops */\n \tuint16_t transmit_loop_count;\n+\n+\t/* Per instance stats structure */\n+\tstruct rte_event_dma_adapter_stats dma_stats;\n } __rte_cache_aligned;\n \n static struct event_dma_adapter **event_dma_adapter;\n@@ -471,6 +474,7 @@ rte_event_dma_adapter_free(uint8_t id)\n static inline unsigned int\n edma_enq_to_dma_dev(struct event_dma_adapter *adapter, struct rte_event *ev, unsigned int cnt)\n {\n+\tstruct rte_event_dma_adapter_stats *stats = &adapter->dma_stats;\n \tstruct dma_vchan_info *vchan_qinfo = NULL;\n \tstruct rte_event_dma_adapter_op *dma_op;\n \tuint16_t vchan, nb_enqueued = 0;\n@@ -480,6 +484,7 @@ edma_enq_to_dma_dev(struct event_dma_adapter *adapter, struct rte_event *ev, uns\n \n \tret = 0;\n \tn = 0;\n+\tstats->event_deq_count += cnt;\n \n \tfor (i = 0; i < cnt; i++) {\n \t\tdma_op = ev[i].event_ptr;\n@@ -502,6 +507,7 @@ edma_enq_to_dma_dev(struct event_dma_adapter *adapter, struct rte_event *ev, uns\n \t\t\tret = edma_circular_buffer_flush_to_dma_dev(adapter, &vchan_qinfo->dma_buf,\n \t\t\t\t\t\t\t\t dma_dev_id, vchan,\n \t\t\t\t\t\t\t\t &nb_enqueued);\n+\t\t\tstats->dma_enq_count += nb_enqueued;\n \t\t\tn += nb_enqueued;\n \n \t\t\t/**\n@@ -548,6 +554,7 @@ edma_adapter_dev_flush(struct event_dma_adapter *adapter, int16_t dma_dev_id,\n static unsigned int\n edma_adapter_enq_flush(struct event_dma_adapter *adapter)\n {\n+\tstruct rte_event_dma_adapter_stats *stats = &adapter->dma_stats;\n \tint16_t dma_dev_id;\n \tuint16_t nb_enqueued = 0;\n \tuint16_t nb_ops_flushed = 0;\n@@ -562,6 +569,8 @@ edma_adapter_enq_flush(struct event_dma_adapter *adapter)\n \tif (!nb_ops_flushed)\n \t\tadapter->stop_enq_to_dma_dev = false;\n \n+\tstats->dma_enq_count += nb_enqueued;\n+\n \treturn nb_enqueued;\n }\n \n@@ -573,6 +582,7 @@ edma_adapter_enq_flush(struct event_dma_adapter *adapter)\n static int\n edma_adapter_enq_run(struct event_dma_adapter *adapter, unsigned int max_enq)\n {\n+\tstruct rte_event_dma_adapter_stats *stats = &adapter->dma_stats;\n \tuint8_t event_port_id = adapter->event_port_id;\n \tuint8_t event_dev_id = adapter->eventdev_id;\n \tstruct rte_event ev[DMA_BATCH_SIZE];\n@@ -592,6 +602,7 @@ edma_adapter_enq_run(struct event_dma_adapter *adapter, unsigned int max_enq)\n \t\t\t\tbreak;\n \t\t}\n \n+\t\tstats->event_poll_count++;\n \t\tn = rte_event_dequeue_burst(event_dev_id, event_port_id, ev, DMA_BATCH_SIZE, 0);\n \n \t\tif (!n)\n@@ -612,6 +623,7 @@ static inline uint16_t\n edma_ops_enqueue_burst(struct event_dma_adapter *adapter, struct rte_event_dma_adapter_op **ops,\n \t\t uint16_t num)\n {\n+\tstruct rte_event_dma_adapter_stats *stats = &adapter->dma_stats;\n \tuint8_t event_port_id = adapter->event_port_id;\n \tuint8_t event_dev_id = adapter->eventdev_id;\n \tstruct rte_event events[DMA_BATCH_SIZE];\n@@ -651,6 +663,10 @@ edma_ops_enqueue_burst(struct event_dma_adapter *adapter, struct rte_event_dma_a\n \n \t} while (retry++ < DMA_ADAPTER_MAX_EV_ENQ_RETRIES && nb_enqueued < nb_ev);\n \n+\tstats->event_enq_fail_count += nb_ev - nb_enqueued;\n+\tstats->event_enq_count += nb_enqueued;\n+\tstats->event_enq_retry_count += retry - 1;\n+\n \treturn nb_enqueued;\n }\n \n@@ -705,6 +721,7 @@ edma_ops_buffer_flush(struct event_dma_adapter *adapter)\n static inline unsigned int\n edma_adapter_deq_run(struct event_dma_adapter *adapter, unsigned int max_deq)\n {\n+\tstruct rte_event_dma_adapter_stats *stats = &adapter->dma_stats;\n \tstruct dma_vchan_info *vchan_info;\n \tstruct dma_ops_circular_buffer *tq_buf;\n \tstruct rte_event_dma_adapter_op *ops;\n@@ -742,6 +759,7 @@ edma_adapter_deq_run(struct event_dma_adapter *adapter, unsigned int max_deq)\n \t\t\t\t\tcontinue;\n \n \t\t\t\tdone = false;\n+\t\t\t\tstats->dma_deq_count += n;\n \n \t\t\t\ttq_buf = &dev_info->tqmap[vchan].dma_buf;\n \n@@ -1304,3 +1322,80 @@ rte_event_dma_adapter_runtime_params_get(uint8_t id,\n \n \treturn 0;\n }\n+\n+int\n+rte_event_dma_adapter_stats_get(uint8_t id, struct rte_event_dma_adapter_stats *stats)\n+{\n+\tstruct rte_event_dma_adapter_stats dev_stats_sum = {0};\n+\tstruct rte_event_dma_adapter_stats dev_stats;\n+\tstruct event_dma_adapter *adapter;\n+\tstruct dma_device_info *dev_info;\n+\tstruct rte_eventdev *dev;\n+\tuint16_t num_dma_dev;\n+\tuint32_t i;\n+\tint ret;\n+\n+\tEVENT_DMA_ADAPTER_ID_VALID_OR_ERR_RET(id, -EINVAL);\n+\n+\tadapter = edma_id_to_adapter(id);\n+\tif (adapter == NULL || stats == NULL)\n+\t\treturn -EINVAL;\n+\n+\tnum_dma_dev = rte_dma_count_avail();\n+\tdev = &rte_eventdevs[adapter->eventdev_id];\n+\tmemset(stats, 0, sizeof(*stats));\n+\tfor (i = 0; i < num_dma_dev; i++) {\n+\t\tdev_info = &adapter->dma_devs[i];\n+\n+\t\tif (dev_info->internal_event_port == 0 ||\n+\t\t dev->dev_ops->dma_adapter_stats_get == NULL)\n+\t\t\tcontinue;\n+\n+\t\tret = (*dev->dev_ops->dma_adapter_stats_get)(dev, i, &dev_stats);\n+\t\tif (ret)\n+\t\t\tcontinue;\n+\n+\t\tdev_stats_sum.dma_deq_count += dev_stats.dma_deq_count;\n+\t\tdev_stats_sum.event_enq_count += dev_stats.event_enq_count;\n+\t}\n+\n+\tif (adapter->service_initialized)\n+\t\t*stats = adapter->dma_stats;\n+\n+\tstats->dma_deq_count += dev_stats_sum.dma_deq_count;\n+\tstats->event_enq_count += dev_stats_sum.event_enq_count;\n+\n+\treturn 0;\n+}\n+\n+int\n+rte_event_dma_adapter_stats_reset(uint8_t id)\n+{\n+\tstruct event_dma_adapter *adapter;\n+\tstruct dma_device_info *dev_info;\n+\tstruct rte_eventdev *dev;\n+\tuint16_t num_dma_dev;\n+\tuint32_t i;\n+\n+\tEVENT_DMA_ADAPTER_ID_VALID_OR_ERR_RET(id, -EINVAL);\n+\n+\tadapter = edma_id_to_adapter(id);\n+\tif (adapter == NULL)\n+\t\treturn -EINVAL;\n+\n+\tnum_dma_dev = rte_dma_count_avail();\n+\tdev = &rte_eventdevs[adapter->eventdev_id];\n+\tfor (i = 0; i < num_dma_dev; i++) {\n+\t\tdev_info = &adapter->dma_devs[i];\n+\n+\t\tif (dev_info->internal_event_port == 0 ||\n+\t\t dev->dev_ops->dma_adapter_stats_reset == NULL)\n+\t\t\tcontinue;\n+\n+\t\t(*dev->dev_ops->dma_adapter_stats_reset)(dev, i);\n+\t}\n+\n+\tmemset(&adapter->dma_stats, 0, sizeof(adapter->dma_stats));\n+\n+\treturn 0;\n+}\n", "prefixes": [ "v5", "09/12" ] }