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{
    "id": 132230,
    "url": "http://patchwork.dpdk.org/api/patches/132230/?format=api",
    "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230929163516.3636499-10-nicolas.chautru@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patchwork.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20230929163516.3636499-10-nicolas.chautru@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20230929163516.3636499-10-nicolas.chautru@intel.com",
    "date": "2023-09-29T16:35:13",
    "name": "[v3,09/12] baseband/acc: add FFT support to VRB2 variant",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "059696283d54b805ce00d6e9f145a625910d8d4e",
    "submitter": {
        "id": 1314,
        "url": "http://patchwork.dpdk.org/api/people/1314/?format=api",
        "name": "Chautru, Nicolas",
        "email": "nicolas.chautru@intel.com"
    },
    "delegate": {
        "id": 2642,
        "url": "http://patchwork.dpdk.org/api/users/2642/?format=api",
        "username": "mcoquelin",
        "first_name": "Maxime",
        "last_name": "Coquelin",
        "email": "maxime.coquelin@redhat.com"
    },
    "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230929163516.3636499-10-nicolas.chautru@intel.com/mbox/",
    "series": [
        {
            "id": 29702,
            "url": "http://patchwork.dpdk.org/api/series/29702/?format=api",
            "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=29702",
            "date": "2023-09-29T16:35:04",
            "name": "VRB2 bbdev PMD introduction",
            "version": 3,
            "mbox": "http://patchwork.dpdk.org/series/29702/mbox/"
        }
    ],
    "comments": "http://patchwork.dpdk.org/api/patches/132230/comments/",
    "check": "success",
    "checks": "http://patchwork.dpdk.org/api/patches/132230/checks/",
    "tags": {},
    "related": [],
    "headers": {
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            "E=McAfee;i=\"6600,9927,10848\"; a=\"362584236\"",
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        ],
        "X-ExtLoop1": "1",
        "From": "Nicolas Chautru <nicolas.chautru@intel.com>",
        "To": "dev@dpdk.org,\n\tmaxime.coquelin@redhat.com",
        "Cc": "hemant.agrawal@nxp.com, david.marchand@redhat.com,\n hernan.vargas@intel.com,\n Nicolas Chautru <nicolas.chautru@intel.com>",
        "Subject": "[PATCH v3 09/12] baseband/acc: add FFT support to VRB2 variant",
        "Date": "Fri, 29 Sep 2023 16:35:13 +0000",
        "Message-Id": "<20230929163516.3636499-10-nicolas.chautru@intel.com>",
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        "In-Reply-To": "<20230929163516.3636499-1-nicolas.chautru@intel.com>",
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    },
    "content": "Support for the FFT the processing specific to the\nVRB2 variant.\n\nSigned-off-by: Nicolas Chautru <nicolas.chautru@intel.com>\n---\n drivers/baseband/acc/rte_vrb_pmd.c | 132 ++++++++++++++++++++++++++++-\n 1 file changed, 128 insertions(+), 4 deletions(-)",
    "diff": "diff --git a/drivers/baseband/acc/rte_vrb_pmd.c b/drivers/baseband/acc/rte_vrb_pmd.c\nindex 93add82947..ce4b90d8e7 100644\n--- a/drivers/baseband/acc/rte_vrb_pmd.c\n+++ b/drivers/baseband/acc/rte_vrb_pmd.c\n@@ -903,6 +903,9 @@ vrb_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,\n \t\t\tACC_FCW_LD_BLEN : (conf->op_type == RTE_BBDEV_OP_FFT ?\n \t\t\tACC_FCW_FFT_BLEN : ACC_FCW_MLDTS_BLEN))));\n \n+\tif ((q->d->device_variant == VRB2_VARIANT) && (conf->op_type == RTE_BBDEV_OP_FFT))\n+\t\tfcw_len = ACC_FCW_FFT_BLEN_3;\n+\n \tfor (desc_idx = 0; desc_idx < d->sw_ring_max_depth; desc_idx++) {\n \t\tdesc = q->ring_addr + desc_idx;\n \t\tdesc->req.word0 = ACC_DMA_DESC_TYPE;\n@@ -1323,6 +1326,24 @@ vrb_dev_info_get(struct rte_bbdev *dev, struct rte_bbdev_driver_info *dev_info)\n \t\t\t.num_buffers_soft_out = 0,\n \t\t\t}\n \t\t},\n+\t\t{\n+\t\t\t.type\t= RTE_BBDEV_OP_FFT,\n+\t\t\t.cap.fft = {\n+\t\t\t\t.capability_flags =\n+\t\t\t\t\t\tRTE_BBDEV_FFT_WINDOWING |\n+\t\t\t\t\t\tRTE_BBDEV_FFT_CS_ADJUSTMENT |\n+\t\t\t\t\t\tRTE_BBDEV_FFT_DFT_BYPASS |\n+\t\t\t\t\t\tRTE_BBDEV_FFT_IDFT_BYPASS |\n+\t\t\t\t\t\tRTE_BBDEV_FFT_FP16_INPUT |\n+\t\t\t\t\t\tRTE_BBDEV_FFT_FP16_OUTPUT |\n+\t\t\t\t\t\tRTE_BBDEV_FFT_POWER_MEAS |\n+\t\t\t\t\t\tRTE_BBDEV_FFT_WINDOWING_BYPASS,\n+\t\t\t\t.num_buffers_src =\n+\t\t\t\t\t\t1,\n+\t\t\t\t.num_buffers_dst =\n+\t\t\t\t\t\t1,\n+\t\t\t}\n+\t\t},\n \t\tRTE_BBDEV_END_OF_CAPABILITIES_LIST()\n \t};\n \n@@ -3849,6 +3870,47 @@ vrb1_fcw_fft_fill(struct rte_bbdev_fft_op *op, struct acc_fcw_fft *fcw)\n \t\tfcw->bypass = 0;\n }\n \n+/* Fill in a frame control word for FFT processing. */\n+static inline void\n+vrb2_fcw_fft_fill(struct rte_bbdev_fft_op *op, struct acc_fcw_fft_3 *fcw)\n+{\n+\tfcw->in_frame_size = op->fft.input_sequence_size;\n+\tfcw->leading_pad_size = op->fft.input_leading_padding;\n+\tfcw->out_frame_size = op->fft.output_sequence_size;\n+\tfcw->leading_depad_size = op->fft.output_leading_depadding;\n+\tfcw->cs_window_sel = op->fft.window_index[0] +\n+\t\t\t(op->fft.window_index[1] << 8) +\n+\t\t\t(op->fft.window_index[2] << 16) +\n+\t\t\t(op->fft.window_index[3] << 24);\n+\tfcw->cs_window_sel2 = op->fft.window_index[4] +\n+\t\t\t(op->fft.window_index[5] << 8);\n+\tfcw->cs_enable_bmap = op->fft.cs_bitmap;\n+\tfcw->num_antennas = op->fft.num_antennas_log2;\n+\tfcw->idft_size = op->fft.idft_log2;\n+\tfcw->dft_size = op->fft.dft_log2;\n+\tfcw->cs_offset = op->fft.cs_time_adjustment;\n+\tfcw->idft_shift = op->fft.idft_shift;\n+\tfcw->dft_shift = op->fft.dft_shift;\n+\tfcw->cs_multiplier = op->fft.ncs_reciprocal;\n+\tfcw->power_shift = op->fft.power_shift;\n+\tfcw->exp_adj = op->fft.fp16_exp_adjust;\n+\tfcw->fp16_in = check_bit(op->fft.op_flags, RTE_BBDEV_FFT_FP16_INPUT);\n+\tfcw->fp16_out = check_bit(op->fft.op_flags, RTE_BBDEV_FFT_FP16_OUTPUT);\n+\tfcw->power_en = check_bit(op->fft.op_flags, RTE_BBDEV_FFT_POWER_MEAS);\n+\tif (check_bit(op->fft.op_flags,\n+\t\t\tRTE_BBDEV_FFT_IDFT_BYPASS)) {\n+\t\tif (check_bit(op->fft.op_flags,\n+\t\t\t\tRTE_BBDEV_FFT_WINDOWING_BYPASS))\n+\t\t\tfcw->bypass = 2;\n+\t\telse\n+\t\t\tfcw->bypass = 1;\n+\t} else if (check_bit(op->fft.op_flags,\n+\t\t\tRTE_BBDEV_FFT_DFT_BYPASS))\n+\t\tfcw->bypass = 3;\n+\telse\n+\t\tfcw->bypass = 0;\n+}\n+\n static inline int\n vrb1_dma_desc_fft_fill(struct rte_bbdev_fft_op *op,\n \t\tstruct acc_dma_req_desc *desc,\n@@ -3882,6 +3944,58 @@ vrb1_dma_desc_fft_fill(struct rte_bbdev_fft_op *op,\n \treturn 0;\n }\n \n+static inline int\n+vrb2_dma_desc_fft_fill(struct rte_bbdev_fft_op *op,\n+\t\tstruct acc_dma_req_desc *desc,\n+\t\tstruct rte_mbuf *input, struct rte_mbuf *output, struct rte_mbuf *win_input,\n+\t\tstruct rte_mbuf *pwr, uint32_t *in_offset, uint32_t *out_offset,\n+\t\tuint32_t *win_offset, uint32_t *pwr_offset)\n+{\n+\tbool pwr_en = check_bit(op->fft.op_flags, RTE_BBDEV_FFT_POWER_MEAS);\n+\tbool win_en = check_bit(op->fft.op_flags, RTE_BBDEV_FFT_DEWINDOWING);\n+\tint num_cs = 0, i, bd_idx = 1;\n+\n+\t/* FCW already done */\n+\tacc_header_init(desc);\n+\n+\tRTE_SET_USED(win_input);\n+\tRTE_SET_USED(win_offset);\n+\n+\tdesc->data_ptrs[bd_idx].address = rte_pktmbuf_iova_offset(input, *in_offset);\n+\tdesc->data_ptrs[bd_idx].blen = op->fft.input_sequence_size * ACC_IQ_SIZE;\n+\tdesc->data_ptrs[bd_idx].blkid = ACC_DMA_BLKID_IN;\n+\tdesc->data_ptrs[bd_idx].last = 1;\n+\tdesc->data_ptrs[bd_idx].dma_ext = 0;\n+\tbd_idx++;\n+\n+\tdesc->data_ptrs[bd_idx].address = rte_pktmbuf_iova_offset(output, *out_offset);\n+\tdesc->data_ptrs[bd_idx].blen = op->fft.output_sequence_size * ACC_IQ_SIZE;\n+\tdesc->data_ptrs[bd_idx].blkid = ACC_DMA_BLKID_OUT_HARD;\n+\tdesc->data_ptrs[bd_idx].last = pwr_en ? 0 : 1;\n+\tdesc->data_ptrs[bd_idx].dma_ext = 0;\n+\tdesc->m2dlen = win_en ? 3 : 2;\n+\tdesc->d2mlen = pwr_en ? 2 : 1;\n+\tdesc->ib_ant_offset = op->fft.input_sequence_size;\n+\tdesc->num_ant = op->fft.num_antennas_log2 - 3;\n+\n+\tfor (i = 0; i < RTE_BBDEV_MAX_CS; i++)\n+\t\tif (check_bit(op->fft.cs_bitmap, 1 << i))\n+\t\t\tnum_cs++;\n+\tdesc->num_cs = num_cs;\n+\n+\tif (pwr_en && pwr) {\n+\t\tbd_idx++;\n+\t\tdesc->data_ptrs[bd_idx].address = rte_pktmbuf_iova_offset(pwr, *pwr_offset);\n+\t\tdesc->data_ptrs[bd_idx].blen = num_cs * (1 << op->fft.num_antennas_log2) * 4;\n+\t\tdesc->data_ptrs[bd_idx].blkid = ACC_DMA_BLKID_OUT_SOFT;\n+\t\tdesc->data_ptrs[bd_idx].last = 1;\n+\t\tdesc->data_ptrs[bd_idx].dma_ext = 0;\n+\t}\n+\tdesc->ob_cyc_offset = op->fft.output_sequence_size;\n+\tdesc->ob_ant_offset = op->fft.output_sequence_size * num_cs;\n+\tdesc->op_addr = op;\n+\treturn 0;\n+}\n \n /** Enqueue one FFT operation for device. */\n static inline int\n@@ -3889,22 +4003,32 @@ vrb_enqueue_fft_one_op(struct acc_queue *q, struct rte_bbdev_fft_op *op,\n \t\tuint16_t total_enqueued_cbs)\n {\n \tunion acc_dma_desc *desc;\n-\tstruct rte_mbuf *input, *output;\n-\tuint32_t in_offset, out_offset;\n+\tstruct rte_mbuf *input, *output, *pwr, *win;\n+\tuint32_t in_offset, out_offset, pwr_offset, win_offset;\n \tstruct acc_fcw_fft *fcw;\n \n \tdesc = acc_desc(q, total_enqueued_cbs);\n \tinput = op->fft.base_input.data;\n \toutput = op->fft.base_output.data;\n+\tpwr = op->fft.power_meas_output.data;\n+\twin = op->fft.dewindowing_input.data;\n \tin_offset = op->fft.base_input.offset;\n \tout_offset = op->fft.base_output.offset;\n+\tpwr_offset = op->fft.power_meas_output.offset;\n+\twin_offset = op->fft.dewindowing_input.offset;\n \n \tfcw = (struct acc_fcw_fft *) (q->fcw_ring +\n \t\t\t((q->sw_ring_head + total_enqueued_cbs) & q->sw_ring_wrap_mask)\n \t\t\t* ACC_MAX_FCW_SIZE);\n \n-\tvrb1_fcw_fft_fill(op, fcw);\n-\tvrb1_dma_desc_fft_fill(op, &desc->req, input, output, &in_offset, &out_offset);\n+\tif (q->d->device_variant == VRB1_VARIANT) {\n+\t\tvrb1_fcw_fft_fill(op, fcw);\n+\t\tvrb1_dma_desc_fft_fill(op, &desc->req, input, output, &in_offset, &out_offset);\n+\t} else {\n+\t\tvrb2_fcw_fft_fill(op, (struct acc_fcw_fft_3 *) fcw);\n+\t\tvrb2_dma_desc_fft_fill(op, &desc->req, input, output, win, pwr,\n+\t\t\t\t&in_offset, &out_offset, &win_offset, &pwr_offset);\n+\t}\n #ifdef RTE_LIBRTE_BBDEV_DEBUG\n \trte_memdump(stderr, \"FCW\", &desc->req.fcw_fft,\n \t\t\tsizeof(desc->req.fcw_fft));\n",
    "prefixes": [
        "v3",
        "09/12"
    ]
}