Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/132666/?format=api
{ "id": 132666, "url": "http://patchwork.dpdk.org/api/patches/132666/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/1697497745-20664-7-git-send-email-roretzla@linux.microsoft.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1697497745-20664-7-git-send-email-roretzla@linux.microsoft.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1697497745-20664-7-git-send-email-roretzla@linux.microsoft.com", "date": "2023-10-16T23:08:50", "name": "[06/21] eventdev: use rte optional stdatomic API", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "05009929867de6703d50477593c5174e764df933", "submitter": { "id": 2077, "url": "http://patchwork.dpdk.org/api/people/2077/?format=api", "name": "Tyler Retzlaff", "email": "roretzla@linux.microsoft.com" }, "delegate": { "id": 24651, "url": "http://patchwork.dpdk.org/api/users/24651/?format=api", "username": "dmarchand", "first_name": "David", "last_name": "Marchand", "email": "david.marchand@redhat.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/1697497745-20664-7-git-send-email-roretzla@linux.microsoft.com/mbox/", "series": [ { "id": 29858, "url": "http://patchwork.dpdk.org/api/series/29858/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=29858", "date": "2023-10-16T23:08:44", "name": "use rte optional stdatomic API", "version": 1, "mbox": "http://patchwork.dpdk.org/series/29858/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/132666/comments/", "check": "warning", "checks": "http://patchwork.dpdk.org/api/patches/132666/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id D6C0643183;\n\tTue, 17 Oct 2023 01:09:41 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id CA7B040ED8;\n\tTue, 17 Oct 2023 01:09:14 +0200 (CEST)", "from linux.microsoft.com (linux.microsoft.com [13.77.154.182])\n by mails.dpdk.org (Postfix) with ESMTP id 55CD740DD8\n for <dev@dpdk.org>; Tue, 17 Oct 2023 01:09:08 +0200 (CEST)", "by linux.microsoft.com (Postfix, from userid 1086)\n id 182C020B74C6; Mon, 16 Oct 2023 16:09:06 -0700 (PDT)" ], "DKIM-Filter": "OpenDKIM Filter v2.11.0 linux.microsoft.com 182C020B74C6", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com;\n s=default; t=1697497747;\n bh=6TCazu4nINp4uXdppc0ZvaHRmnXfksv/v+GKN6FJ6kU=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=DYDSkLjJqdKYcgz/nNzO/8thyrBYEKB4lvpnFVaWSeXTaad4zzZlJx+j7LhuyBBYn\n guAn5KTElpN5qfd/E/yGqHoWXd5Fd5vhw5irc+MheqPuuJpWR79AAyiK4e4sQ+GNdB\n HhLveqTc5Kx/dg6LYDOld0VnQGCJj83R97NNFk4k=", "From": "Tyler Retzlaff <roretzla@linux.microsoft.com>", "To": "dev@dpdk.org", "Cc": "Akhil Goyal <gakhil@marvell.com>,\n Anatoly Burakov <anatoly.burakov@intel.com>,\n Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>,\n Bruce Richardson <bruce.richardson@intel.com>,\n Chenbo Xia <chenbo.xia@intel.com>, Ciara Power <ciara.power@intel.com>,\n David Christensen <drc@linux.vnet.ibm.com>,\n David Hunt <david.hunt@intel.com>,\n Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>,\n Dmitry Malloy <dmitrym@microsoft.com>,\n Elena Agostini <eagostini@nvidia.com>,\n Erik Gabriel Carrillo <erik.g.carrillo@intel.com>,\n Fan Zhang <fanzhang.oss@gmail.com>, Ferruh Yigit <ferruh.yigit@amd.com>,\n Harman Kalra <hkalra@marvell.com>,\n Harry van Haaren <harry.van.haaren@intel.com>,\n Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>,\n Jerin Jacob <jerinj@marvell.com>,\n Konstantin Ananyev <konstantin.v.ananyev@yandex.ru>,\n Matan Azrad <matan@nvidia.com>,\n Maxime Coquelin <maxime.coquelin@redhat.com>,\n Narcisa Ana Maria Vasile <navasile@linux.microsoft.com>,\n Nicolas Chautru <nicolas.chautru@intel.com>,\n Olivier Matz <olivier.matz@6wind.com>, Ori Kam <orika@nvidia.com>,\n Pallavi Kadam <pallavi.kadam@intel.com>,\n Pavan Nikhilesh <pbhagavatula@marvell.com>,\n Reshma Pattan <reshma.pattan@intel.com>,\n Sameh Gobriel <sameh.gobriel@intel.com>,\n Shijith Thotton <sthotton@marvell.com>,\n Sivaprasad Tummala <sivaprasad.tummala@amd.com>,\n Stephen Hemminger <stephen@networkplumber.org>,\n Suanming Mou <suanmingm@nvidia.com>, Sunil Kumar Kori <skori@marvell.com>,\n Thomas Monjalon <thomas@monjalon.net>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>,\n Vladimir Medvedkin <vladimir.medvedkin@intel.com>,\n Yipeng Wang <yipeng1.wang@intel.com>,\n Tyler Retzlaff <roretzla@linux.microsoft.com>", "Subject": "[PATCH 06/21] eventdev: use rte optional stdatomic API", "Date": "Mon, 16 Oct 2023 16:08:50 -0700", "Message-Id": "<1697497745-20664-7-git-send-email-roretzla@linux.microsoft.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1697497745-20664-1-git-send-email-roretzla@linux.microsoft.com>", "References": "<1697497745-20664-1-git-send-email-roretzla@linux.microsoft.com>", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Replace the use of gcc builtin __atomic_xxx intrinsics with\ncorresponding rte_atomic_xxx optional stdatomic API\n\nSigned-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>\n---\n drivers/event/cnxk/cnxk_tim_worker.h | 4 +--\n lib/eventdev/rte_event_timer_adapter.c | 66 +++++++++++++++++-----------------\n lib/eventdev/rte_event_timer_adapter.h | 2 +-\n 3 files changed, 36 insertions(+), 36 deletions(-)", "diff": "diff --git a/drivers/event/cnxk/cnxk_tim_worker.h b/drivers/event/cnxk/cnxk_tim_worker.h\nindex f0857f2..f530d8c 100644\n--- a/drivers/event/cnxk/cnxk_tim_worker.h\n+++ b/drivers/event/cnxk/cnxk_tim_worker.h\n@@ -314,7 +314,7 @@\n \n \ttim->impl_opaque[0] = (uintptr_t)chunk;\n \ttim->impl_opaque[1] = (uintptr_t)bkt;\n-\t__atomic_store_n(&tim->state, RTE_EVENT_TIMER_ARMED, __ATOMIC_RELEASE);\n+\trte_atomic_store_explicit(&tim->state, RTE_EVENT_TIMER_ARMED, rte_memory_order_release);\n \tcnxk_tim_bkt_inc_nent(bkt);\n \tcnxk_tim_bkt_dec_lock_relaxed(bkt);\n \n@@ -425,7 +425,7 @@\n \n \ttim->impl_opaque[0] = (uintptr_t)chunk;\n \ttim->impl_opaque[1] = (uintptr_t)bkt;\n-\t__atomic_store_n(&tim->state, RTE_EVENT_TIMER_ARMED, __ATOMIC_RELEASE);\n+\trte_atomic_store_explicit(&tim->state, RTE_EVENT_TIMER_ARMED, rte_memory_order_release);\n \tcnxk_tim_bkt_inc_nent(bkt);\n \tcnxk_tim_bkt_dec_lock_relaxed(bkt);\n \ndiff --git a/lib/eventdev/rte_event_timer_adapter.c b/lib/eventdev/rte_event_timer_adapter.c\nindex 427c4c6..2746670 100644\n--- a/lib/eventdev/rte_event_timer_adapter.c\n+++ b/lib/eventdev/rte_event_timer_adapter.c\n@@ -630,12 +630,12 @@ struct swtim {\n \tuint32_t timer_data_id;\n \t/* Track which cores have actually armed a timer */\n \tstruct {\n-\t\tuint16_t v;\n+\t\tRTE_ATOMIC(uint16_t) v;\n \t} __rte_cache_aligned in_use[RTE_MAX_LCORE];\n \t/* Track which cores' timer lists should be polled */\n-\tunsigned int poll_lcores[RTE_MAX_LCORE];\n+\tRTE_ATOMIC(unsigned int) poll_lcores[RTE_MAX_LCORE];\n \t/* The number of lists that should be polled */\n-\tint n_poll_lcores;\n+\tRTE_ATOMIC(int) n_poll_lcores;\n \t/* Timers which have expired and can be returned to a mempool */\n \tstruct rte_timer *expired_timers[EXP_TIM_BUF_SZ];\n \t/* The number of timers that can be returned to a mempool */\n@@ -669,10 +669,10 @@ struct swtim {\n \n \tif (unlikely(sw->in_use[lcore].v == 0)) {\n \t\tsw->in_use[lcore].v = 1;\n-\t\tn_lcores = __atomic_fetch_add(&sw->n_poll_lcores, 1,\n-\t\t\t\t\t __ATOMIC_RELAXED);\n-\t\t__atomic_store_n(&sw->poll_lcores[n_lcores], lcore,\n-\t\t\t\t__ATOMIC_RELAXED);\n+\t\tn_lcores = rte_atomic_fetch_add_explicit(&sw->n_poll_lcores, 1,\n+\t\t\t\t\t rte_memory_order_relaxed);\n+\t\trte_atomic_store_explicit(&sw->poll_lcores[n_lcores], lcore,\n+\t\t\t\trte_memory_order_relaxed);\n \t}\n \n \tret = event_buffer_add(&sw->buffer, &evtim->ev);\n@@ -719,8 +719,8 @@ struct swtim {\n \t\tsw->stats.evtim_exp_count++;\n \n \t\tif (type == SINGLE)\n-\t\t\t__atomic_store_n(&evtim->state, RTE_EVENT_TIMER_NOT_ARMED,\n-\t\t\t\t__ATOMIC_RELEASE);\n+\t\t\trte_atomic_store_explicit(&evtim->state, RTE_EVENT_TIMER_NOT_ARMED,\n+\t\t\t\trte_memory_order_release);\n \t}\n \n \tif (event_buffer_batch_ready(&sw->buffer)) {\n@@ -846,7 +846,7 @@ struct swtim {\n \n \tif (swtim_did_tick(sw)) {\n \t\trte_timer_alt_manage(sw->timer_data_id,\n-\t\t\t\t sw->poll_lcores,\n+\t\t\t\t (unsigned int *)(uintptr_t)sw->poll_lcores,\n \t\t\t\t sw->n_poll_lcores,\n \t\t\t\t swtim_callback);\n \n@@ -1027,7 +1027,7 @@ struct swtim {\n \n \t/* Free outstanding timers */\n \trte_timer_stop_all(sw->timer_data_id,\n-\t\t\t sw->poll_lcores,\n+\t\t\t (unsigned int *)(uintptr_t)sw->poll_lcores,\n \t\t\t sw->n_poll_lcores,\n \t\t\t swtim_free_tim,\n \t\t\t sw);\n@@ -1142,7 +1142,7 @@ struct swtim {\n \tuint64_t cur_cycles;\n \n \t/* Check that timer is armed */\n-\tn_state = __atomic_load_n(&evtim->state, __ATOMIC_ACQUIRE);\n+\tn_state = rte_atomic_load_explicit(&evtim->state, rte_memory_order_acquire);\n \tif (n_state != RTE_EVENT_TIMER_ARMED)\n \t\treturn -EINVAL;\n \n@@ -1201,15 +1201,15 @@ struct swtim {\n \t * The atomic compare-and-swap operation can prevent the race condition\n \t * on in_use flag between multiple non-EAL threads.\n \t */\n-\tif (unlikely(__atomic_compare_exchange_n(&sw->in_use[lcore_id].v,\n-\t\t\t&exp_state, 1, 0,\n-\t\t\t__ATOMIC_RELAXED, __ATOMIC_RELAXED))) {\n+\tif (unlikely(rte_atomic_compare_exchange_strong_explicit(&sw->in_use[lcore_id].v,\n+\t\t\t&exp_state, 1,\n+\t\t\trte_memory_order_relaxed, rte_memory_order_relaxed))) {\n \t\tEVTIM_LOG_DBG(\"Adding lcore id = %u to list of lcores to poll\",\n \t\t\t lcore_id);\n-\t\tn_lcores = __atomic_fetch_add(&sw->n_poll_lcores, 1,\n-\t\t\t\t\t __ATOMIC_RELAXED);\n-\t\t__atomic_store_n(&sw->poll_lcores[n_lcores], lcore_id,\n-\t\t\t\t__ATOMIC_RELAXED);\n+\t\tn_lcores = rte_atomic_fetch_add_explicit(&sw->n_poll_lcores, 1,\n+\t\t\t\t\t rte_memory_order_relaxed);\n+\t\trte_atomic_store_explicit(&sw->poll_lcores[n_lcores], lcore_id,\n+\t\t\t\trte_memory_order_relaxed);\n \t}\n \n \tret = rte_mempool_get_bulk(sw->tim_pool, (void **)tims,\n@@ -1223,7 +1223,7 @@ struct swtim {\n \ttype = get_timer_type(adapter);\n \n \tfor (i = 0; i < nb_evtims; i++) {\n-\t\tn_state = __atomic_load_n(&evtims[i]->state, __ATOMIC_ACQUIRE);\n+\t\tn_state = rte_atomic_load_explicit(&evtims[i]->state, rte_memory_order_acquire);\n \t\tif (n_state == RTE_EVENT_TIMER_ARMED) {\n \t\t\trte_errno = EALREADY;\n \t\t\tbreak;\n@@ -1235,9 +1235,9 @@ struct swtim {\n \n \t\tif (unlikely(check_destination_event_queue(evtims[i],\n \t\t\t\t\t\t\t adapter) < 0)) {\n-\t\t\t__atomic_store_n(&evtims[i]->state,\n+\t\t\trte_atomic_store_explicit(&evtims[i]->state,\n \t\t\t\t\tRTE_EVENT_TIMER_ERROR,\n-\t\t\t\t\t__ATOMIC_RELAXED);\n+\t\t\t\t\trte_memory_order_relaxed);\n \t\t\trte_errno = EINVAL;\n \t\t\tbreak;\n \t\t}\n@@ -1250,15 +1250,15 @@ struct swtim {\n \n \t\tret = get_timeout_cycles(evtims[i], adapter, &cycles);\n \t\tif (unlikely(ret == -1)) {\n-\t\t\t__atomic_store_n(&evtims[i]->state,\n+\t\t\trte_atomic_store_explicit(&evtims[i]->state,\n \t\t\t\t\tRTE_EVENT_TIMER_ERROR_TOOLATE,\n-\t\t\t\t\t__ATOMIC_RELAXED);\n+\t\t\t\t\trte_memory_order_relaxed);\n \t\t\trte_errno = EINVAL;\n \t\t\tbreak;\n \t\t} else if (unlikely(ret == -2)) {\n-\t\t\t__atomic_store_n(&evtims[i]->state,\n+\t\t\trte_atomic_store_explicit(&evtims[i]->state,\n \t\t\t\t\tRTE_EVENT_TIMER_ERROR_TOOEARLY,\n-\t\t\t\t\t__ATOMIC_RELAXED);\n+\t\t\t\t\trte_memory_order_relaxed);\n \t\t\trte_errno = EINVAL;\n \t\t\tbreak;\n \t\t}\n@@ -1267,9 +1267,9 @@ struct swtim {\n \t\t\t\t\t type, lcore_id, NULL, evtims[i]);\n \t\tif (ret < 0) {\n \t\t\t/* tim was in RUNNING or CONFIG state */\n-\t\t\t__atomic_store_n(&evtims[i]->state,\n+\t\t\trte_atomic_store_explicit(&evtims[i]->state,\n \t\t\t\t\tRTE_EVENT_TIMER_ERROR,\n-\t\t\t\t\t__ATOMIC_RELEASE);\n+\t\t\t\t\trte_memory_order_release);\n \t\t\tbreak;\n \t\t}\n \n@@ -1277,8 +1277,8 @@ struct swtim {\n \t\t/* RELEASE ordering guarantees the adapter specific value\n \t\t * changes observed before the update of state.\n \t\t */\n-\t\t__atomic_store_n(&evtims[i]->state, RTE_EVENT_TIMER_ARMED,\n-\t\t\t\t__ATOMIC_RELEASE);\n+\t\trte_atomic_store_explicit(&evtims[i]->state, RTE_EVENT_TIMER_ARMED,\n+\t\t\t\trte_memory_order_release);\n \t}\n \n \tif (i < nb_evtims)\n@@ -1320,7 +1320,7 @@ struct swtim {\n \t\t/* ACQUIRE ordering guarantees the access of implementation\n \t\t * specific opaque data under the correct state.\n \t\t */\n-\t\tn_state = __atomic_load_n(&evtims[i]->state, __ATOMIC_ACQUIRE);\n+\t\tn_state = rte_atomic_load_explicit(&evtims[i]->state, rte_memory_order_acquire);\n \t\tif (n_state == RTE_EVENT_TIMER_CANCELED) {\n \t\t\trte_errno = EALREADY;\n \t\t\tbreak;\n@@ -1346,8 +1346,8 @@ struct swtim {\n \t\t * to make sure the state update data observed between\n \t\t * threads.\n \t\t */\n-\t\t__atomic_store_n(&evtims[i]->state, RTE_EVENT_TIMER_CANCELED,\n-\t\t\t\t__ATOMIC_RELEASE);\n+\t\trte_atomic_store_explicit(&evtims[i]->state, RTE_EVENT_TIMER_CANCELED,\n+\t\t\t\trte_memory_order_release);\n \t}\n \n \treturn i;\ndiff --git a/lib/eventdev/rte_event_timer_adapter.h b/lib/eventdev/rte_event_timer_adapter.h\nindex fbdddf8..49e646a 100644\n--- a/lib/eventdev/rte_event_timer_adapter.h\n+++ b/lib/eventdev/rte_event_timer_adapter.h\n@@ -498,7 +498,7 @@ struct rte_event_timer {\n \t * implementation specific values to share between the arm and cancel\n \t * operations. The application should not modify this field.\n \t */\n-\tenum rte_event_timer_state state;\n+\tRTE_ATOMIC(enum rte_event_timer_state) state;\n \t/**< State of the event timer. */\n \tuint8_t user_meta[];\n \t/**< Memory to store user specific metadata.\n", "prefixes": [ "06/21" ] }