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GET /api/patches/132712/?format=api
{ "id": 132712, "url": "http://patchwork.dpdk.org/api/patches/132712/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20231017054545.1692509-23-chaoyong.he@corigine.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20231017054545.1692509-23-chaoyong.he@corigine.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20231017054545.1692509-23-chaoyong.he@corigine.com", "date": "2023-10-17T05:45:42", "name": "[22/25] drivers: add the datapath update logic", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "f5d7a4dc17c578290c9701c1cdbeae8152115e76", "submitter": { "id": 2554, "url": "http://patchwork.dpdk.org/api/people/2554/?format=api", "name": "Chaoyong He", "email": "chaoyong.he@corigine.com" }, "delegate": { "id": 319, "url": "http://patchwork.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20231017054545.1692509-23-chaoyong.he@corigine.com/mbox/", "series": [ { "id": 29865, "url": "http://patchwork.dpdk.org/api/series/29865/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=29865", "date": "2023-10-17T05:45:20", "name": "add the NFP vDPA PMD", "version": 1, "mbox": "http://patchwork.dpdk.org/series/29865/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/132712/comments/", "check": "warning", "checks": "http://patchwork.dpdk.org/api/patches/132712/checks/", "tags": {}, "related": [], "headers": { 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"Authentication-Results": "dkim=none (message not signed)\n header.d=none;dmarc=none action=none header.from=corigine.com;", "From": "Chaoyong He <chaoyong.he@corigine.com>", "To": "dev@dpdk.org", "Cc": "oss-drivers@corigine.com, Chaoyong He <chaoyong.he@corigine.com>,\n Shujing Dong <shujing.dong@corigine.com>, Long Wu <long.wu@corigine.com>,\n Peng Zhang <peng.zhang@corigine.com>", "Subject": "[PATCH 22/25] drivers: add the datapath update logic", "Date": "Tue, 17 Oct 2023 13:45:42 +0800", "Message-Id": "<20231017054545.1692509-23-chaoyong.he@corigine.com>", "X-Mailer": "git-send-email 2.39.1", "In-Reply-To": "<20231017054545.1692509-1-chaoyong.he@corigine.com>", "References": "<20231017054545.1692509-1-chaoyong.he@corigine.com>", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-ClientProxiedBy": "PH7PR17CA0069.namprd17.prod.outlook.com\n (2603:10b6:510:325::29) To PH0PR13MB5568.namprd13.prod.outlook.com\n (2603:10b6:510:12b::16)", "MIME-Version": "1.0", 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"X-OriginatorOrg": "corigine.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 17daa154-f500-4578-fa4e-08dbced48552", "X-MS-Exchange-CrossTenant-AuthSource": "PH0PR13MB5568.namprd13.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "17 Oct 2023 05:47:19.1407 (UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "fe128f2c-073b-4c20-818e-7246a585940c", "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED", "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n zYf04xkJ4z7+VMCgPiHppgJD9gdRoTd14Ka2Qr9/I/WHobXJE2YCHPzocibXnw1Y6j3HshJw+dmHULZDirS7+RssjPKqcL54Uh5rR8JWqMw=", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "SJ0PR13MB5272", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Add the vDPA datapath update logic.\n\nSigned-off-by: Chaoyong He <chaoyong.he@corigine.com>\nSigned-off-by: Shujing Dong <shujing.dong@corigine.com>\nReviewed-by: Long Wu <long.wu@corigine.com>\nReviewed-by: Peng Zhang <peng.zhang@corigine.com>\n---\n drivers/common/nfp/nfp_common_ctrl.h | 1 +\n drivers/vdpa/nfp/nfp_vdpa.c | 315 +++++++++++++++++++++++++++\n drivers/vdpa/nfp/nfp_vdpa_core.c | 78 +++++++\n drivers/vdpa/nfp/nfp_vdpa_core.h | 15 ++\n 4 files changed, 409 insertions(+)", "diff": "diff --git a/drivers/common/nfp/nfp_common_ctrl.h b/drivers/common/nfp/nfp_common_ctrl.h\nindex 3c8cd916cf..f92ce50fc0 100644\n--- a/drivers/common/nfp/nfp_common_ctrl.h\n+++ b/drivers/common/nfp/nfp_common_ctrl.h\n@@ -238,6 +238,7 @@ struct nfp_net_fw_ver {\n #define NFP_NET_CFG_CTRL_IPSEC (0x1 << 1) /**< IPsec offload */\n #define NFP_NET_CFG_CTRL_IPSEC_SM_LOOKUP (0x1 << 3) /**< SA short match lookup */\n #define NFP_NET_CFG_CTRL_IPSEC_LM_LOOKUP (0x1 << 4) /**< SA long match lookup */\n+#define NFP_NET_CFG_CTRL_IN_ORDER (0x1 << 11) /**< Virtio in-order flag */\n \n #define NFP_NET_CFG_CAP_WORD1 0x00a4\n \ndiff --git a/drivers/vdpa/nfp/nfp_vdpa.c b/drivers/vdpa/nfp/nfp_vdpa.c\nindex 00d8f7e007..465ee4841d 100644\n--- a/drivers/vdpa/nfp/nfp_vdpa.c\n+++ b/drivers/vdpa/nfp/nfp_vdpa.c\n@@ -4,6 +4,7 @@\n */\n \n #include <pthread.h>\n+#include <sys/ioctl.h>\n \n #include <nfp_common_pci.h>\n #include <nfp_dev.h>\n@@ -15,6 +16,9 @@\n \n #define NFP_VDPA_DRIVER_NAME nfp_vdpa\n \n+#define MSIX_IRQ_SET_BUF_LEN (sizeof(struct vfio_irq_set) + \\\n+\t\tsizeof(int) * (NFP_VDPA_MAX_QUEUES * 2 + 1))\n+\n struct nfp_vdpa_dev {\n \tstruct rte_pci_device *pci_dev;\n \tstruct rte_vdpa_device *vdev;\n@@ -25,7 +29,15 @@ struct nfp_vdpa_dev {\n \tint vfio_dev_fd;\n \tint iommu_group;\n \n+\tint vid;\n \tuint16_t max_queues;\n+\tuint32_t started;\n+\tuint32_t dev_attached;\n+\tuint32_t running;\n+\trte_spinlock_t lock;\n+\n+\t/** Eventfd for used ring interrupt */\n+\tint intr_fd[NFP_VDPA_MAX_QUEUES * 2];\n };\n \n struct nfp_vdpa_dev_node {\n@@ -112,6 +124,302 @@ nfp_vdpa_vfio_teardown(struct nfp_vdpa_dev *device)\n \trte_vfio_container_destroy(device->vfio_container_fd);\n }\n \n+static int\n+nfp_vdpa_dma_do_unmap(struct rte_vhost_memory *mem,\n+\t\tuint32_t times,\n+\t\tint vfio_container_fd)\n+{\n+\tuint32_t i;\n+\tint ret = 0;\n+\tstruct rte_vhost_mem_region *region;\n+\n+\tfor (i = 0; i < times; i++) {\n+\t\tregion = &mem->regions[i];\n+\n+\t\tret = rte_vfio_container_dma_unmap(vfio_container_fd,\n+\t\t\t\tregion->host_user_addr, region->guest_phys_addr,\n+\t\t\t\tregion->size);\n+\t\tif (ret < 0) {\n+\t\t\t/* Here should not return, even error happened. */\n+\t\t\tDRV_VDPA_LOG(ERR, \"DMA unmap failed. Times: %u\", i);\n+\t\t}\n+\t}\n+\n+\treturn ret;\n+}\n+\n+static int\n+nfp_vdpa_dma_do_map(struct rte_vhost_memory *mem,\n+\t\tuint32_t times,\n+\t\tint vfio_container_fd)\n+{\n+\tint ret;\n+\tuint32_t i;\n+\tstruct rte_vhost_mem_region *region;\n+\n+\tfor (i = 0; i < times; i++) {\n+\t\tregion = &mem->regions[i];\n+\n+\t\tret = rte_vfio_container_dma_map(vfio_container_fd,\n+\t\t\t\tregion->host_user_addr, region->guest_phys_addr,\n+\t\t\t\tregion->size);\n+\t\tif (ret < 0) {\n+\t\t\tDRV_VDPA_LOG(ERR, \"DMA map failed.\");\n+\t\t\tnfp_vdpa_dma_do_unmap(mem, i, vfio_container_fd);\n+\t\t\treturn ret;\n+\t\t}\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static int\n+nfp_vdpa_dma_map(struct nfp_vdpa_dev *device,\n+\t\tbool do_map)\n+{\n+\tint ret;\n+\tint vfio_container_fd;\n+\tstruct rte_vhost_memory *mem = NULL;\n+\n+\tret = rte_vhost_get_mem_table(device->vid, &mem);\n+\tif (ret < 0) {\n+\t\tDRV_VDPA_LOG(ERR, \"Failed to get memory layout.\");\n+\t\treturn ret;\n+\t}\n+\n+\tvfio_container_fd = device->vfio_container_fd;\n+\tDRV_VDPA_LOG(DEBUG, \"vfio_container_fd %d\", vfio_container_fd);\n+\n+\tif (do_map)\n+\t\tret = nfp_vdpa_dma_do_map(mem, mem->nregions, vfio_container_fd);\n+\telse\n+\t\tret = nfp_vdpa_dma_do_unmap(mem, mem->nregions, vfio_container_fd);\n+\n+\tfree(mem);\n+\n+\treturn ret;\n+}\n+\n+static uint64_t\n+nfp_vdpa_qva_to_gpa(int vid,\n+\t\tuint64_t qva)\n+{\n+\tint ret;\n+\tuint32_t i;\n+\tuint64_t gpa = 0;\n+\tstruct rte_vhost_memory *mem = NULL;\n+\tstruct rte_vhost_mem_region *region;\n+\n+\tret = rte_vhost_get_mem_table(vid, &mem);\n+\tif (ret < 0) {\n+\t\tDRV_VDPA_LOG(ERR, \"Failed to get memory layout.\");\n+\t\treturn gpa;\n+\t}\n+\n+\tfor (i = 0; i < mem->nregions; i++) {\n+\t\tregion = &mem->regions[i];\n+\n+\t\tif (qva >= region->host_user_addr &&\n+\t\t\t\tqva < region->host_user_addr + region->size) {\n+\t\t\tgpa = qva - region->host_user_addr + region->guest_phys_addr;\n+\t\t\tbreak;\n+\t\t}\n+\t}\n+\n+\tfree(mem);\n+\n+\treturn gpa;\n+}\n+\n+static int\n+nfp_vdpa_start(struct nfp_vdpa_dev *device)\n+{\n+\tint ret;\n+\tint vid;\n+\tuint16_t i;\n+\tuint64_t gpa;\n+\tstruct rte_vhost_vring vring;\n+\tstruct nfp_vdpa_hw *vdpa_hw = &device->hw;\n+\n+\tvid = device->vid;\n+\tvdpa_hw->nr_vring = rte_vhost_get_vring_num(vid);\n+\n+\tret = rte_vhost_get_negotiated_features(vid, &vdpa_hw->req_features);\n+\tif (ret != 0)\n+\t\treturn ret;\n+\n+\tfor (i = 0; i < vdpa_hw->nr_vring; i++) {\n+\t\tret = rte_vhost_get_vhost_vring(vid, i, &vring);\n+\t\tif (ret != 0)\n+\t\t\treturn ret;\n+\n+\t\tgpa = nfp_vdpa_qva_to_gpa(vid, (uint64_t)(uintptr_t)vring.desc);\n+\t\tif (gpa == 0) {\n+\t\t\tDRV_VDPA_LOG(ERR, \"Fail to get GPA for descriptor ring.\");\n+\t\t\treturn -1;\n+\t\t}\n+\n+\t\tvdpa_hw->vring[i].desc = gpa;\n+\n+\t\tgpa = nfp_vdpa_qva_to_gpa(vid, (uint64_t)(uintptr_t)vring.avail);\n+\t\tif (gpa == 0) {\n+\t\t\tDRV_VDPA_LOG(ERR, \"Fail to get GPA for available ring.\");\n+\t\t\treturn -1;\n+\t\t}\n+\n+\t\tvdpa_hw->vring[i].avail = gpa;\n+\n+\t\tgpa = nfp_vdpa_qva_to_gpa(vid, (uint64_t)(uintptr_t)vring.used);\n+\t\tif (gpa == 0) {\n+\t\t\tDRV_VDPA_LOG(ERR, \"Fail to get GPA for used ring.\");\n+\t\t\treturn -1;\n+\t\t}\n+\n+\t\tvdpa_hw->vring[i].used = gpa;\n+\n+\t\tvdpa_hw->vring[i].size = vring.size;\n+\n+\t\tret = rte_vhost_get_vring_base(vid, i,\n+\t\t\t\t&vdpa_hw->vring[i].last_avail_idx,\n+\t\t\t\t&vdpa_hw->vring[i].last_used_idx);\n+\t\tif (ret != 0)\n+\t\t\treturn ret;\n+\t}\n+\n+\treturn nfp_vdpa_hw_start(&device->hw, vid);\n+}\n+\n+static void\n+nfp_vdpa_stop(struct nfp_vdpa_dev *device)\n+{\n+\tint vid;\n+\tuint32_t i;\n+\tstruct nfp_vdpa_hw *vdpa_hw = &device->hw;\n+\n+\tnfp_vdpa_hw_stop(vdpa_hw);\n+\n+\tvid = device->vid;\n+\tfor (i = 0; i < vdpa_hw->nr_vring; i++)\n+\t\trte_vhost_set_vring_base(vid, i,\n+\t\t\t\tvdpa_hw->vring[i].last_avail_idx,\n+\t\t\t\tvdpa_hw->vring[i].last_used_idx);\n+}\n+\n+static int\n+nfp_vdpa_enable_vfio_intr(struct nfp_vdpa_dev *device)\n+{\n+\tint ret;\n+\tuint16_t i;\n+\tint *fd_ptr;\n+\tuint16_t nr_vring;\n+\tstruct vfio_irq_set *irq_set;\n+\tstruct rte_vhost_vring vring;\n+\tchar irq_set_buf[MSIX_IRQ_SET_BUF_LEN];\n+\n+\tnr_vring = rte_vhost_get_vring_num(device->vid);\n+\n+\tirq_set = (struct vfio_irq_set *)irq_set_buf;\n+\tirq_set->argsz = sizeof(irq_set_buf);\n+\tirq_set->count = nr_vring + 1;\n+\tirq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER;\n+\tirq_set->index = VFIO_PCI_MSIX_IRQ_INDEX;\n+\tirq_set->start = 0;\n+\n+\tfd_ptr = (int *)&irq_set->data;\n+\tfd_ptr[RTE_INTR_VEC_ZERO_OFFSET] = rte_intr_fd_get(device->pci_dev->intr_handle);\n+\n+\tfor (i = 0; i < nr_vring; i++)\n+\t\tdevice->intr_fd[i] = -1;\n+\n+\tfor (i = 0; i < nr_vring; i++) {\n+\t\trte_vhost_get_vhost_vring(device->vid, i, &vring);\n+\t\tfd_ptr[RTE_INTR_VEC_RXTX_OFFSET + i] = vring.callfd;\n+\t}\n+\n+\tret = ioctl(device->vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);\n+\tif (ret != 0) {\n+\t\tDRV_VDPA_LOG(ERR, \"Error enabling MSI-X interrupts.\");\n+\t\treturn -EIO;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static int\n+nfp_vdpa_disable_vfio_intr(struct nfp_vdpa_dev *device)\n+{\n+\tint ret;\n+\tstruct vfio_irq_set *irq_set;\n+\tchar irq_set_buf[MSIX_IRQ_SET_BUF_LEN];\n+\n+\tirq_set = (struct vfio_irq_set *)irq_set_buf;\n+\tirq_set->argsz = sizeof(irq_set_buf);\n+\tirq_set->count = 0;\n+\tirq_set->flags = VFIO_IRQ_SET_DATA_NONE | VFIO_IRQ_SET_ACTION_TRIGGER;\n+\tirq_set->index = VFIO_PCI_MSIX_IRQ_INDEX;\n+\tirq_set->start = 0;\n+\n+\tret = ioctl(device->vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);\n+\tif (ret != 0) {\n+\t\tDRV_VDPA_LOG(ERR, \"Error disabling MSI-X interrupts.\");\n+\t\treturn -EIO;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static int\n+update_datapath(struct nfp_vdpa_dev *device)\n+{\n+\tint ret;\n+\n+\trte_spinlock_lock(&device->lock);\n+\n+\tif ((__atomic_load_n(&device->running, __ATOMIC_RELAXED) == 0) &&\n+\t\t\t(__atomic_load_n(&device->started, __ATOMIC_RELAXED) != 0) &&\n+\t\t\t(__atomic_load_n(&device->dev_attached, __ATOMIC_RELAXED) != 0)) {\n+\t\tret = nfp_vdpa_dma_map(device, true);\n+\t\tif (ret != 0)\n+\t\t\tgoto unlock_exit;\n+\n+\t\tret = nfp_vdpa_enable_vfio_intr(device);\n+\t\tif (ret != 0)\n+\t\t\tgoto dma_map_rollback;\n+\n+\t\tret = nfp_vdpa_start(device);\n+\t\tif (ret != 0)\n+\t\t\tgoto disable_vfio_intr;\n+\n+\t\t__atomic_store_n(&device->running, 1, __ATOMIC_RELAXED);\n+\t} else if ((__atomic_load_n(&device->running, __ATOMIC_RELAXED) != 0) &&\n+\t\t\t((__atomic_load_n(&device->started, __ATOMIC_RELAXED) != 0) ||\n+\t\t\t(__atomic_load_n(&device->dev_attached, __ATOMIC_RELAXED) != 0))) {\n+\n+\t\tnfp_vdpa_stop(device);\n+\n+\t\tret = nfp_vdpa_disable_vfio_intr(device);\n+\t\tif (ret != 0)\n+\t\t\tgoto unlock_exit;\n+\n+\t\tret = nfp_vdpa_dma_map(device, false);\n+\t\tif (ret != 0)\n+\t\t\tgoto unlock_exit;\n+\n+\t\t__atomic_store_n(&device->running, 0, __ATOMIC_RELAXED);\n+\t}\n+\n+\trte_spinlock_unlock(&device->lock);\n+\treturn 0;\n+\n+disable_vfio_intr:\n+\tnfp_vdpa_disable_vfio_intr(device);\n+dma_map_rollback:\n+\tnfp_vdpa_dma_map(device, false);\n+unlock_exit:\n+\trte_spinlock_unlock(&device->lock);\n+\treturn ret;\n+}\n+\n struct rte_vdpa_dev_ops nfp_vdpa_ops = {\n };\n \n@@ -156,6 +464,10 @@ nfp_vdpa_pci_probe(struct rte_pci_device *pci_dev)\n \tTAILQ_INSERT_TAIL(&vdpa_dev_list, node, next);\n \tpthread_mutex_unlock(&vdpa_list_lock);\n \n+\trte_spinlock_init(&device->lock);\n+\t__atomic_store_n(&device->started, 1, __ATOMIC_RELAXED);\n+\tupdate_datapath(device);\n+\n \treturn 0;\n \n vfio_teardown:\n@@ -185,6 +497,9 @@ nfp_vdpa_pci_remove(struct rte_pci_device *pci_dev)\n \n \tdevice = node->device;\n \n+\t__atomic_store_n(&device->started, 0, __ATOMIC_RELAXED);\n+\tupdate_datapath(device);\n+\n \tpthread_mutex_lock(&vdpa_list_lock);\n \tTAILQ_REMOVE(&vdpa_dev_list, node, next);\n \tpthread_mutex_unlock(&vdpa_list_lock);\ndiff --git a/drivers/vdpa/nfp/nfp_vdpa_core.c b/drivers/vdpa/nfp/nfp_vdpa_core.c\nindex a7e15fa88a..db9b8462b4 100644\n--- a/drivers/vdpa/nfp/nfp_vdpa_core.c\n+++ b/drivers/vdpa/nfp/nfp_vdpa_core.c\n@@ -5,6 +5,7 @@\n \n #include \"nfp_vdpa_core.h\"\n \n+#include <nfp_common.h>\n #include <rte_vhost.h>\n \n #include \"nfp_vdpa_log.h\"\n@@ -52,3 +53,80 @@ nfp_vdpa_hw_init(struct nfp_vdpa_hw *vdpa_hw,\n \n \treturn 0;\n }\n+\n+static uint32_t\n+nfp_vdpa_check_offloads(void)\n+{\n+\treturn NFP_NET_CFG_CTRL_SCATTER |\n+\t\t\tNFP_NET_CFG_CTRL_IN_ORDER;\n+}\n+\n+int\n+nfp_vdpa_hw_start(struct nfp_vdpa_hw *vdpa_hw,\n+\t\tint vid)\n+{\n+\tint ret;\n+\tuint32_t update;\n+\tuint32_t new_ctrl;\n+\tstruct timespec wait_tst;\n+\tstruct nfp_hw *hw = &vdpa_hw->super;\n+\tuint8_t mac_addr[RTE_ETHER_ADDR_LEN];\n+\n+\tnn_cfg_writeq(hw, NFP_NET_CFG_TXR_ADDR(0), vdpa_hw->vring[1].desc);\n+\tnn_cfg_writeb(hw, NFP_NET_CFG_TXR_SZ(0), rte_log2_u32(vdpa_hw->vring[1].size));\n+\tnn_cfg_writeq(hw, NFP_NET_CFG_TXR_ADDR(1), vdpa_hw->vring[1].avail);\n+\tnn_cfg_writeq(hw, NFP_NET_CFG_TXR_ADDR(2), vdpa_hw->vring[1].used);\n+\n+\tnn_cfg_writeq(hw, NFP_NET_CFG_RXR_ADDR(0), vdpa_hw->vring[0].desc);\n+\tnn_cfg_writeb(hw, NFP_NET_CFG_RXR_SZ(0), rte_log2_u32(vdpa_hw->vring[0].size));\n+\tnn_cfg_writeq(hw, NFP_NET_CFG_RXR_ADDR(1), vdpa_hw->vring[0].avail);\n+\tnn_cfg_writeq(hw, NFP_NET_CFG_RXR_ADDR(2), vdpa_hw->vring[0].used);\n+\n+\trte_wmb();\n+\n+\tnfp_disable_queues(hw);\n+\tnfp_enable_queues(hw, NFP_VDPA_MAX_QUEUES, NFP_VDPA_MAX_QUEUES);\n+\n+\tnew_ctrl = nfp_vdpa_check_offloads();\n+\n+\tnn_cfg_writel(hw, NFP_NET_CFG_MTU, 9216);\n+\tnn_cfg_writel(hw, NFP_NET_CFG_FLBUFSZ, 10240);\n+\n+\t/* TODO: Temporary set MAC to fixed value fe:1b:ac:05:a5:22 */\n+\tmac_addr[0] = 0xfe;\n+\tmac_addr[1] = 0x1b;\n+\tmac_addr[2] = 0xac;\n+\tmac_addr[3] = 0x05;\n+\tmac_addr[4] = 0xa5;\n+\tmac_addr[5] = (0x22 + vid);\n+\n+\t/* Writing new MAC to the specific port BAR address */\n+\tnfp_write_mac(hw, (uint8_t *)mac_addr);\n+\n+\t/* Enable device */\n+\tnew_ctrl |= NFP_NET_CFG_CTRL_ENABLE;\n+\n+\t/* Signal the NIC about the change */\n+\tupdate = NFP_NET_CFG_UPDATE_MACADDR |\n+\t\t\tNFP_NET_CFG_UPDATE_GEN |\n+\t\t\tNFP_NET_CFG_UPDATE_RING;\n+\n+\tret = nfp_reconfig(hw, new_ctrl, update);\n+\tif (ret < 0)\n+\t\treturn -EIO;\n+\n+\thw->ctrl = new_ctrl;\n+\n+\tDRV_CORE_LOG(DEBUG, \"Enabling the device, sleep 1 seconds...\");\n+\twait_tst.tv_sec = 1;\n+\twait_tst.tv_nsec = 0;\n+\tnanosleep(&wait_tst, 0);\n+\n+\treturn 0;\n+}\n+\n+void\n+nfp_vdpa_hw_stop(struct nfp_vdpa_hw *vdpa_hw)\n+{\n+\tnfp_disable_queues(&vdpa_hw->super);\n+}\ndiff --git a/drivers/vdpa/nfp/nfp_vdpa_core.h b/drivers/vdpa/nfp/nfp_vdpa_core.h\nindex c9403e0ea4..a88de768dd 100644\n--- a/drivers/vdpa/nfp/nfp_vdpa_core.h\n+++ b/drivers/vdpa/nfp/nfp_vdpa_core.h\n@@ -15,6 +15,15 @@\n #define NFP_VDPA_NOTIFY_ADDR_BASE 0x4000\n #define NFP_VDPA_NOTIFY_ADDR_INTERVAL 0x1000\n \n+struct nfp_vdpa_vring {\n+\tuint64_t desc;\n+\tuint64_t avail;\n+\tuint64_t used;\n+\tuint16_t size;\n+\tuint16_t last_avail_idx;\n+\tuint16_t last_used_idx;\n+};\n+\n struct nfp_vdpa_hw {\n \tstruct nfp_hw super;\n \n@@ -22,11 +31,17 @@ struct nfp_vdpa_hw {\n \tuint64_t req_features;\n \n \tuint8_t *notify_addr[NFP_VDPA_MAX_QUEUES * 2];\n+\tstruct nfp_vdpa_vring vring[NFP_VDPA_MAX_QUEUES * 2];\n \n \tuint8_t mac_addr[RTE_ETHER_ADDR_LEN];\n \tuint8_t notify_region;\n+\tuint8_t nr_vring;\n };\n \n int nfp_vdpa_hw_init(struct nfp_vdpa_hw *vdpa_hw, struct rte_pci_device *dev);\n \n+int nfp_vdpa_hw_start(struct nfp_vdpa_hw *vdpa_hw, int vid);\n+\n+void nfp_vdpa_hw_stop(struct nfp_vdpa_hw *vdpa_hw);\n+\n #endif /* __NFP_VDPA_CORE_H__ */\n", "prefixes": [ "22/25" ] }