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GET /api/patches/133275/?format=api
{ "id": 133275, "url": "http://patchwork.dpdk.org/api/patches/133275/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20231024175132.1435553-8-akozyrev@nvidia.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20231024175132.1435553-8-akozyrev@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20231024175132.1435553-8-akozyrev@nvidia.com", "date": "2023-10-24T17:51:32", "name": "[v3,7/7] net/mlx5/hws: fix integrity bits level", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "404d3167c305e0849caeef59850d1870e8cf1faa", "submitter": { "id": 1873, "url": "http://patchwork.dpdk.org/api/people/1873/?format=api", "name": "Alexander Kozyrev", "email": "akozyrev@nvidia.com" }, "delegate": { "id": 1, "url": "http://patchwork.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20231024175132.1435553-8-akozyrev@nvidia.com/mbox/", "series": [ { "id": 29969, "url": "http://patchwork.dpdk.org/api/series/29969/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=29969", "date": "2023-10-24T17:51:25", "name": "ptype matching support in mlx5", "version": 3, "mbox": "http://patchwork.dpdk.org/series/29969/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/133275/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/133275/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id D38764316B;\n\tTue, 24 Oct 2023 19:53:10 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id D191A41104;\n\tTue, 24 Oct 2023 19:52:39 +0200 (CEST)", "from NAM11-CO1-obe.outbound.protection.outlook.com\n (mail-co1nam11on2040.outbound.protection.outlook.com [40.107.220.40])\n by mails.dpdk.org (Postfix) with ESMTP id 5605840DC9\n for <dev@dpdk.org>; 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helo=mail.nvidia.com; pr=C", "From": "Alexander Kozyrev <akozyrev@nvidia.com>", "To": "<dev@dpdk.org>", "CC": "<orika@nvidia.com>, <matan@nvidia.com>, <michaelba@nvidia.com>,\n <valex@nvidia.com>, <suanmingm@nvidia.com>, <viacheslavo@nvidia.com>", "Subject": "[PATCH v3 7/7] net/mlx5/hws: fix integrity bits level", "Date": "Tue, 24 Oct 2023 20:51:32 +0300", "Message-ID": "<20231024175132.1435553-8-akozyrev@nvidia.com>", "X-Mailer": "git-send-email 2.18.2", "In-Reply-To": "<20231024175132.1435553-1-akozyrev@nvidia.com>", "References": "<20230828182251.3917624-1-akozyrev@nvidia.com>\n <20231024175132.1435553-1-akozyrev@nvidia.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.230.35]", "X-ClientProxiedBy": "rnnvmail201.nvidia.com (10.129.68.8) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "DS1PEPF0001709D:EE_|DM3PR12MB9391:EE_", "X-MS-Office365-Filtering-Correlation-Id": "af8d22a8-a9d3-46ed-e46c-08dbd4ba0125", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n cZKwv6xLqCqHE5PxJqNlN9wM+qvvbyAlSVYQQZSfLgN862ZK8RJEoSb2a1iG5XK3vSmgt7XapyquFoKutafoNS4zCkmV9/V5A5+VvFxL8N+swYAeFlEumGIZqxaNC2god2YLgFcn1NMBYPxNYb1aYOM4dlaPSJ3PehEgfw6CzrQPNNiW0pi58z+nN6q5omMQZ2bvRhl36sEy7QvLmXc6l3oaGtq64Gd8s5JSu0f5xvGjw/hJmV8UJJjJymXAGB4uF/N0tPBs03hTVMXddvVshoa4hfyemYNR+Yej69FKe50HZVC/K1h9ko+BAD/F9uAkEe/prUs34dPf+sSvZ7TzgodEx+nSgNEJnjpq9OUdoda6j3i/jkd9108ZsngHAuzlHv+hlPzvjSBCEfFoYADzkrLNLbX3BuSfYnCbKvV65wjOY4Jo0WjxiR3zdgLg9PNgWG8W0J+92tSTlA2hRUmwN65cqwP5T+Xdkg8y0/pWJdbt62v3R/yA0Nx9VklhLPyYMu79B1ctF+cPCThF/h2/8YUKHm13vHzQqkHkm/Kv4HuAGhUxsq3KMQ/NgwRD+xEIE3YGw9UHoBPYLKGbXgsWjAXHYsTjHT39xjGRKroGWwPV4KkgAiRx1jWYZ4sQsQYgj8c12qT8m43Pyc6hYzHZoTDFFuJTd4Enp7KJgKHAUksodzPFdLQJbk6r8vwSu46huR4/sRNgf4ujzpjqy2C2Q44ztfqqGZ0IRNCHQpBGlms6k+RO1tYTz6vHHw4npkkI", "X-Forefront-Antispam-Report": "CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE;\n SFS:(13230031)(4636009)(396003)(39860400002)(376002)(346002)(136003)(230922051799003)(64100799003)(1800799009)(451199024)(82310400011)(186009)(46966006)(40470700004)(36840700001)(36860700001)(2906002)(6916009)(70586007)(70206006)(316002)(54906003)(82740400003)(356005)(2616005)(6666004)(107886003)(1076003)(7636003)(16526019)(336012)(40480700001)(47076005)(426003)(83380400001)(40460700003)(86362001)(5660300002)(36756003)(4326008)(478600001)(8676002)(41300700001)(8936002)(26005);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "24 Oct 2023 17:52:34.9604 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n af8d22a8-a9d3-46ed-e46c-08dbd4ba0125", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n DS1PEPF0001709D.namprd05.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DM3PR12MB9391", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "The level field in the integrity item is not taken into account\nin the current implementation of hardware steering.\nUse this value instead of trying to find out the encapsulation\nlevel according to the protocol items involved.\n\nFixes: c55c2bf35333 (\"net/mlx5/hws: add definer layer\")\n\nSigned-off-by: Alexander Kozyrev <akozyrev@nvidia.com>\n---\n drivers/net/mlx5/hws/mlx5dr_definer.c | 6 ++----\n 1 file changed, 2 insertions(+), 4 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.c b/drivers/net/mlx5/hws/mlx5dr_definer.c\nindex c752896ca7..f1f9235956 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_definer.c\n+++ b/drivers/net/mlx5/hws/mlx5dr_definer.c\n@@ -1905,7 +1905,6 @@ mlx5dr_definer_conv_item_integrity(struct mlx5dr_definer_conv_data *cd,\n {\n \tconst struct rte_flow_item_integrity *m = item->mask;\n \tstruct mlx5dr_definer_fc *fc;\n-\tbool inner = cd->tunnel;\n \n \tif (!m)\n \t\treturn 0;\n@@ -1916,7 +1915,7 @@ mlx5dr_definer_conv_item_integrity(struct mlx5dr_definer_conv_data *cd,\n \t}\n \n \tif (m->l3_ok || m->ipv4_csum_ok || m->l4_ok || m->l4_csum_ok) {\n-\t\tfc = &cd->fc[DR_CALC_FNAME(INTEGRITY, inner)];\n+\t\tfc = &cd->fc[DR_CALC_FNAME(INTEGRITY, m->level)];\n \t\tfc->item_idx = item_idx;\n \t\tfc->tag_set = &mlx5dr_definer_integrity_set;\n \t\tDR_CALC_SET_HDR(fc, oks1, oks1_bits);\n@@ -2471,8 +2470,7 @@ mlx5dr_definer_conv_items_to_hl(struct mlx5dr_context *ctx,\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ITEM_TYPE_INTEGRITY:\n \t\t\tret = mlx5dr_definer_conv_item_integrity(&cd, items, i);\n-\t\t\titem_flags |= cd.tunnel ? MLX5_FLOW_ITEM_INNER_INTEGRITY :\n-\t\t\t\t\t\t MLX5_FLOW_ITEM_OUTER_INTEGRITY;\n+\t\t\titem_flags |= MLX5_FLOW_ITEM_INTEGRITY;\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ITEM_TYPE_CONNTRACK:\n \t\t\tret = mlx5dr_definer_conv_item_conntrack(&cd, items, i);\n", "prefixes": [ "v3", "7/7" ] }