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GET /api/patches/133576/?format=api
{ "id": 133576, "url": "http://patchwork.dpdk.org/api/patches/133576/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20231029163202.216450-3-getelson@nvidia.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20231029163202.216450-3-getelson@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20231029163202.216450-3-getelson@nvidia.com", "date": "2023-10-29T16:31:35", "name": "[03/30] net/mlx5/hws: Definer, use flow_hw_get_reg_id_from_ctx function call", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "0f610cce6da3a35703ece6f29bef13fea7c79d6c", "submitter": { "id": 1882, "url": "http://patchwork.dpdk.org/api/people/1882/?format=api", "name": "Gregory Etelson", "email": "getelson@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patchwork.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20231029163202.216450-3-getelson@nvidia.com/mbox/", "series": [ { "id": 30049, "url": "http://patchwork.dpdk.org/api/series/30049/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=30049", "date": "2023-10-29T16:31:33", "name": "[01/30] net/mlx5/hws: Definer, add mlx5dr context to definer_conv_data", "version": 1, "mbox": "http://patchwork.dpdk.org/series/30049/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/133576/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/133576/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 6CA2B43238;\n\tSun, 29 Oct 2023 17:32:48 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id BBE1640A75;\n\tSun, 29 Oct 2023 17:32:41 +0100 (CET)", "from NAM11-DM6-obe.outbound.protection.outlook.com\n (mail-dm6nam11on2054.outbound.protection.outlook.com [40.107.223.54])\n by mails.dpdk.org (Postfix) with ESMTP id B1A79406FF\n for <dev@dpdk.org>; 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helo=mail.nvidia.com; pr=C", "From": "Gregory Etelson <getelson@nvidia.com>", "To": "<dev@dpdk.org>", "CC": "<getelson@nvidia.com>, <mkashani@nvidia.com>, <rasland@nvidia.com>, \"Ori\n Kam\" <orika@nvidia.com>, Matan Azrad <matan@nvidia.com>, Viacheslav Ovsiienko\n <viacheslavo@nvidia.com>, Suanming Mou <suanmingm@nvidia.com>", "Subject": "[PATCH 03/30] net/mlx5/hws: Definer,\n use flow_hw_get_reg_id_from_ctx function call", "Date": "Sun, 29 Oct 2023 18:31:35 +0200", "Message-ID": "<20231029163202.216450-3-getelson@nvidia.com>", "X-Mailer": "git-send-email 2.39.2", "In-Reply-To": "<20231029163202.216450-1-getelson@nvidia.com>", "References": "<20231029163202.216450-1-getelson@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.231.35]", "X-ClientProxiedBy": "rnnvmail203.nvidia.com (10.129.68.9) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "BL02EPF0001A0FD:EE_|PH7PR12MB8121:EE_", "X-MS-Office365-Filtering-Correlation-Id": "da3ffa6c-996d-4449-43c3-08dbd89ca9d2", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n sk9liCAQ/CEzpSYCSm/n6UsfvsdtCO4IVrcaAr32lO75EVozHOS7xHdxuIdChBjidpssyISuaDhwx2Voyzcrq/RXSjHBaPazv6oQbVivHMJyPwNOKVuCI9a/i3r/X3whVWVFHXSGNRNsEj3nlH3OZ/+i9Q3PQW67mAdEvUfwEaitm19X9C4Rds3eCMNS6RJPsmGeV/IEUptHuAlRi+iSnFofJQqgenK2SUIBLA8SRgtgJU9svGpENHCUuWxeML5ndpc1NeIQvy2tThzUlRIR5q+sBghN2CP9fJIQ5vdQRZxWBknLm9EbMnzcq25NdguQHU/4bz2XOj+lDqjUx2LeGEMyhOHZjk6Y3Whfk3zM9eGldrBhJBiQge0Nr6EDyUbGhDPAXK8XNDx3DS16YJ1+mPSHIXEc9Aod8L3nyavnhYxjoqym9mQTyQpah5dbAfEiQYvJdpNvXE8pHxTglt3eEAcw4CrrL1BGXSqET3unETt96AhqbgxCkEYBJneY8b6+baiV2E9xtJeUGV3qqOELZbmoKDURQRjOfxoPnlsahw6rW/3Au3ttGvcUeMdjf1pJNulTjKuJnUKq6dV3PUviALPECntgfbVRlP3taiFL0aedXhHFPi0YQlVj5bKkRUc17ryKCGccVnlOmEsfvfEzfN5Ih1g9tgDEqOitFEI+h7Cxh7Pp2GBbnOGDdcgBgyUNZErtL8wDn/Hggep4VHIm8FlBHXVA5faMNhDSGhpvt7jtYtnLxxQHcxdgK3Kh14qV", "X-Forefront-Antispam-Report": "CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE;\n SFS:(13230031)(4636009)(396003)(39850400004)(346002)(136003)(376002)(230922051799003)(64100799003)(451199024)(1800799009)(186009)(82310400011)(36840700001)(40470700004)(46966006)(2906002)(86362001)(41300700001)(4326008)(8676002)(8936002)(5660300002)(40460700003)(36756003)(478600001)(55016003)(40480700001)(47076005)(7696005)(6666004)(1076003)(107886003)(7636003)(6916009)(54906003)(316002)(16526019)(6286002)(26005)(70206006)(336012)(426003)(70586007)(82740400003)(83380400001)(36860700001)(2616005)(356005);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "29 Oct 2023 16:32:37.6653 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n da3ffa6c-996d-4449-43c3-08dbd89ca9d2", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n BL02EPF0001A0FD.namprd03.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "PH7PR12MB8121", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "New function call `flow_hw_get_reg_id_from_ctx()` matches REG_C\nregister to input DR5 context.\n\nSigned-off-by: Gregory Etelson <getelson@nvidia.com>\nAcked-by: Ori Kam <orika@nvidia.com>\n---\n drivers/net/mlx5/hws/mlx5dr_definer.c | 16 +++++++++++-----\n 1 file changed, 11 insertions(+), 5 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.c b/drivers/net/mlx5/hws/mlx5dr_definer.c\nindex 75ba46b966..0f53c1e3b5 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_definer.c\n+++ b/drivers/net/mlx5/hws/mlx5dr_definer.c\n@@ -1448,7 +1448,9 @@ mlx5dr_definer_conv_item_tag(struct mlx5dr_definer_conv_data *cd,\n \t\treturn 0;\n \n \tif (item->type == RTE_FLOW_ITEM_TYPE_TAG)\n-\t\treg = flow_hw_get_reg_id(RTE_FLOW_ITEM_TYPE_TAG, v->index);\n+\t\treg = flow_hw_get_reg_id_from_ctx(cd->ctx,\n+\t\t\t\t\t\t RTE_FLOW_ITEM_TYPE_TAG,\n+\t\t\t\t\t\t v->index);\n \telse\n \t\treg = (int)v->index;\n \n@@ -1508,7 +1510,9 @@ mlx5dr_definer_conv_item_quota(struct mlx5dr_definer_conv_data *cd,\n \t\t\t __rte_unused struct rte_flow_item *item,\n \t\t\t int item_idx)\n {\n-\tint mtr_reg = flow_hw_get_reg_id(RTE_FLOW_ITEM_TYPE_METER_COLOR, 0);\n+\tint mtr_reg =\n+\tflow_hw_get_reg_id_from_ctx(cd->ctx, RTE_FLOW_ITEM_TYPE_METER_COLOR,\n+\t\t\t\t 0);\n \tstruct mlx5dr_definer_fc *fc;\n \n \tif (mtr_reg < 0) {\n@@ -1538,7 +1542,7 @@ mlx5dr_definer_conv_item_metadata(struct mlx5dr_definer_conv_data *cd,\n \tif (!m)\n \t\treturn 0;\n \n-\treg = flow_hw_get_reg_id(RTE_FLOW_ITEM_TYPE_META, -1);\n+\treg = flow_hw_get_reg_id_from_ctx(cd->ctx, RTE_FLOW_ITEM_TYPE_META, -1);\n \tif (reg <= 0) {\n \t\tDR_LOG(ERR, \"Invalid register for item metadata\");\n \t\trte_errno = EINVAL;\n@@ -1748,7 +1752,8 @@ mlx5dr_definer_conv_item_conntrack(struct mlx5dr_definer_conv_data *cd,\n \tif (!m)\n \t\treturn 0;\n \n-\treg = flow_hw_get_reg_id(RTE_FLOW_ITEM_TYPE_CONNTRACK, -1);\n+\treg = flow_hw_get_reg_id_from_ctx(cd->ctx, RTE_FLOW_ITEM_TYPE_CONNTRACK,\n+\t\t\t\t\t -1);\n \tif (reg <= 0) {\n \t\tDR_LOG(ERR, \"Invalid register for item conntrack\");\n \t\trte_errno = EINVAL;\n@@ -1889,7 +1894,8 @@ mlx5dr_definer_conv_item_meter_color(struct mlx5dr_definer_conv_data *cd,\n \tif (!m)\n \t\treturn 0;\n \n-\treg = flow_hw_get_reg_id(RTE_FLOW_ITEM_TYPE_METER_COLOR, 0);\n+\treg = flow_hw_get_reg_id_from_ctx(cd->ctx,\n+\t\t\t\t\t RTE_FLOW_ITEM_TYPE_METER_COLOR, 0);\n \tMLX5_ASSERT(reg > 0);\n \n \tfc = mlx5dr_definer_get_register_fc(cd, reg);\n", "prefixes": [ "03/30" ] }