Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/136631/?format=api
{ "id": 136631, "url": "http://patchwork.dpdk.org/api/patches/136631/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20240213095038.451299-9-igozlan@nvidia.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20240213095038.451299-9-igozlan@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20240213095038.451299-9-igozlan@nvidia.com", "date": "2024-02-13T09:50:37", "name": "[9/9] net/mlx5/hws: support push_esp flag for insert header action", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "0e04e035cc002d18a6d517b29a2fc10c4e758e26", "submitter": { "id": 3118, "url": "http://patchwork.dpdk.org/api/people/3118/?format=api", "name": "Itamar Gozlan", "email": "igozlan@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patchwork.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20240213095038.451299-9-igozlan@nvidia.com/mbox/", "series": [ { "id": 31082, "url": "http://patchwork.dpdk.org/api/series/31082/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=31082", "date": "2024-02-13T09:50:29", "name": "[1/9] net/mlx5/hws: skip RTE item when inserting rules by index", "version": 1, "mbox": "http://patchwork.dpdk.org/series/31082/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/136631/comments/", "check": "warning", "checks": "http://patchwork.dpdk.org/api/patches/136631/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id C576443B05;\n\tTue, 13 Feb 2024 10:52:08 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 3F669427E3;\n\tTue, 13 Feb 2024 10:51:33 +0100 (CET)", "from NAM12-DM6-obe.outbound.protection.outlook.com\n (mail-dm6nam12on2087.outbound.protection.outlook.com [40.107.243.87])\n by mails.dpdk.org (Postfix) with ESMTP id E174E427E5\n for <dev@dpdk.org>; Tue, 13 Feb 2024 10:51:31 +0100 (CET)", "from CH2PR19CA0013.namprd19.prod.outlook.com (2603:10b6:610:4d::23)\n by BL1PR12MB5379.namprd12.prod.outlook.com (2603:10b6:208:317::15)\n with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7292.25; Tue, 13 Feb\n 2024 09:51:29 +0000", "from CH2PEPF0000009A.namprd02.prod.outlook.com\n (2603:10b6:610:4d:cafe::21) by CH2PR19CA0013.outlook.office365.com\n (2603:10b6:610:4d::23) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7270.40 via Frontend\n Transport; Tue, 13 Feb 2024 09:51:29 +0000", "from mail.nvidia.com (216.228.117.160) by\n CH2PEPF0000009A.mail.protection.outlook.com (10.167.244.22) with Microsoft\n SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.20.7292.25 via Frontend Transport; Tue, 13 Feb 2024 09:51:29 +0000", "from rnnvmail203.nvidia.com (10.129.68.9) by mail.nvidia.com\n (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Tue, 13 Feb\n 2024 01:51:18 -0800", "from rnnvmail203.nvidia.com (10.129.68.9) by rnnvmail203.nvidia.com\n (10.129.68.9) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Tue, 13 Feb\n 2024 01:51:17 -0800", "from nvidia.com (10.127.8.12) by mail.nvidia.com (10.129.68.9) with\n Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41 via Frontend\n Transport; Tue, 13 Feb 2024 01:51:14 -0800" ], "ARC-Seal": "i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none;\n b=I/h4z45nY/BIyDiPjHHfN999zfP6X8gIiyJULPv0eLHGqGzOAZdYbkwPYkcFBJxG8NxuN2xGU/CY7BYPL5N0WW0YPriIAfo2cA/UcdErk6Q65+c0V1JpQsM9+/fQygddMDFj4iq7+0zb4kCSNh9DH2sj+eSRoQWMtdAqMZxPgh+zn1CSfY+iAuBA2zQxreKwIfeZ0i9jccHL4nTrIPKFV3jcmTDfFkzrtDPwJa6seWFBssBNlRIwoiOIN2YdNBOIFR3/OuA4TuqFmDrjGeCEU4/+ou1Rl4vt6/OHISjvSXLSdwETq1WPmdlIiY8aT8+kTVttXJQi8dWiXcUoCIta4w==", "ARC-Message-Signature": "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector9901;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;\n bh=p/R1DYNY8xAwij2WgGNxiODXoZOZ8gFQ2R5T0wsGCck=;\n b=lmWn7zwb8xsJZVcxHGz3W1YsaERm4qFnaWeOQeBkcVSHIls1fU9fotYvejAX2I8ZZ7VZ0wWumMYkSyucHDnCAputs/IciZxgpjhupQi/vFsrk+88l35uqaOyiwBhv+cOiUVQSmE+1HY1xd/ty9/r4sLQQHZPgfCJyJ7ZFhHCWkBjBxAAxbtfu9zFbTdogbRxIEAJcnb9XrF3BR4o+dN/93u+OsJoe7RMTf7JSRxzg6D3r2MZlJ7BMgMbDVnK5KfcIlJGGH9phrLH37gNiMRPTI8sT1nR5LusbeQlw0wmWVauSobhHO86t6tFktPs8BsWOSZKdGigD+XCdam0pY/YIg==", "ARC-Authentication-Results": "i=1; mx.microsoft.com 1; spf=pass (sender ip is\n 216.228.117.160) smtp.rcpttodomain=monjalon.net smtp.mailfrom=nvidia.com;\n dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com;\n dkim=none (message not signed); arc=none (0)", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com;\n s=selector2;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=p/R1DYNY8xAwij2WgGNxiODXoZOZ8gFQ2R5T0wsGCck=;\n b=Wv/FNOdglGQtlyn4gmqRiRxgcs2Sujec09/mTp8SEo5+tQlqKWc4kYLM7pj1LU3G5s1mgeN3nDGRagn3C4NXjxgLSakCONzEtrPK2mf4CI8XZXEKXhNfrL8hnwKkr7/AmC97Bkjp1t3fLbnjSplSpiaxSraEyC4YSUrCRZniph+skvXtgiRCwhnJZ+zPre33M5evc7TLuOecLAaSRh/ugKRuJd1ftCOldtuGvSxbgSMNTT9bOMLuw/62hClXYzYWq4q0nAKHzwWkFU6LVCdqeHE3WVGP85Cw3iNPHXddx1SnwJ1h0zVm+yUJuI/B2kttRPVwTrtrWg2vWOOquRNKYw==", "X-MS-Exchange-Authentication-Results": "spf=pass (sender IP is 216.228.117.160)\n smtp.mailfrom=nvidia.com;\n dkim=none (message not signed)\n header.d=none;dmarc=pass action=none header.from=nvidia.com;", "Received-SPF": "Pass (protection.outlook.com: domain of nvidia.com designates\n 216.228.117.160 as permitted sender) receiver=protection.outlook.com;\n client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C", "From": "Itamar Gozlan <igozlan@nvidia.com>", "To": "<igozlan@nvidia.com>, <erezsh@nvidia.com>, <hamdani@nvidia.com>,\n <kliteyn@nvidia.com>, <viacheslavo@nvidia.com>, <thomas@monjalon.net>,\n <suanmingm@nvidia.com>, Dariusz Sosnowski <dsosnowski@nvidia.com>, Ori Kam\n <orika@nvidia.com>, Matan Azrad <matan@nvidia.com>", "CC": "<dev@dpdk.org>", "Subject": "[PATCH 9/9] net/mlx5/hws: support push_esp flag for insert header\n action", "Date": "Tue, 13 Feb 2024 11:50:37 +0200", "Message-ID": "<20240213095038.451299-9-igozlan@nvidia.com>", "X-Mailer": "git-send-email 2.39.3", "In-Reply-To": "<20240213095038.451299-1-igozlan@nvidia.com>", "References": "<20240213095038.451299-1-igozlan@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-NV-OnPremToCloud": "ExternallySecured", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "CH2PEPF0000009A:EE_|BL1PR12MB5379:EE_", "X-MS-Office365-Filtering-Correlation-Id": "c65b32c9-6f38-4f03-c918-08dc2c795a3a", "X-LD-Processed": "43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n cyHHICw1NyR4+feVf7ozHKxeQmur07gPBYm/GesXCQwgBFwKK6EmcpJwkEAaHvRnDrZvkUz9bziwdHy5vbGUXTpwdpgsjFhYmT5zJP9KO9hTKGOn81AzkK1ypA8X80tHn7Sf9Dc0UK3cccOwgalk0uQaCSF3otbwQ/3O+InCnIFwPGthpcoc1OiIiXc1ZRN8ao3I7pU5bX1RvHXdfjW2CWwRdAtzNab3aUpb+YPubnLWwiVwVS25rL9YpqDmCUT9gfwr8qycGpPofq9Mo8f8syXEajr+lV+Cmti2Cp49KgOv6rxgT5a9CbY4ORhYMO3SOBFrB0SOfSbZYV7t69shh8sVv3VW+R/5wS2icUH6cIcuyeM8r0irG1fzR4Lq9IyY0Eq+W8HL9MdA1vC0QixFtKMo/DVsyvac+DM6x/cqi48O+NyRDvs32by5KKxw24LAFF7KBEphnGFuifg5vMTOEO1NEAjlDgLoKd6JW5voLH/9LgUrAQQYxUMImzItpDeTM1mcwWNNSOJQfTGFI8MjDLu27SSIQ+SzERB5QwEcJ2NkmhCqxEGR6Xb33GyxZusCFHzkBMemw4nGkALnd7bgmRRTjVFq+HyocrarduQPjevBHzGUyV8Q2wjGoOrVBpKlyF4XFZBOro9WjN7oDFi86g==", "X-Forefront-Antispam-Report": "CIP:216.228.117.160; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE;\n SFS:(13230031)(4636009)(376002)(396003)(39860400002)(136003)(346002)(230922051799003)(451199024)(64100799003)(82310400011)(186009)(1800799012)(36840700001)(40470700004)(46966006)(83380400001)(86362001)(41300700001)(921011)(1076003)(316002)(110136005)(6636002)(6286002)(26005)(36756003)(7696005)(2616005)(478600001)(6666004)(8676002)(5660300002)(70586007)(2906002)(70206006)(8936002)(4326008)(336012)(426003)(7636003)(82740400003)(55016003)(356005);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "13 Feb 2024 09:51:29.4672 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n c65b32c9-6f38-4f03-c918-08dc2c795a3a", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n CH2PEPF0000009A.namprd02.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BL1PR12MB5379", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Hamdan Igbaria <hamdani@nvidia.com>\n\nsupport push_esp flag for insert header action, it must be set when\ninserting an ESP header, it's also sets the next_protocol field in\nthe IPsec trailer.\n\nSigned-off-by: Hamdan Igbaria <hamdani@nvidia.com>\nAcked-by: Matan Azrad <matan@nvidia.com>\n---\n drivers/common/mlx5/mlx5_prm.h | 3 ++-\n drivers/net/mlx5/hws/mlx5dr.h | 4 ++++\n drivers/net/mlx5/hws/mlx5dr_action.c | 4 ++++\n drivers/net/mlx5/hws/mlx5dr_action.h | 1 +\n drivers/net/mlx5/hws/mlx5dr_cmd.c | 2 ++\n drivers/net/mlx5/hws/mlx5dr_cmd.h | 1 +\n 6 files changed, 14 insertions(+), 1 deletion(-)", "diff": "diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h\nindex abff8e4dc3..6fa5553215 100644\n--- a/drivers/common/mlx5/mlx5_prm.h\n+++ b/drivers/common/mlx5/mlx5_prm.h\n@@ -3608,7 +3608,8 @@ struct mlx5_ifc_stc_ste_param_insert_bits {\n \tu8 action_type[0x4];\n \tu8 encap[0x1];\n \tu8 inline_data[0x1];\n-\tu8 reserved_at_6[0x4];\n+\tu8 push_esp[0x1];\n+\tu8 reserved_at_7[0x3];\n \tu8 insert_anchor[0x6];\n \tu8 reserved_at_10[0x1];\n \tu8 insert_offset[0x7];\ndiff --git a/drivers/net/mlx5/hws/mlx5dr.h b/drivers/net/mlx5/hws/mlx5dr.h\nindex c11ec08616..78b16f3dc7 100644\n--- a/drivers/net/mlx5/hws/mlx5dr.h\n+++ b/drivers/net/mlx5/hws/mlx5dr.h\n@@ -192,6 +192,10 @@ struct mlx5dr_action_insert_header {\n \t * requiring device to update offloaded fields (for example IPv4 total length).\n \t */\n \tbool encap;\n+\t/* It must be set when adding ESP header.\n+\t * It's also sets the next_protocol value in the ipsec trailer.\n+\t */\n+\tbool push_esp;\n };\n \n enum mlx5dr_action_remove_header_type {\ndiff --git a/drivers/net/mlx5/hws/mlx5dr_action.c b/drivers/net/mlx5/hws/mlx5dr_action.c\nindex 8589de5557..f55069c675 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_action.c\n+++ b/drivers/net/mlx5/hws/mlx5dr_action.c\n@@ -598,6 +598,7 @@ static void mlx5dr_action_fill_stc_attr(struct mlx5dr_action *action,\n \t\tattr->action_type = MLX5_IFC_STC_ACTION_TYPE_HEADER_INSERT;\n \t\tattr->action_offset = MLX5DR_ACTION_OFFSET_DW6;\n \t\tattr->insert_header.encap = action->reformat.encap;\n+\t\tattr->insert_header.push_esp = action->reformat.push_esp;\n \t\tattr->insert_header.insert_anchor = action->reformat.anchor;\n \t\tattr->insert_header.arg_id = action->reformat.arg_obj->id;\n \t\tattr->insert_header.header_size = action->reformat.header_size;\n@@ -635,6 +636,7 @@ static void mlx5dr_action_fill_stc_attr(struct mlx5dr_action *action,\n \t\tattr->action_offset = MLX5DR_ACTION_OFFSET_DW6;\n \t\tattr->reparse_mode = MLX5_IFC_STC_REPARSE_ALWAYS;\n \t\tattr->insert_header.encap = 0;\n+\t\tattr->insert_header.push_esp = 0;\n \t\tattr->insert_header.is_inline = 1;\n \t\tattr->insert_header.insert_anchor = MLX5_HEADER_ANCHOR_PACKET_START;\n \t\tattr->insert_header.insert_offset = MLX5DR_ACTION_HDR_LEN_L2_MACS;\n@@ -1340,6 +1342,7 @@ mlx5dr_action_handle_insert_with_ptr(struct mlx5dr_action *action,\n \t\t\taction[i].reformat.anchor = MLX5_HEADER_ANCHOR_PACKET_START;\n \t\t\taction[i].reformat.offset = 0;\n \t\t\taction[i].reformat.encap = 1;\n+\t\t\taction[i].reformat.push_esp = 0;\n \t\t}\n \n \t\tif (likely(reparse == MLX5DR_ACTION_STC_REPARSE_DEFAULT))\n@@ -2087,6 +2090,7 @@ mlx5dr_action_create_insert_header_reparse(struct mlx5dr_context *ctx,\n \n \t\taction[i].reformat.anchor = hdrs[i].anchor;\n \t\taction[i].reformat.encap = hdrs[i].encap;\n+\t\taction[i].reformat.push_esp = hdrs[i].push_esp;\n \t\taction[i].reformat.offset = hdrs[i].offset;\n \t\treformat_hdrs[i].sz = hdrs[i].hdr.sz;\n \t\treformat_hdrs[i].data = hdrs[i].hdr.data;\ndiff --git a/drivers/net/mlx5/hws/mlx5dr_action.h b/drivers/net/mlx5/hws/mlx5dr_action.h\nindex a8d9720c42..0c8e4bbb5a 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_action.h\n+++ b/drivers/net/mlx5/hws/mlx5dr_action.h\n@@ -149,6 +149,7 @@ struct mlx5dr_action {\n \t\t\t\t\tuint8_t offset;\n \t\t\t\t\tbool encap;\n \t\t\t\t\tuint8_t require_reparse;\n+\t\t\t\t\tbool push_esp;\n \t\t\t\t} reformat;\n \t\t\t\tstruct {\n \t\t\t\t\tstruct mlx5dr_action\ndiff --git a/drivers/net/mlx5/hws/mlx5dr_cmd.c b/drivers/net/mlx5/hws/mlx5dr_cmd.c\nindex 876a47147d..28d909df80 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_cmd.c\n+++ b/drivers/net/mlx5/hws/mlx5dr_cmd.c\n@@ -486,6 +486,8 @@ mlx5dr_cmd_stc_modify_set_stc_param(struct mlx5dr_cmd_stc_modify_attr *stc_attr,\n \t\t\t MLX5_MODIFICATION_TYPE_INSERT);\n \t\tMLX5_SET(stc_ste_param_insert, stc_parm, encap,\n \t\t\t stc_attr->insert_header.encap);\n+\t\tMLX5_SET(stc_ste_param_insert, stc_parm, push_esp,\n+\t\t\t stc_attr->insert_header.push_esp);\n \t\tMLX5_SET(stc_ste_param_insert, stc_parm, inline_data,\n \t\t\t stc_attr->insert_header.is_inline);\n \t\tMLX5_SET(stc_ste_param_insert, stc_parm, insert_anchor,\ndiff --git a/drivers/net/mlx5/hws/mlx5dr_cmd.h b/drivers/net/mlx5/hws/mlx5dr_cmd.h\nindex 18c2b07fc8..013a7e99e8 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_cmd.h\n+++ b/drivers/net/mlx5/hws/mlx5dr_cmd.h\n@@ -122,6 +122,7 @@ struct mlx5dr_cmd_stc_modify_attr {\n \t\t\tuint8_t encap;\n \t\t\tuint16_t insert_anchor;\n \t\t\tuint16_t insert_offset;\n+\t\t\tuint8_t push_esp;\n \t\t} insert_header;\n \t\tstruct {\n \t\t\tuint8_t aso_type;\n", "prefixes": [ "9/9" ] }