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GET /api/patches/137232/?format=api
{ "id": 137232, "url": "http://patchwork.dpdk.org/api/patches/137232/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20240226134556.2985054-8-michaelba@nvidia.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20240226134556.2985054-8-michaelba@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20240226134556.2985054-8-michaelba@nvidia.com", "date": "2024-02-26T13:45:56", "name": "[v3,7/7] net/mlx5: support modify IPv6 flow label field", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "ba2a2c3a30fac4d296f0a7bd32a65ab7fc12ad7b", "submitter": { "id": 1949, "url": "http://patchwork.dpdk.org/api/people/1949/?format=api", "name": "Michael Baum", "email": "michaelba@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patchwork.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20240226134556.2985054-8-michaelba@nvidia.com/mbox/", "series": [ { "id": 31226, "url": "http://patchwork.dpdk.org/api/series/31226/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=31226", "date": "2024-02-26T13:45:49", "name": "net/mlx5: support copy from inner fields", "version": 3, "mbox": "http://patchwork.dpdk.org/series/31226/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/137232/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/137232/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 67A9D43BED;\n\tMon, 26 Feb 2024 14:47:10 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 5968442EAA;\n\tMon, 26 Feb 2024 14:46:50 +0100 (CET)", "from NAM12-BN8-obe.outbound.protection.outlook.com\n (mail-bn8nam12on2078.outbound.protection.outlook.com [40.107.237.78])\n by mails.dpdk.org (Postfix) with ESMTP id 5E6F942E6C\n for <dev@dpdk.org>; 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helo=mail.nvidia.com; pr=C", "From": "Michael Baum <michaelba@nvidia.com>", "To": "<dev@dpdk.org>", "CC": "Matan Azrad <matan@nvidia.com>, Dariusz Sosnowski <dsosnowski@nvidia.com>,\n Raslan Darawsheh <rasland@nvidia.com>, Viacheslav Ovsiienko\n <viacheslavo@nvidia.com>, Ori Kam <orika@nvidia.com>, Suanming Mou\n <suanmingm@nvidia.com>", "Subject": "[PATCH v3 7/7] net/mlx5: support modify IPv6 flow label field", "Date": "Mon, 26 Feb 2024 15:45:56 +0200", "Message-ID": "<20240226134556.2985054-8-michaelba@nvidia.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20240226134556.2985054-1-michaelba@nvidia.com>", "References": "<20240207155533.1582031-1-michaelba@nvidia.com>\n <20240226134556.2985054-1-michaelba@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-NV-OnPremToCloud": "ExternallySecured", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "BN2PEPF000044A7:EE_|CYXPR12MB9428:EE_", "X-MS-Office365-Filtering-Correlation-Id": "01e8308d-6dd5-415c-acc0-08dc36d15c8c", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n 0v0K/lMiNncT5qheR34mpalwrivbmvUPeWDcR/mTcexCnO+JbQjBVkHlzaysAqdNDCyDJbKiw3ako+Z7NU/q+jGLAsu0tSjY0PGmzEncWfdd5aK33q9DnH+WGrZIob21hVCEfxcP1IXBzQeKEtmdRtM9gQ1iFKn+iIcIYUOzS68tf3Ub1F9ES5kMcMefd12pBJ9xtDqhI0faLXm9WRRyhIkiSfmIVPjJeh0E0A5/QXztZKZKy/q5QTyq31o/rNHhCsVZ0dO2BaC8wWo+U+cbtLSC81d3ysD8OcUgZ6RHDfj8oor06KjK3MABCBazVmcVSFqYxE9e8uEDAF+oS2bGxOPlimgp1qY+/tUpjF0q35mxL/MCZCYxwOHXyPPSqJj9Ys+XeXmbqcK8Ynp1910bwz5T2vaRDzoiK1R4nqdNu07YvxHdsfI9/k4ZAkfHoXnadhnSJ7kS8PCfAd5P1cld7aepySnAKXA2Invk98FSbM+Twvme8wZ6oAOwFEhfRrNjSSxJ/GX0i52vnWFzaUI/RsqiTeUu8qqZeP2lDsGa1mOqWsu6kJCxQxDsDAY6TayIp5F0mqUPXM58FXjy5HjlSUSzZgxZfc4RvagHbhs5A+b/PzaSR79wJwkATpUyHYXYdFz1CpqoTnlWc/hr3bV6IXxuNxv1nx7MrWuPcE1pT6yUPNcXkwCCPDxU1+OUW2C14ye3bSkHsA0XoKjibbdq8G0nnWSOuHgehojCyvR8TFTzFB2sfxCmJVb5XIHKGjpL", "X-Forefront-Antispam-Report": "CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE;\n SFS:(13230031)(36860700004); DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "26 Feb 2024 13:46:40.5586 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 01e8308d-6dd5-415c-acc0-08dc36d15c8c", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n BN2PEPF000044A7.namprd04.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "CYXPR12MB9428", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Add HW steering support for IPv6 flow label field modification.\nCopy from inner IPv6 flow label field is also supported using \"level=2\".\n\nSigned-off-by: Michael Baum <michaelba@nvidia.com>\nAcked-by: Dariusz Sosnowski <dsosnowski@nvidia.com>\n---\n doc/guides/rel_notes/release_24_03.rst | 1 +\n drivers/net/mlx5/mlx5_flow_dv.c | 12 ++++++++++++\n drivers/net/mlx5/mlx5_flow_hw.c | 1 +\n 3 files changed, 14 insertions(+)", "diff": "diff --git a/doc/guides/rel_notes/release_24_03.rst b/doc/guides/rel_notes/release_24_03.rst\nindex c2fc22ed66..ff9c6552e4 100644\n--- a/doc/guides/rel_notes/release_24_03.rst\n+++ b/doc/guides/rel_notes/release_24_03.rst\n@@ -128,6 +128,7 @@ New Features\n * Added support for modifying IPv4 proto field in HWS flow engine.\n * Added support for modifying IPsec ESP fields in HWS flow engine.\n * Added support for modifying IPv6 traffic class field in HWS flow engine.\n+ * Added support for modifying IPv6 flow label field in HWS flow engine.\n * Added support for matching a random value.\n * Added support for comparing result between packet fields or value.\n * Added support for accumulating value of field into another one.\ndiff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c\nindex 2c0c8e37f7..75a8a223ab 100644\n--- a/drivers/net/mlx5/mlx5_flow_dv.c\n+++ b/drivers/net/mlx5/mlx5_flow_dv.c\n@@ -1394,6 +1394,8 @@ mlx5_flow_item_field_width(struct rte_eth_dev *dev,\n \t\treturn 32;\n \tcase RTE_FLOW_FIELD_IPV6_DSCP:\n \t\treturn 6;\n+\tcase RTE_FLOW_FIELD_IPV6_FLOW_LABEL:\n+\t\treturn 20;\n \tcase RTE_FLOW_FIELD_IPV6_TRAFFIC_CLASS:\n \tcase RTE_FLOW_FIELD_IPV6_HOPLIMIT:\n \tcase RTE_FLOW_FIELD_IPV6_PROTO:\n@@ -1806,6 +1808,16 @@ mlx5_flow_field_id_to_modify_info\n \t\telse\n \t\t\tinfo[idx].offset = off_be;\n \t\tbreak;\n+\tcase RTE_FLOW_FIELD_IPV6_FLOW_LABEL:\n+\t\tMLX5_ASSERT(data->offset + width <= 20);\n+\t\toff_be = 20 - (data->offset + width);\n+\t\tmodi_id = CALC_MODI_ID(IPV6_FLOW_LABEL, data->level);\n+\t\tinfo[idx] = (struct field_modify_info){4, 0, modi_id};\n+\t\tif (mask)\n+\t\t\tmask[idx] = flow_modify_info_mask_32(width, off_be);\n+\t\telse\n+\t\t\tinfo[idx].offset = off_be;\n+\t\tbreak;\n \tcase RTE_FLOW_FIELD_IPV6_PAYLOAD_LEN:\n \t\tMLX5_ASSERT(data->offset + width <= 16);\n \t\toff_be = 16 - (data->offset + width);\ndiff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c\nindex 9d4fdb06c1..254273e0fb 100644\n--- a/drivers/net/mlx5/mlx5_flow_hw.c\n+++ b/drivers/net/mlx5/mlx5_flow_hw.c\n@@ -5068,6 +5068,7 @@ flow_hw_validate_modify_field_level(const struct rte_flow_field_data *data,\n \tcase RTE_FLOW_FIELD_IPV4_SRC:\n \tcase RTE_FLOW_FIELD_IPV4_DST:\n \tcase RTE_FLOW_FIELD_IPV6_TRAFFIC_CLASS:\n+\tcase RTE_FLOW_FIELD_IPV6_FLOW_LABEL:\n \tcase RTE_FLOW_FIELD_IPV6_PAYLOAD_LEN:\n \tcase RTE_FLOW_FIELD_IPV6_HOPLIMIT:\n \tcase RTE_FLOW_FIELD_IPV6_SRC:\n", "prefixes": [ "v3", "7/7" ] }