get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/138802/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 138802,
    "url": "http://patchwork.dpdk.org/api/patches/138802/?format=api",
    "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20240326125554.138840-7-sivaprasad.tummala@amd.com/",
    "project": {
        "id": 1,
        "url": "http://patchwork.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20240326125554.138840-7-sivaprasad.tummala@amd.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20240326125554.138840-7-sivaprasad.tummala@amd.com",
    "date": "2024-03-26T12:55:45",
    "name": "[v7,06/14] examples/l3fwd-power: fix lcore ID restriction",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "f16f730c98c8a789d8714776f56a942f3a824610",
    "submitter": {
        "id": 2510,
        "url": "http://patchwork.dpdk.org/api/people/2510/?format=api",
        "name": "Sivaprasad Tummala",
        "email": "Sivaprasad.Tummala@amd.com"
    },
    "delegate": {
        "id": 1,
        "url": "http://patchwork.dpdk.org/api/users/1/?format=api",
        "username": "tmonjalo",
        "first_name": "Thomas",
        "last_name": "Monjalon",
        "email": "thomas@monjalon.net"
    },
    "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20240326125554.138840-7-sivaprasad.tummala@amd.com/mbox/",
    "series": [
        {
            "id": 31619,
            "url": "http://patchwork.dpdk.org/api/series/31619/?format=api",
            "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=31619",
            "date": "2024-03-26T12:55:39",
            "name": "fix lcore ID restriction",
            "version": 7,
            "mbox": "http://patchwork.dpdk.org/series/31619/mbox/"
        }
    ],
    "comments": "http://patchwork.dpdk.org/api/patches/138802/comments/",
    "check": "success",
    "checks": "http://patchwork.dpdk.org/api/patches/138802/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id CA62C43D51;\n\tTue, 26 Mar 2024 13:57:08 +0100 (CET)",
            "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id BB16B410FC;\n\tTue, 26 Mar 2024 13:56:52 +0100 (CET)",
            "from NAM10-BN7-obe.outbound.protection.outlook.com\n (mail-bn7nam10on2081.outbound.protection.outlook.com [40.107.92.81])\n by mails.dpdk.org (Postfix) with ESMTP id B688F410E4;\n Tue, 26 Mar 2024 13:56:51 +0100 (CET)",
            "from BN8PR15CA0062.namprd15.prod.outlook.com (2603:10b6:408:80::39)\n by MW4PR12MB7465.namprd12.prod.outlook.com (2603:10b6:303:212::18)\n with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7409.32; Tue, 26 Mar\n 2024 12:56:49 +0000",
            "from BN1PEPF00004687.namprd05.prod.outlook.com\n (2603:10b6:408:80:cafe::63) by BN8PR15CA0062.outlook.office365.com\n (2603:10b6:408:80::39) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7409.13 via Frontend\n Transport; Tue, 26 Mar 2024 12:56:49 +0000",
            "from SATLEXMB04.amd.com (165.204.84.17) by\n BN1PEPF00004687.mail.protection.outlook.com (10.167.243.132) with Microsoft\n SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id\n 15.20.7409.10 via Frontend Transport; Tue, 26 Mar 2024 12:56:49 +0000",
            "from ubuntu2004.linuxvmimages.local (10.180.168.240) by\n SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id\n 15.1.2507.35; Tue, 26 Mar 2024 07:56:44 -0500"
        ],
        "ARC-Seal": "i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none;\n b=LfelOaxlqT8f732gOBQ7nyJzvwsQPxRZyuQVqW84/fLqwn/kcM8mLN6CDKu4tt6D050KSQaJSfiBH3aUY8Ng/uW4E0f2gE9PEwk4zop+Iz8IRlYlg9PTjJqiAnRiQvapw4+XEoi0dCWNFGh4uzxMDOsVqBzmeygkks+ZVELq5TM25U8+TnlwqmKyoex0ZZz7R3RTNDA40uk2odwpkYJjQ8jRG5R+JktH97jjrTKqMeqUHQppqNfMkaCBc2FYFHiVrSIvbRlbfS2sZAxZys8d3gbbZsukWzEcfGQ3xBEGJ1a/GbtgACLOiUDjsIOIsoT+ofcMcTWhxRLzikYHhtO1QQ==",
        "ARC-Message-Signature": "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector9901;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;\n bh=eWxD+OuPECvZ8Ex4gp4iRjJ+M5uJeOBkqsVtoYyd7Ec=;\n b=JtO133XrEWh9/LmvtnyAYOapr8mfKbjit29i379sOxp5IalXb1h/EDV8kJP7XDo/o2AzfuLqRkm/VtGkIqmAss+c7e1SP+Nt0FrTxtG5874u/1rOH6gIg0kBm6a9daJusGc1u1pDq2GmnLMkA1vy+fupCTGG3YFmEGoH8zmQvKwAIg6Y0tSwzgrvc4xNTdZ1X6p7OXLzaj3M95uKc5oVn7uV0HJWYbdFPN87LrFOqGanIXjknoAuQLp9ahJjfuBskvPduvkjT01FxSQ0S3920WrtRotasq2JMuTWFCFI6STuDx0h/zL2MfRvpJWY2N8a37xqmVJpEwpDNQcDNuI1BQ==",
        "ARC-Authentication-Results": "i=1; mx.microsoft.com 1; spf=pass (sender ip is\n 165.204.84.17) smtp.rcpttodomain=intel.com smtp.mailfrom=amd.com; dmarc=pass\n (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com;\n dkim=none (message not signed); arc=none (0)",
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=eWxD+OuPECvZ8Ex4gp4iRjJ+M5uJeOBkqsVtoYyd7Ec=;\n b=4xM1F1Uss2FoJ1eClZ0lu+WyqAzmlJ2J4JP0qVWNf3AIlKUraOTIW2s21ZjMHP0un2Q+eLf8RsG0qtj0zBwG9TNjSaYlYhBIo79Fh3JcaiulH6MFYUdeIGoXuv4tI1eJ/M5mcbbLsyIWEE1JUE+fqNkGqME6F1BPJ+WUG5eVjzk=",
        "X-MS-Exchange-Authentication-Results": "spf=pass (sender IP is 165.204.84.17)\n smtp.mailfrom=amd.com; dkim=none (message not signed)\n header.d=none;dmarc=pass action=none header.from=amd.com;",
        "Received-SPF": "Pass (protection.outlook.com: domain of amd.com designates\n 165.204.84.17 as permitted sender) receiver=protection.outlook.com;\n client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C",
        "From": "Sivaprasad Tummala <sivaprasad.tummala@amd.com>",
        "To": "<david.hunt@intel.com>, <anatoly.burakov@intel.com>, <jerinj@marvell.com>,\n <radu.nicolau@intel.com>, <gakhil@marvell.com>,\n <cristian.dumitrescu@intel.com>, <ferruh.yigit@amd.com>,\n <konstantin.ananyev@huawei.com>, <stephen@networkplumber.org>,\n <mb@smartsharesystems.com>, <david.marchand@redhat.com>",
        "CC": "<dev@dpdk.org>, <stable@dpdk.org>",
        "Subject": "[PATCH v7 06/14] examples/l3fwd-power: fix lcore ID restriction",
        "Date": "Tue, 26 Mar 2024 13:55:45 +0100",
        "Message-ID": "<20240326125554.138840-7-sivaprasad.tummala@amd.com>",
        "X-Mailer": "git-send-email 2.25.1",
        "In-Reply-To": "<20240326125554.138840-1-sivaprasad.tummala@amd.com>",
        "References": "<20240321184721.69040-1-sivaprasad.tummala@amd.com>\n <20240326125554.138840-1-sivaprasad.tummala@amd.com>",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain; charset=\"UTF-8\"",
        "Content-Transfer-Encoding": "8bit",
        "X-Originating-IP": "[10.180.168.240]",
        "X-ClientProxiedBy": "SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com\n (10.181.40.145)",
        "X-EOPAttributedMessage": "0",
        "X-MS-PublicTrafficType": "Email",
        "X-MS-TrafficTypeDiagnostic": "BN1PEPF00004687:EE_|MW4PR12MB7465:EE_",
        "X-MS-Office365-Filtering-Correlation-Id": "26a2ed49-7024-4d55-ce56-08dc4d943366",
        "X-MS-Exchange-SenderADCheck": "1",
        "X-MS-Exchange-AntiSpam-Relay": "0",
        "X-Microsoft-Antispam": "BCL:0;",
        "X-Microsoft-Antispam-Message-Info": "\n 8vHt8uIhyEb//X7yop69FcM/YYSy8DxFm/cKmMvJQ0V3CNKO3Dkcz18P954uwQbS7nUfZyjy91nP2Oc8vfVNky3mSexIpnRPU9d+4nxbY2r3rgzT6Kmkr/kvKV+ss1U2nMKOgQE9ddPfs56TP7sBGn72QzhLhFi/jiX38xBPuXq97W1NcdNSdNCbRG/wVkKxqZABea0dNYctxbpX1h7RQG2rVGBrpXmFxivNMPrRFIWhJq50LJy21k5Bou4G4SzrhR4jEYhKP65qf7IjolMT9lV+MamWrIvOuWrp4FdUpv9aEj37MYtbpdjx4Z6lVHUe6FA75jPPlhnlw0DKAug+6w7Ho44faRL4+zCP4z7+X8lDGe3VBsArc//AnDMaj4c5+yIhluwZDQ+81KTDj7rw8mGV5LMUI91C9StItsNutZBOxJHhOEX5sMBc6g4kQS87KoTos/F8lIMyshSXoCN5gRHvdPqgDcoo7f+dw98DpFJLs4SS7i4uQ0VOBWte774ZolttUWBrRZFqVTioujvKu/GFZ+bZ6j2m/FmwuyqFxyfj76VlMLFpkVrQkEoQFs1K27am9S6t2OkR1eBd3oX+224iMr37I3Iw0V1H2TtTQj1zWONIDQaOSqDSMZXnF/CQjzDHk7u7sw2Znc7YXIdUQqFxrTkcZQR/Nkp/1iZCZ7npkCuuslbYAabXK3UDzdHampCDxQsLw1ZLRd+TT4q9rn2YPRFrX1k23fhr7l3xQ+UkK4ZSO6Ebj4q+NZhjDhoYUpnG2whNsoGDinXyBG74rw==",
        "X-Forefront-Antispam-Report": "CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:;\n IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE;\n SFS:(13230031)(1800799015)(7416005)(36860700004)(82310400014)(376005)(921011);\n DIR:OUT; SFP:1101;",
        "X-OriginatorOrg": "amd.com",
        "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "26 Mar 2024 12:56:49.2173 (UTC)",
        "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 26a2ed49-7024-4d55-ce56-08dc4d943366",
        "X-MS-Exchange-CrossTenant-Id": "3dd8961f-e488-4e60-8e11-a82d994e183d",
        "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17];\n Helo=[SATLEXMB04.amd.com]",
        "X-MS-Exchange-CrossTenant-AuthSource": "\n BN1PEPF00004687.namprd05.prod.outlook.com",
        "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous",
        "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem",
        "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "MW4PR12MB7465",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "Currently the config option allows lcore IDs up to 255,\nirrespective of RTE_MAX_LCORES and needs to be fixed.\n\nThe patch fixes these constraints by allowing all\nlcore IDs up to RTE_MAX_LCORES.\n\nFixes: f88e7c175a68 (\"examples/l3fwd-power: add high/regular perf cores options\")\nCc: radu.nicolau@intel.com\nCc: stable@dpdk.org\n\nSigned-off-by: Sivaprasad Tummala <sivaprasad.tummala@amd.com>\nAcked-by: Morten Brørup <mb@smartsharesystems.com>\nAcked-by: Ferruh Yigit <ferruh.yigit@amd.com>\n---\n examples/l3fwd-power/main.c      | 18 +++++++++++-------\n examples/l3fwd-power/main.h      |  2 +-\n examples/l3fwd-power/perf_core.c | 11 ++++++++---\n 3 files changed, 20 insertions(+), 11 deletions(-)",
    "diff": "diff --git a/examples/l3fwd-power/main.c b/examples/l3fwd-power/main.c\nindex 50aea99428..eac92ef875 100644\n--- a/examples/l3fwd-power/main.c\n+++ b/examples/l3fwd-power/main.c\n@@ -1397,7 +1397,7 @@ static int\n check_lcore_params(void)\n {\n \tuint16_t queue, i;\n-\tuint8_t lcore;\n+\tuint32_t lcore;\n \tint socketid;\n \n \tfor (i = 0; i < nb_lcore_params; ++i) {\n@@ -1408,13 +1408,13 @@ check_lcore_params(void)\n \t\t}\n \t\tlcore = lcore_params[i].lcore_id;\n \t\tif (!rte_lcore_is_enabled(lcore)) {\n-\t\t\tprintf(\"error: lcore %hhu is not enabled in lcore \"\n+\t\t\tprintf(\"error: lcore %u is not enabled in lcore \"\n \t\t\t\t\t\t\t\"mask\\n\", lcore);\n \t\t\treturn -1;\n \t\t}\n \t\tif ((socketid = rte_lcore_to_socket_id(lcore) != 0) &&\n \t\t\t\t\t\t\t(numa_on == 0)) {\n-\t\t\tprintf(\"warning: lcore %hhu is on socket %d with numa \"\n+\t\t\tprintf(\"warning: lcore %u is on socket %d with numa \"\n \t\t\t\t\t\t\"off\\n\", lcore, socketid);\n \t\t}\n \t\tif (app_mode == APP_MODE_TELEMETRY && lcore == rte_lcore_id()) {\n@@ -1466,14 +1466,14 @@ static int\n init_lcore_rx_queues(void)\n {\n \tuint16_t i, nb_rx_queue;\n-\tuint8_t lcore;\n+\tuint32_t lcore;\n \n \tfor (i = 0; i < nb_lcore_params; ++i) {\n \t\tlcore = lcore_params[i].lcore_id;\n \t\tnb_rx_queue = lcore_conf[lcore].n_rx_queue;\n \t\tif (nb_rx_queue >= MAX_RX_QUEUE_PER_LCORE) {\n \t\t\tprintf(\"error: too many queues (%u) for lcore: %u\\n\",\n-\t\t\t\t(unsigned)nb_rx_queue + 1, (unsigned)lcore);\n+\t\t\t\t(unsigned int)nb_rx_queue + 1, lcore);\n \t\t\treturn -1;\n \t\t} else {\n \t\t\tlcore_conf[lcore].rx_queue_list[nb_rx_queue].port_id =\n@@ -1658,7 +1658,11 @@ parse_config(const char *q_arg)\n \tchar *str_fld[_NUM_FLD];\n \tint i;\n \tunsigned size;\n-\tunsigned int max_fld[_NUM_FLD] = {255, RTE_MAX_QUEUES_PER_PORT, 255};\n+\tunsigned int max_fld[_NUM_FLD] = {\n+\t\t255,\n+\t\tRTE_MAX_QUEUES_PER_PORT,\n+\t\tRTE_MAX_LCORE\n+\t};\n \n \tnb_lcore_params = 0;\n \n@@ -1691,7 +1695,7 @@ parse_config(const char *q_arg)\n \t\tlcore_params_array[nb_lcore_params].queue_id =\n \t\t\t\t(uint16_t)int_fld[FLD_QUEUE];\n \t\tlcore_params_array[nb_lcore_params].lcore_id =\n-\t\t\t\t(uint8_t)int_fld[FLD_LCORE];\n+\t\t\t\t(uint32_t)int_fld[FLD_LCORE];\n \t\t++nb_lcore_params;\n \t}\n \tlcore_params = lcore_params_array;\ndiff --git a/examples/l3fwd-power/main.h b/examples/l3fwd-power/main.h\nindex 40b5194726..194bd82102 100644\n--- a/examples/l3fwd-power/main.h\n+++ b/examples/l3fwd-power/main.h\n@@ -10,7 +10,7 @@\n struct lcore_params {\n \tuint16_t port_id;\n \tuint16_t queue_id;\n-\tuint8_t lcore_id;\n+\tuint32_t lcore_id;\n } __rte_cache_aligned;\n \n extern struct lcore_params *lcore_params;\ndiff --git a/examples/l3fwd-power/perf_core.c b/examples/l3fwd-power/perf_core.c\nindex f34442b9d0..fbd7864cb9 100644\n--- a/examples/l3fwd-power/perf_core.c\n+++ b/examples/l3fwd-power/perf_core.c\n@@ -24,7 +24,7 @@ struct perf_lcore_params {\n \tuint16_t port_id;\n \tuint16_t queue_id;\n \tuint8_t high_perf;\n-\tuint8_t lcore_idx;\n+\tuint32_t lcore_idx;\n } __rte_cache_aligned;\n \n static struct perf_lcore_params prf_lc_prms[MAX_LCORE_PARAMS];\n@@ -132,7 +132,12 @@ parse_perf_config(const char *q_arg)\n \tchar *str_fld[_NUM_FLD];\n \tint i;\n \tunsigned int size;\n-\tunsigned int max_fld[_NUM_FLD] = {255, RTE_MAX_QUEUES_PER_PORT, 255, 255};\n+\tunsigned int max_fld[_NUM_FLD] = {\n+\t\t255,\n+\t\tRTE_MAX_QUEUES_PER_PORT,\n+\t\t255,\n+\t\tRTE_MAX_LCORE\n+\t};\n \n \tnb_prf_lc_prms = 0;\n \n@@ -169,7 +174,7 @@ parse_perf_config(const char *q_arg)\n \t\tprf_lc_prms[nb_prf_lc_prms].high_perf =\n \t\t\t\t!!(uint8_t)int_fld[FLD_LCORE_HP];\n \t\tprf_lc_prms[nb_prf_lc_prms].lcore_idx =\n-\t\t\t\t(uint8_t)int_fld[FLD_LCORE_IDX];\n+\t\t\t\t(uint32_t)int_fld[FLD_LCORE_IDX];\n \t\t++nb_prf_lc_prms;\n \t}\n \n",
    "prefixes": [
        "v7",
        "06/14"
    ]
}