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GET /api/patches/139032/?format=api
{ "id": 139032, "url": "http://patchwork.dpdk.org/api/patches/139032/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/1712088530-24948-3-git-send-email-roretzla@linux.microsoft.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1712088530-24948-3-git-send-email-roretzla@linux.microsoft.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1712088530-24948-3-git-send-email-roretzla@linux.microsoft.com", "date": "2024-04-02T20:08:48", "name": "[v9,2/4] mbuf: remove rte marker fields", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "ea9372f8d3a684f6ae4f2ae431249d4c93c36dab", "submitter": { "id": 2077, "url": "http://patchwork.dpdk.org/api/people/2077/?format=api", "name": "Tyler Retzlaff", "email": "roretzla@linux.microsoft.com" }, "delegate": { "id": 1, "url": "http://patchwork.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/1712088530-24948-3-git-send-email-roretzla@linux.microsoft.com/mbox/", "series": [ { "id": 31658, "url": "http://patchwork.dpdk.org/api/series/31658/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=31658", "date": "2024-04-02T20:08:47", "name": "remove use of RTE_MARKER fields in libraries", "version": 9, "mbox": "http://patchwork.dpdk.org/series/31658/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/139032/comments/", "check": "warning", "checks": "http://patchwork.dpdk.org/api/patches/139032/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 503E343DCA;\n\tTue, 2 Apr 2024 22:09:12 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id DFA96402E8;\n\tTue, 2 Apr 2024 22:09:00 +0200 (CEST)", "from linux.microsoft.com (linux.microsoft.com [13.77.154.182])\n by mails.dpdk.org (Postfix) with ESMTP id 71C0A4028C\n for <dev@dpdk.org>; Tue, 2 Apr 2024 22:08:57 +0200 (CEST)", "by linux.microsoft.com (Postfix, from userid 1086)\n id 6F0B020E8BFF; Tue, 2 Apr 2024 13:08:56 -0700 (PDT)" ], "DKIM-Filter": "OpenDKIM Filter v2.11.0 linux.microsoft.com 6F0B020E8BFF", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com;\n s=default; t=1712088536;\n bh=8hP+FujZyTN03kmxDQRb3XWM++AbUHKa+oZbuClpqRQ=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=duTfmFMLk70mdopI5MZgJ/Z3I6wMXWxvh68JMX92gHfiDWOStQSwtpM8+ahOiygZS\n Tpt+bI0aSwDX19OgElUoIHjyxdjYG9eP8DC1yEJ0peZOmN7yhH08pM9Ehdizx9h54S\n rk56dB5VPwoAABLUcKzMRqzIfZvmp5rMUaYDheXM=", "From": "Tyler Retzlaff <roretzla@linux.microsoft.com>", "To": "dev@dpdk.org", "Cc": "Ajit Khaparde <ajit.khaparde@broadcom.com>,\n Andrew Boyer <andrew.boyer@amd.com>,\n Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>,\n Bruce Richardson <bruce.richardson@intel.com>,\n Chenbo Xia <chenbox@nvidia.com>, Chengwen Feng <fengchengwen@huawei.com>,\n Dariusz Sosnowski <dsosnowski@nvidia.com>,\n David Christensen <drc@linux.vnet.ibm.com>,\n Hyong Youb Kim <hyonkim@cisco.com>, Jerin Jacob <jerinj@marvell.com>,\n Jie Hai <haijie1@huawei.com>, Jingjing Wu <jingjing.wu@intel.com>,\n John Daley <johndale@cisco.com>, Kevin Laatz <kevin.laatz@intel.com>,\n Kiran Kumar K <kirankumark@marvell.com>,\n Konstantin Ananyev <konstantin.v.ananyev@yandex.ru>,\n Maciej Czekaj <mczekaj@marvell.com>, Matan Azrad <matan@nvidia.com>,\n Maxime Coquelin <maxime.coquelin@redhat.com>,\n Nithin Dabilpuram <ndabilpuram@marvell.com>, Ori Kam <orika@nvidia.com>,\n Ruifeng Wang <ruifeng.wang@arm.com>, Satha Rao <skoteshwar@marvell.com>,\n Somnath Kotur <somnath.kotur@broadcom.com>,\n Suanming Mou <suanmingm@nvidia.com>, Sunil Kumar Kori <skori@marvell.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>,\n Yisen Zhuang <yisen.zhuang@huawei.com>,\n Yuying Zhang <Yuying.Zhang@intel.com>, mb@smartsharesystems.com,\n Tyler Retzlaff <roretzla@linux.microsoft.com>", "Subject": "[PATCH v9 2/4] mbuf: remove rte marker fields", "Date": "Tue, 2 Apr 2024 13:08:48 -0700", "Message-Id": "<1712088530-24948-3-git-send-email-roretzla@linux.microsoft.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1712088530-24948-1-git-send-email-roretzla@linux.microsoft.com>", "References": "<1706657173-26166-1-git-send-email-roretzla@linux.microsoft.com>\n <1712088530-24948-1-git-send-email-roretzla@linux.microsoft.com>", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "RTE_MARKER typedefs are a GCC extension unsupported by MSVC. Remove\nRTE_MARKER fields from rte_mbuf struct.\n\nMaintain alignment of fields after removed cacheline1 marker by placing\nC11 alignas(RTE_CACHE_LINE_MIN_SIZE).\n\nProvide new rearm_data and rx_descriptor_fields1 fields in anonymous\nunions as single element arrays of with types matching the original\nmarkers to maintain API compatibility.\n\nThis change breaks the API for cacheline{0,1} fields that have been\nremoved from rte_mbuf but it does not break the ABI, to address the\nfalse positives of the removed (but 0 size fields) provide the minimum\nlibabigail.abignore for type = rte_mbuf.\n\nSigned-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>\n---\n devtools/libabigail.abignore | 6 +\n doc/guides/rel_notes/release_24_03.rst | 2 +\n lib/mbuf/rte_mbuf.h | 4 +-\n lib/mbuf/rte_mbuf_core.h | 200 +++++++++++++++++----------------\n 4 files changed, 114 insertions(+), 98 deletions(-)", "diff": "diff --git a/devtools/libabigail.abignore b/devtools/libabigail.abignore\nindex 645d289..ad13179 100644\n--- a/devtools/libabigail.abignore\n+++ b/devtools/libabigail.abignore\n@@ -37,3 +37,9 @@\n [suppress_type]\n \tname = rte_eth_fp_ops\n \thas_data_member_inserted_between = {offset_of(reserved2), end}\n+\n+[suppress_type]\n+\tname = rte_mbuf\n+\ttype_kind = struct\n+\thas_size_change = no\n+\thas_data_member = {cacheline0, rearm_data, rx_descriptor_fields1, cacheline1}\ndiff --git a/doc/guides/rel_notes/release_24_03.rst b/doc/guides/rel_notes/release_24_03.rst\nindex 013c12f..ffc0d62 100644\n--- a/doc/guides/rel_notes/release_24_03.rst\n+++ b/doc/guides/rel_notes/release_24_03.rst\n@@ -161,6 +161,8 @@ Removed Items\n \n * acc101: Removed obsolete code for non productized HW variant.\n \n+* mbuf: ``RTE_MARKER`` fields ``cacheline0`` and ``cacheline1``\n+ have been removed from ``struct rte_mbuf``.\n \n API Changes\n -----------\ndiff --git a/lib/mbuf/rte_mbuf.h b/lib/mbuf/rte_mbuf.h\nindex 286b32b..4c4722e 100644\n--- a/lib/mbuf/rte_mbuf.h\n+++ b/lib/mbuf/rte_mbuf.h\n@@ -108,7 +108,7 @@\n static inline void\n rte_mbuf_prefetch_part1(struct rte_mbuf *m)\n {\n-\trte_prefetch0(&m->cacheline0);\n+\trte_prefetch0(m);\n }\n \n /**\n@@ -126,7 +126,7 @@\n rte_mbuf_prefetch_part2(struct rte_mbuf *m)\n {\n #if RTE_CACHE_LINE_SIZE == 64\n-\trte_prefetch0(&m->cacheline1);\n+\trte_prefetch0(RTE_PTR_ADD(m, RTE_CACHE_LINE_MIN_SIZE));\n #else\n \tRTE_SET_USED(m);\n #endif\ndiff --git a/lib/mbuf/rte_mbuf_core.h b/lib/mbuf/rte_mbuf_core.h\nindex 9f58076..9d838b8 100644\n--- a/lib/mbuf/rte_mbuf_core.h\n+++ b/lib/mbuf/rte_mbuf_core.h\n@@ -465,8 +465,6 @@ enum {\n * The generic rte_mbuf, containing a packet mbuf.\n */\n struct __rte_cache_aligned rte_mbuf {\n-\tRTE_MARKER cacheline0;\n-\n \tvoid *buf_addr; /**< Virtual address of segment buffer. */\n #if RTE_IOVA_IN_MBUF\n \t/**\n@@ -488,127 +486,138 @@ struct __rte_cache_aligned rte_mbuf {\n #endif\n \n \t/* next 8 bytes are initialised on RX descriptor rearm */\n-\tRTE_MARKER64 rearm_data;\n-\tuint16_t data_off;\n-\n-\t/**\n-\t * Reference counter. Its size should at least equal to the size\n-\t * of port field (16 bits), to support zero-copy broadcast.\n-\t * It should only be accessed using the following functions:\n-\t * rte_mbuf_refcnt_update(), rte_mbuf_refcnt_read(), and\n-\t * rte_mbuf_refcnt_set(). The functionality of these functions (atomic,\n-\t * or non-atomic) is controlled by the RTE_MBUF_REFCNT_ATOMIC flag.\n-\t */\n-\tRTE_ATOMIC(uint16_t) refcnt;\n+\tunion {\n+\t\tuint64_t rearm_data[1];\n+\t\t__extension__\n+\t\tstruct {\n+\t\t\tuint16_t data_off;\n+\n+\t\t\t/**\n+\t\t\t * Reference counter. Its size should at least equal to the size\n+\t\t\t * of port field (16 bits), to support zero-copy broadcast.\n+\t\t\t * It should only be accessed using the following functions:\n+\t\t\t * rte_mbuf_refcnt_update(), rte_mbuf_refcnt_read(), and\n+\t\t\t * rte_mbuf_refcnt_set(). The functionality of these functions (atomic,\n+\t\t\t * or non-atomic) is controlled by the RTE_MBUF_REFCNT_ATOMIC flag.\n+\t\t\t */\n+\t\t\tRTE_ATOMIC(uint16_t) refcnt;\n \n-\t/**\n-\t * Number of segments. Only valid for the first segment of an mbuf\n-\t * chain.\n-\t */\n-\tuint16_t nb_segs;\n+\t\t\t/**\n+\t\t\t * Number of segments. Only valid for the first segment of an mbuf\n+\t\t\t * chain.\n+\t\t\t */\n+\t\t\tuint16_t nb_segs;\n \n-\t/** Input port (16 bits to support more than 256 virtual ports).\n-\t * The event eth Tx adapter uses this field to specify the output port.\n-\t */\n-\tuint16_t port;\n+\t\t\t/** Input port (16 bits to support more than 256 virtual ports).\n+\t\t\t * The event eth Tx adapter uses this field to specify the output port.\n+\t\t\t */\n+\t\t\tuint16_t port;\n+\t\t};\n+\t};\n \n \tuint64_t ol_flags; /**< Offload features. */\n \n-\t/* remaining bytes are set on RX when pulling packet from descriptor */\n-\tRTE_MARKER rx_descriptor_fields1;\n-\n-\t/*\n-\t * The packet type, which is the combination of outer/inner L2, L3, L4\n-\t * and tunnel types. The packet_type is about data really present in the\n-\t * mbuf. Example: if vlan stripping is enabled, a received vlan packet\n-\t * would have RTE_PTYPE_L2_ETHER and not RTE_PTYPE_L2_VLAN because the\n-\t * vlan is stripped from the data.\n-\t */\n+\t/* remaining 24 bytes are set on RX when pulling packet from descriptor */\n \tunion {\n-\t\tuint32_t packet_type; /**< L2/L3/L4 and tunnel information. */\n+\t\t/* void * type of the array elements is retained for driver compatibility. */\n+\t\tvoid *rx_descriptor_fields1[24 / sizeof(void *)];\n \t\t__extension__\n \t\tstruct {\n-\t\t\tuint8_t l2_type:4; /**< (Outer) L2 type. */\n-\t\t\tuint8_t l3_type:4; /**< (Outer) L3 type. */\n-\t\t\tuint8_t l4_type:4; /**< (Outer) L4 type. */\n-\t\t\tuint8_t tun_type:4; /**< Tunnel type. */\n+\t\t\t/*\n+\t\t\t * The packet type, which is the combination of outer/inner L2, L3, L4\n+\t\t\t * and tunnel types. The packet_type is about data really present in the\n+\t\t\t * mbuf. Example: if vlan stripping is enabled, a received vlan packet\n+\t\t\t * would have RTE_PTYPE_L2_ETHER and not RTE_PTYPE_L2_VLAN because the\n+\t\t\t * vlan is stripped from the data.\n+\t\t\t */\n \t\t\tunion {\n-\t\t\t\tuint8_t inner_esp_next_proto;\n-\t\t\t\t/**< ESP next protocol type, valid if\n-\t\t\t\t * RTE_PTYPE_TUNNEL_ESP tunnel type is set\n-\t\t\t\t * on both Tx and Rx.\n-\t\t\t\t */\n+\t\t\t\tuint32_t packet_type; /**< L2/L3/L4 and tunnel information. */\n \t\t\t\t__extension__\n \t\t\t\tstruct {\n-\t\t\t\t\tuint8_t inner_l2_type:4;\n-\t\t\t\t\t/**< Inner L2 type. */\n-\t\t\t\t\tuint8_t inner_l3_type:4;\n-\t\t\t\t\t/**< Inner L3 type. */\n+\t\t\t\t\tuint8_t l2_type:4; /**< (Outer) L2 type. */\n+\t\t\t\t\tuint8_t l3_type:4; /**< (Outer) L3 type. */\n+\t\t\t\t\tuint8_t l4_type:4; /**< (Outer) L4 type. */\n+\t\t\t\t\tuint8_t tun_type:4; /**< Tunnel type. */\n+\t\t\t\t\tunion {\n+\t\t\t\t\t\t/**< ESP next protocol type, valid if\n+\t\t\t\t\t\t * RTE_PTYPE_TUNNEL_ESP tunnel type is set\n+\t\t\t\t\t\t * on both Tx and Rx.\n+\t\t\t\t\t\t */\n+\t\t\t\t\t\tuint8_t inner_esp_next_proto;\n+\t\t\t\t\t\t__extension__\n+\t\t\t\t\t\tstruct {\n+\t\t\t\t\t\t\t/**< Inner L2 type. */\n+\t\t\t\t\t\t\tuint8_t inner_l2_type:4;\n+\t\t\t\t\t\t\t/**< Inner L3 type. */\n+\t\t\t\t\t\t\tuint8_t inner_l3_type:4;\n+\t\t\t\t\t\t};\n+\t\t\t\t\t};\n+\t\t\t\t\tuint8_t inner_l4_type:4; /**< Inner L4 type. */\n \t\t\t\t};\n \t\t\t};\n-\t\t\tuint8_t inner_l4_type:4; /**< Inner L4 type. */\n-\t\t};\n-\t};\n \n-\tuint32_t pkt_len; /**< Total pkt len: sum of all segments. */\n-\tuint16_t data_len; /**< Amount of data in segment buffer. */\n-\t/** VLAN TCI (CPU order), valid if RTE_MBUF_F_RX_VLAN is set. */\n-\tuint16_t vlan_tci;\n+\t\t\tuint32_t pkt_len; /**< Total pkt len: sum of all segments. */\n \n-\tunion {\n-\t\tunion {\n-\t\t\tuint32_t rss; /**< RSS hash result if RSS enabled */\n-\t\t\tstruct {\n+\t\t\tuint16_t data_len; /**< Amount of data in segment buffer. */\n+\t\t\t/** VLAN TCI (CPU order), valid if RTE_MBUF_F_RX_VLAN is set. */\n+\t\t\tuint16_t vlan_tci;\n+\n+\t\t\tunion {\n \t\t\t\tunion {\n+\t\t\t\t\tuint32_t rss; /**< RSS hash result if RSS enabled */\n \t\t\t\t\tstruct {\n-\t\t\t\t\t\tuint16_t hash;\n-\t\t\t\t\t\tuint16_t id;\n-\t\t\t\t\t};\n-\t\t\t\t\tuint32_t lo;\n-\t\t\t\t\t/**< Second 4 flexible bytes */\n-\t\t\t\t};\n-\t\t\t\tuint32_t hi;\n-\t\t\t\t/**< First 4 flexible bytes or FD ID, dependent\n-\t\t\t\t * on RTE_MBUF_F_RX_FDIR_* flag in ol_flags.\n-\t\t\t\t */\n-\t\t\t} fdir;\t/**< Filter identifier if FDIR enabled */\n-\t\t\tstruct rte_mbuf_sched sched;\n-\t\t\t/**< Hierarchical scheduler : 8 bytes */\n-\t\t\tstruct {\n-\t\t\t\tuint32_t reserved1;\n-\t\t\t\tuint16_t reserved2;\n-\t\t\t\tuint16_t txq;\n-\t\t\t\t/**< The event eth Tx adapter uses this field\n-\t\t\t\t * to store Tx queue id.\n-\t\t\t\t * @see rte_event_eth_tx_adapter_txq_set()\n-\t\t\t\t */\n-\t\t\t} txadapter; /**< Eventdev ethdev Tx adapter */\n-\t\t\tuint32_t usr;\n-\t\t\t/**< User defined tags. See rte_distributor_process() */\n-\t\t} hash; /**< hash information */\n-\t};\n+\t\t\t\t\t\tunion {\n+\t\t\t\t\t\t\tstruct {\n+\t\t\t\t\t\t\t\tuint16_t hash;\n+\t\t\t\t\t\t\t\tuint16_t id;\n+\t\t\t\t\t\t\t};\n+\t\t\t\t\t\t\t/**< Second 4 flexible bytes */\n+\t\t\t\t\t\t\tuint32_t lo;\n+\t\t\t\t\t\t};\n+\t\t\t\t\t\t/**< First 4 flexible bytes or FD ID, dependent\n+\t\t\t\t\t\t * on RTE_MBUF_F_RX_FDIR_* flag in ol_flags.\n+\t\t\t\t\t\t */\n+\t\t\t\t\t\tuint32_t hi;\n+\t\t\t\t\t} fdir;\t/**< Filter identifier if FDIR enabled */\n+\t\t\t\t\tstruct rte_mbuf_sched sched;\n+\t\t\t\t\t/**< Hierarchical scheduler : 8 bytes */\n+\t\t\t\t\tstruct {\n+\t\t\t\t\t\tuint32_t reserved1;\n+\t\t\t\t\t\tuint16_t reserved2;\n+\t\t\t\t\t\t/**< The event eth Tx adapter uses this field\n+\t\t\t\t\t\t * to store Tx queue id.\n+\t\t\t\t\t\t * @see rte_event_eth_tx_adapter_txq_set()\n+\t\t\t\t\t\t */\n+\t\t\t\t\t\tuint16_t txq;\n+\t\t\t\t\t} txadapter; /**< Eventdev ethdev Tx adapter */\n+\t\t\t\t\t/**< User defined tags. See rte_distributor_process() */\n+\t\t\t\t\tuint32_t usr;\n+\t\t\t\t} hash; /**< hash information */\n+\t\t\t};\n \n-\t/** Outer VLAN TCI (CPU order), valid if RTE_MBUF_F_RX_QINQ is set. */\n-\tuint16_t vlan_tci_outer;\n+\t\t\t/** Outer VLAN TCI (CPU order), valid if RTE_MBUF_F_RX_QINQ is set. */\n+\t\t\tuint16_t vlan_tci_outer;\n \n-\tuint16_t buf_len; /**< Length of segment buffer. */\n+\t\t\tuint16_t buf_len; /**< Length of segment buffer. */\n+\t\t};\n+\t};\n \n \tstruct rte_mempool *pool; /**< Pool from which mbuf was allocated. */\n \n \t/* second cache line - fields only used in slow path or on TX */\n-\talignas(RTE_CACHE_LINE_MIN_SIZE) RTE_MARKER cacheline1;\n-\n #if RTE_IOVA_IN_MBUF\n \t/**\n \t * Next segment of scattered packet. Must be NULL in the last\n \t * segment or in case of non-segmented packet.\n \t */\n+\talignas(RTE_CACHE_LINE_MIN_SIZE)\n \tstruct rte_mbuf *next;\n #else\n \t/**\n \t * Reserved for dynamic fields\n \t * when the next pointer is in first cache line (i.e. RTE_IOVA_IN_MBUF is 0).\n \t */\n+\talignas(RTE_CACHE_LINE_MIN_SIZE)\n \tuint64_t dynfield2;\n #endif\n \n@@ -617,17 +626,16 @@ struct __rte_cache_aligned rte_mbuf {\n \t\tuint64_t tx_offload; /**< combined for easy fetch */\n \t\t__extension__\n \t\tstruct {\n-\t\t\tuint64_t l2_len:RTE_MBUF_L2_LEN_BITS;\n \t\t\t/**< L2 (MAC) Header Length for non-tunneling pkt.\n \t\t\t * Outer_L4_len + ... + Inner_L2_len for tunneling pkt.\n \t\t\t */\n-\t\t\tuint64_t l3_len:RTE_MBUF_L3_LEN_BITS;\n+\t\t\tuint64_t l2_len:RTE_MBUF_L2_LEN_BITS;\n \t\t\t/**< L3 (IP) Header Length. */\n-\t\t\tuint64_t l4_len:RTE_MBUF_L4_LEN_BITS;\n+\t\t\tuint64_t l3_len:RTE_MBUF_L3_LEN_BITS;\n \t\t\t/**< L4 (TCP/UDP) Header Length. */\n-\t\t\tuint64_t tso_segsz:RTE_MBUF_TSO_SEGSZ_BITS;\n+\t\t\tuint64_t l4_len:RTE_MBUF_L4_LEN_BITS;\n \t\t\t/**< TCP TSO segment size */\n-\n+\t\t\tuint64_t tso_segsz:RTE_MBUF_TSO_SEGSZ_BITS;\n \t\t\t/*\n \t\t\t * Fields for Tx offloading of tunnels.\n \t\t\t * These are undefined for packets which don't request\n@@ -640,10 +648,10 @@ struct __rte_cache_aligned rte_mbuf {\n \t\t\t * Applications are expected to set appropriate tunnel\n \t\t\t * offload flags when they fill in these fields.\n \t\t\t */\n-\t\t\tuint64_t outer_l3_len:RTE_MBUF_OUTL3_LEN_BITS;\n \t\t\t/**< Outer L3 (IP) Hdr Length. */\n-\t\t\tuint64_t outer_l2_len:RTE_MBUF_OUTL2_LEN_BITS;\n+\t\t\tuint64_t outer_l3_len:RTE_MBUF_OUTL3_LEN_BITS;\n \t\t\t/**< Outer L2 (MAC) Hdr Length. */\n+\t\t\tuint64_t outer_l2_len:RTE_MBUF_OUTL2_LEN_BITS;\n \n \t\t\t/* uint64_t unused:RTE_MBUF_TXOFLD_UNUSED_BITS; */\n \t\t};\n", "prefixes": [ "v9", "2/4" ] }