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GET /api/patches/139621/?format=api
{ "id": 139621, "url": "http://patchwork.dpdk.org/api/patches/139621/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20240422154008.119800-2-hernan.vargas@intel.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20240422154008.119800-2-hernan.vargas@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20240422154008.119800-2-hernan.vargas@intel.com", "date": "2024-04-22T15:40:04", "name": "[v1,1/5] baseband/acc: remove ACC100 unused code", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "ebc3c48e501409e93dd0411dbe01b27498483654", "submitter": { "id": 2659, "url": "http://patchwork.dpdk.org/api/people/2659/?format=api", "name": "Hernan Vargas", "email": "hernan.vargas@intel.com" }, "delegate": { "id": 2642, "url": "http://patchwork.dpdk.org/api/users/2642/?format=api", "username": "mcoquelin", "first_name": "Maxime", "last_name": "Coquelin", "email": "maxime.coquelin@redhat.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20240422154008.119800-2-hernan.vargas@intel.com/mbox/", "series": [ { "id": 31804, "url": "http://patchwork.dpdk.org/api/series/31804/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=31804", "date": "2024-04-22T15:40:03", "name": "ACC100 improvements and clean up", "version": 1, "mbox": "http://patchwork.dpdk.org/series/31804/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/139621/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/139621/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 4AFC043EDB;\n\tMon, 22 Apr 2024 17:44:04 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 53B1B402F2;\n\tMon, 22 Apr 2024 17:44:01 +0200 (CEST)", "from mgamail.intel.com (mgamail.intel.com [198.175.65.13])\n by mails.dpdk.org (Postfix) with ESMTP id 402A5402F2\n for <dev@dpdk.org>; Mon, 22 Apr 2024 17:43:56 +0200 (CEST)", "from fmviesa003.fm.intel.com ([10.60.135.143])\n by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 22 Apr 2024 08:43:40 -0700", "from unknown (HELO csl-npg-qt0.la.intel.com) ([10.233.181.103])\n by fmviesa003.fm.intel.com with ESMTP; 22 Apr 2024 08:43:39 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1713800640; x=1745336640;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=z/ImpKkJ78+IZGOhksCHWi2rpArb0HDl6r/HbiFUzNw=;\n b=VjB8/DsF2MUYsmF2Jcdn//4RssM9SCabASV4IhvOWpFoCpvNValmygKD\n 86D0ZrLsD7lEub1eIhWaIiOkfcBxfQgoxqwo+Q74EjZtfbuEqpXJpjbcP\n /ENi8IrbwhCjrDinDu0S0jXaMiBBJcebb5WMBE6vWb7QO3DVv2jpovEHY\n Dv2KENhQyUwfonXIweZUF4YizGIruber6q5lJr2LgT0lLIDeEQUWCwZ9M\n LN1+7VbxhnMGoEQu7O0qK6e8TMwzX9P4JJqHcwundmP1LDXVy3gHyRHzV\n qjz4uQG8W/ckjOSCVQkUOJJAtUsVScTb1DgNwY8rLh822j3NaAoTwEans A==;", "X-CSE-ConnectionGUID": [ "LwSp/1FeTFSG0u/xJDSufQ==", "J2DGopcQRiC1jArWPCh0Aw==" ], "X-CSE-MsgGUID": [ "X2IP9KPFQUiU+2nKQ1odeA==", "ednZYu3YSBOFIaL1Yq33bw==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6600,9927,11052\"; a=\"20492698\"", "E=Sophos;i=\"6.07,220,1708416000\"; d=\"scan'208\";a=\"20492698\"", "E=Sophos;i=\"6.07,220,1708416000\"; d=\"scan'208\";a=\"28567530\"" ], "X-ExtLoop1": "1", "From": "Hernan Vargas <hernan.vargas@intel.com>", "To": "dev@dpdk.org, gakhil@marvell.com, trix@redhat.com,\n maxime.coquelin@redhat.com", "Cc": "nicolas.chautru@intel.com, qi.z.zhang@intel.com,\n Hernan Vargas <hernan.vargas@intel.com>", "Subject": "[PATCH v1 1/5] baseband/acc: remove ACC100 unused code", "Date": "Mon, 22 Apr 2024 08:40:04 -0700", "Message-Id": "<20240422154008.119800-2-hernan.vargas@intel.com>", "X-Mailer": "git-send-email 2.37.1", "In-Reply-To": "<20240422154008.119800-1-hernan.vargas@intel.com>", "References": "<20240422154008.119800-1-hernan.vargas@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Remove dead code and unused function in ACC100 driver.\n\nSigned-off-by: Hernan Vargas <hernan.vargas@intel.com>\n---\n drivers/baseband/acc/rte_acc100_pmd.c | 213 ++++++++------------------\n 1 file changed, 68 insertions(+), 145 deletions(-)", "diff": "diff --git a/drivers/baseband/acc/rte_acc100_pmd.c b/drivers/baseband/acc/rte_acc100_pmd.c\nindex 4f666e514b72..d6b0b9400c82 100644\n--- a/drivers/baseband/acc/rte_acc100_pmd.c\n+++ b/drivers/baseband/acc/rte_acc100_pmd.c\n@@ -1640,59 +1640,6 @@ acc100_dma_desc_ld_fill(struct rte_bbdev_dec_op *op,\n \treturn 0;\n }\n \n-static inline void\n-acc100_dma_desc_ld_update(struct rte_bbdev_dec_op *op,\n-\t\tstruct acc_dma_req_desc *desc,\n-\t\tstruct rte_mbuf *input, struct rte_mbuf *h_output,\n-\t\tuint32_t *in_offset, uint32_t *h_out_offset,\n-\t\tuint32_t *h_out_length,\n-\t\tunion acc_harq_layout_data *harq_layout)\n-{\n-\tint next_triplet = 1; /* FCW already done */\n-\tdesc->data_ptrs[next_triplet].address =\n-\t\t\trte_pktmbuf_iova_offset(input, *in_offset);\n-\tnext_triplet++;\n-\n-\tif (check_bit(op->ldpc_dec.op_flags,\n-\t\t\t\tRTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE)) {\n-\t\tstruct rte_bbdev_op_data hi = op->ldpc_dec.harq_combined_input;\n-\t\tdesc->data_ptrs[next_triplet].address = hi.offset;\n-#ifndef ACC100_EXT_MEM\n-\t\tdesc->data_ptrs[next_triplet].address =\n-\t\t\t\trte_pktmbuf_iova_offset(hi.data, hi.offset);\n-#endif\n-\t\tnext_triplet++;\n-\t}\n-\n-\tdesc->data_ptrs[next_triplet].address =\n-\t\t\trte_pktmbuf_iova_offset(h_output, *h_out_offset);\n-\t*h_out_length = desc->data_ptrs[next_triplet].blen;\n-\tnext_triplet++;\n-\n-\tif (check_bit(op->ldpc_dec.op_flags, RTE_BBDEV_LDPC_HQ_COMBINE_OUT_ENABLE)) {\n-\t\tstruct rte_bbdev_dec_op *prev_op;\n-\t\tuint32_t harq_idx, prev_harq_idx;\n-\t\tdesc->data_ptrs[next_triplet].address = op->ldpc_dec.harq_combined_output.offset;\n-\t\t/* Adjust based on previous operation */\n-\t\tprev_op = desc->op_addr;\n-\t\top->ldpc_dec.harq_combined_output.length =\n-\t\t\t\tprev_op->ldpc_dec.harq_combined_output.length;\n-\t\tharq_idx = hq_index(op->ldpc_dec.harq_combined_output.offset);\n-\t\tprev_harq_idx = hq_index(prev_op->ldpc_dec.harq_combined_output.offset);\n-\t\tharq_layout[harq_idx].val = harq_layout[prev_harq_idx].val;\n-#ifndef ACC100_EXT_MEM\n-\t\tstruct rte_bbdev_op_data ho =\n-\t\t\t\top->ldpc_dec.harq_combined_output;\n-\t\tdesc->data_ptrs[next_triplet].address =\n-\t\t\t\trte_pktmbuf_iova_offset(ho.data, ho.offset);\n-#endif\n-\t\tnext_triplet++;\n-\t}\n-\n-\top->ldpc_dec.hard_output.length += *h_out_length;\n-\tdesc->op_addr = op;\n-}\n-\n #ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE\n /* Validates turbo encoder parameters */\n static inline int\n@@ -2935,8 +2882,7 @@ derm_workaround_recommended(struct rte_bbdev_op_ldpc_dec *ldpc_dec, struct acc_q\n /** Enqueue one decode operations for ACC100 device in CB mode */\n static inline int\n enqueue_ldpc_dec_one_op_cb(struct acc_queue *q, struct rte_bbdev_dec_op *op,\n-\t\tuint16_t total_enqueued_cbs, bool same_op,\n-\t\tstruct rte_bbdev_queue_data *q_data)\n+\t\tuint16_t total_enqueued_cbs, struct rte_bbdev_queue_data *q_data)\n {\n \tint ret;\n \tif (unlikely(check_bit(op->ldpc_dec.op_flags,\n@@ -2969,93 +2915,73 @@ enqueue_ldpc_dec_one_op_cb(struct acc_queue *q, struct rte_bbdev_dec_op *op,\n #endif\n \tunion acc_harq_layout_data *harq_layout = q->d->harq_layout;\n \n-\tif (same_op) {\n-\t\tunion acc_dma_desc *prev_desc;\n-\t\tprev_desc = acc_desc(q, total_enqueued_cbs - 1);\n-\t\tuint8_t *prev_ptr = (uint8_t *) prev_desc;\n-\t\tuint8_t *new_ptr = (uint8_t *) desc;\n-\t\t/* Copy first 4 words and BDESCs */\n-\t\trte_memcpy(new_ptr, prev_ptr, ACC_5GUL_SIZE_0);\n-\t\trte_memcpy(new_ptr + ACC_5GUL_OFFSET_0,\n-\t\t\t\tprev_ptr + ACC_5GUL_OFFSET_0,\n-\t\t\t\tACC_5GUL_SIZE_1);\n-\t\tdesc->req.op_addr = prev_desc->req.op_addr;\n-\t\t/* Copy FCW */\n-\t\trte_memcpy(new_ptr + ACC_DESC_FCW_OFFSET,\n-\t\t\t\tprev_ptr + ACC_DESC_FCW_OFFSET,\n-\t\t\t\tACC_FCW_LD_BLEN);\n-\t\tacc100_dma_desc_ld_update(op, &desc->req, input, h_output,\n-\t\t\t\t&in_offset, &h_out_offset,\n-\t\t\t\t&h_out_length, harq_layout);\n-\t} else {\n-\t\tstruct acc_fcw_ld *fcw;\n-\t\tuint32_t seg_total_left;\n-\n-\t\tif (derm_workaround_recommended(&op->ldpc_dec, q)) {\n-\t\t\t#ifdef RTE_BBDEV_SDK_AVX512\n-\t\t\tstruct rte_bbdev_op_ldpc_dec *dec = &op->ldpc_dec;\n-\t\t\tstruct bblib_rate_dematching_5gnr_request derm_req;\n-\t\t\tstruct bblib_rate_dematching_5gnr_response derm_resp;\n-\t\t\tuint8_t *in;\n-\n-\t\t\t/* Checking input size is matching with E */\n-\t\t\tif (dec->input.data->data_len < (dec->cb_params.e % 65536)) {\n-\t\t\t\trte_bbdev_log(ERR, \"deRM: Input size mismatch\");\n-\t\t\t\treturn -EFAULT;\n-\t\t\t}\n-\t\t\t/* Run first deRM processing in SW */\n-\t\t\tin = rte_pktmbuf_mtod_offset(dec->input.data, uint8_t *, in_offset);\n-\t\t\tderm_req.p_in = (int8_t *) in;\n-\t\t\tderm_req.p_harq = (int8_t *) q->derm_buffer;\n-\t\t\tderm_req.base_graph = dec->basegraph;\n-\t\t\tderm_req.zc = dec->z_c;\n-\t\t\tderm_req.ncb = dec->n_cb;\n-\t\t\tderm_req.e = dec->cb_params.e;\n-\t\t\tif (derm_req.e > ACC_MAX_E) {\n-\t\t\t\trte_bbdev_log(WARNING,\n-\t\t\t\t\t\t\"deRM: E %d > %d max\",\n-\t\t\t\t\t\tderm_req.e, ACC_MAX_E);\n-\t\t\t\tderm_req.e = ACC_MAX_E;\n-\t\t\t}\n-\t\t\tderm_req.k0 = 0; /* Actual output from SDK */\n-\t\t\tderm_req.isretx = false;\n-\t\t\tderm_req.rvid = dec->rv_index;\n-\t\t\tderm_req.modulation_order = dec->q_m;\n-\t\t\tderm_req.start_null_index =\n-\t\t\t\t\t(dec->basegraph == 1 ? 22 : 10)\n-\t\t\t\t\t* dec->z_c - 2 * dec->z_c\n-\t\t\t\t\t- dec->n_filler;\n-\t\t\tderm_req.num_of_null = dec->n_filler;\n-\t\t\tbblib_rate_dematching_5gnr(&derm_req, &derm_resp);\n-\t\t\t/* Force back the HW DeRM */\n-\t\t\tdec->q_m = 1;\n-\t\t\tdec->cb_params.e = dec->n_cb - dec->n_filler;\n-\t\t\tdec->rv_index = 0;\n-\t\t\trte_memcpy(in, q->derm_buffer, dec->cb_params.e);\n-\t\t\t/* Capture counter when pre-processing is used */\n-\t\t\tq_data->queue_stats.enqueue_warn_count++;\n-\t\t\t#else\n-\t\t\tRTE_SET_USED(q_data);\n-\t\t\trte_bbdev_log(INFO, \"Corner case may require deRM pre-processing in SDK\");\n-\t\t\t#endif\n+\tstruct acc_fcw_ld *fcw;\n+\tuint32_t seg_total_left;\n+\n+\tif (derm_workaround_recommended(&op->ldpc_dec, q)) {\n+\t\t#ifdef RTE_BBDEV_SDK_AVX512\n+\t\tstruct rte_bbdev_op_ldpc_dec *dec = &op->ldpc_dec;\n+\t\tstruct bblib_rate_dematching_5gnr_request derm_req;\n+\t\tstruct bblib_rate_dematching_5gnr_response derm_resp;\n+\t\tuint8_t *in;\n+\n+\t\t/* Checking input size is matching with E */\n+\t\tif (dec->input.data->data_len < (dec->cb_params.e % 65536)) {\n+\t\t\trte_bbdev_log(ERR, \"deRM: Input size mismatch\");\n+\t\t\treturn -EFAULT;\n \t\t}\n+\t\t/* Run first deRM processing in SW */\n+\t\tin = rte_pktmbuf_mtod_offset(dec->input.data, uint8_t *, in_offset);\n+\t\tderm_req.p_in = (int8_t *) in;\n+\t\tderm_req.p_harq = (int8_t *) q->derm_buffer;\n+\t\tderm_req.base_graph = dec->basegraph;\n+\t\tderm_req.zc = dec->z_c;\n+\t\tderm_req.ncb = dec->n_cb;\n+\t\tderm_req.e = dec->cb_params.e;\n+\t\tif (derm_req.e > ACC_MAX_E) {\n+\t\t\trte_bbdev_log(WARNING,\n+\t\t\t\t\t\"deRM: E %d > %d max\",\n+\t\t\t\t\tderm_req.e, ACC_MAX_E);\n+\t\t\tderm_req.e = ACC_MAX_E;\n+\t\t}\n+\t\tderm_req.k0 = 0; /* Actual output from SDK */\n+\t\tderm_req.isretx = false;\n+\t\tderm_req.rvid = dec->rv_index;\n+\t\tderm_req.modulation_order = dec->q_m;\n+\t\tderm_req.start_null_index =\n+\t\t\t\t(dec->basegraph == 1 ? 22 : 10)\n+\t\t\t\t* dec->z_c - 2 * dec->z_c\n+\t\t\t\t- dec->n_filler;\n+\t\tderm_req.num_of_null = dec->n_filler;\n+\t\tbblib_rate_dematching_5gnr(&derm_req, &derm_resp);\n+\t\t/* Force back the HW DeRM */\n+\t\tdec->q_m = 1;\n+\t\tdec->cb_params.e = dec->n_cb - dec->n_filler;\n+\t\tdec->rv_index = 0;\n+\t\trte_memcpy(in, q->derm_buffer, dec->cb_params.e);\n+\t\t/* Capture counter when pre-processing is used */\n+\t\tq_data->queue_stats.enqueue_warn_count++;\n+\t\t#else\n+\t\tRTE_SET_USED(q_data);\n+\t\trte_bbdev_log(INFO, \"Corner case may require deRM pre-processing in SDK\");\n+\t\t#endif\n+\t}\n \n-\t\tfcw = &desc->req.fcw_ld;\n-\t\tq->d->fcw_ld_fill(op, fcw, harq_layout);\n+\tfcw = &desc->req.fcw_ld;\n+\tq->d->fcw_ld_fill(op, fcw, harq_layout);\n \n-\t\t/* Special handling when using mbuf or not */\n-\t\tif (check_bit(op->ldpc_dec.op_flags, RTE_BBDEV_LDPC_DEC_SCATTER_GATHER))\n-\t\t\tseg_total_left = rte_pktmbuf_data_len(input) - in_offset;\n-\t\telse\n-\t\t\tseg_total_left = fcw->rm_e;\n+\t/* Special handling when using mbuf or not */\n+\tif (check_bit(op->ldpc_dec.op_flags, RTE_BBDEV_LDPC_DEC_SCATTER_GATHER))\n+\t\tseg_total_left = rte_pktmbuf_data_len(input) - in_offset;\n+\telse\n+\t\tseg_total_left = fcw->rm_e;\n \n-\t\tret = acc100_dma_desc_ld_fill(op, &desc->req, &input, h_output,\n-\t\t\t\t&in_offset, &h_out_offset,\n-\t\t\t\t&h_out_length, &mbuf_total_left,\n-\t\t\t\t&seg_total_left, fcw);\n-\t\tif (unlikely(ret < 0))\n-\t\t\treturn ret;\n-\t}\n+\tret = acc100_dma_desc_ld_fill(op, &desc->req, &input, h_output,\n+\t\t\t&in_offset, &h_out_offset,\n+\t\t\t&h_out_length, &mbuf_total_left,\n+\t\t\t&seg_total_left, fcw);\n+\tif (unlikely(ret < 0))\n+\t\treturn ret;\n \n \t/* Hard output */\n \tmbuf_append(h_output_head, h_output, h_out_length);\n@@ -3553,7 +3479,7 @@ acc100_enqueue_ldpc_dec_cb(struct rte_bbdev_queue_data *q_data,\n \tint32_t avail = acc_ring_avail_enq(q);\n \tuint16_t i;\n \tint ret;\n-\tbool same_op = false;\n+\n \tfor (i = 0; i < num; ++i) {\n \t\t/* Check if there are available space for further processing */\n \t\tif (unlikely(avail < 1)) {\n@@ -3562,16 +3488,13 @@ acc100_enqueue_ldpc_dec_cb(struct rte_bbdev_queue_data *q_data,\n \t\t}\n \t\tavail -= 1;\n \n-\t\tif (i > 0)\n-\t\t\tsame_op = cmp_ldpc_dec_op(&ops[i-1]);\n-\t\trte_bbdev_log(INFO, \"Op %d %d %d %d %d %d %d %d %d %d %d %d\\n\",\n+\t\trte_bbdev_log(INFO, \"Op %d %d %d %d %d %d %d %d %d %d %d\\n\",\n \t\t\ti, ops[i]->ldpc_dec.op_flags, ops[i]->ldpc_dec.rv_index,\n \t\t\tops[i]->ldpc_dec.iter_max, ops[i]->ldpc_dec.iter_count,\n \t\t\tops[i]->ldpc_dec.basegraph, ops[i]->ldpc_dec.z_c,\n \t\t\tops[i]->ldpc_dec.n_cb, ops[i]->ldpc_dec.q_m,\n-\t\t\tops[i]->ldpc_dec.n_filler, ops[i]->ldpc_dec.cb_params.e,\n-\t\t\tsame_op);\n-\t\tret = enqueue_ldpc_dec_one_op_cb(q, ops[i], i, same_op, q_data);\n+\t\t\tops[i]->ldpc_dec.n_filler, ops[i]->ldpc_dec.cb_params.e);\n+\t\tret = enqueue_ldpc_dec_one_op_cb(q, ops[i], i, q_data);\n \t\tif (ret < 0) {\n \t\t\tacc_enqueue_invalid(q_data);\n \t\t\tbreak;\n", "prefixes": [ "v1", "1/5" ] }