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GET /api/patches/139656/?format=api
{ "id": 139656, "url": "http://patchwork.dpdk.org/api/patches/139656/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/c45db330d98cf93570c8783e44b93677e23a4deb.1713964708.git.anatoly.burakov@intel.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<c45db330d98cf93570c8783e44b93677e23a4deb.1713964708.git.anatoly.burakov@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/c45db330d98cf93570c8783e44b93677e23a4deb.1713964708.git.anatoly.burakov@intel.com", "date": "2024-04-24T13:21:45", "name": "[v1,11/22] net/ixgbe/base: replace HIC with direct register access", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "386317fb5c84773ecb26212d1501110a697beec5", "submitter": { "id": 4, "url": "http://patchwork.dpdk.org/api/people/4/?format=api", "name": "Anatoly Burakov", "email": "anatoly.burakov@intel.com" }, "delegate": { "id": 10, "url": "http://patchwork.dpdk.org/api/users/10/?format=api", "username": "bruce", "first_name": "Bruce", "last_name": "Richardson", "email": "bruce.richardson@intel.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/c45db330d98cf93570c8783e44b93677e23a4deb.1713964708.git.anatoly.burakov@intel.com/mbox/", "series": [ { "id": 31814, "url": "http://patchwork.dpdk.org/api/series/31814/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=31814", "date": "2024-04-24T13:21:34", "name": "Update IXGBE base driver", "version": 1, "mbox": "http://patchwork.dpdk.org/series/31814/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/139656/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/139656/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id E1A5643EAD;\n\tWed, 24 Apr 2024 15:23:36 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 20DED4349D;\n\tWed, 24 Apr 2024 15:22:44 +0200 (CEST)", "from mgamail.intel.com (mgamail.intel.com [192.198.163.9])\n by mails.dpdk.org (Postfix) with ESMTP id A1BFB434BC\n for <dev@dpdk.org>; Wed, 24 Apr 2024 15:22:41 +0200 (CEST)", "from fmviesa006.fm.intel.com ([10.60.135.146])\n by fmvoesa103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 24 Apr 2024 06:22:41 -0700", "from silpixa00401119.ir.intel.com ([10.55.129.167])\n by fmviesa006.fm.intel.com with ESMTP; 24 Apr 2024 06:22:39 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1713964962; x=1745500962;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=TtwpR2fF2mh/hl/L3hZxCjAqYlr8MD5kx5h7Q1JadU4=;\n b=DygZymZo96Rv0azxyIJyrFA9RW+UTlXfpaoOXikYVtRK1fqQEIoJF/gV\n xZTb/KbFx6kRp8wreExIkqO5axZeEJ2qNEH4M+3e2EdYg/0JUIn9pTO3x\n bfUdBCxZBEN/i0SHPZdu+sFRoSCwTud7LEuSD2/WL3jxRH2Z323ag66xi\n yo9w0VfjVKBkfHsHNMx9PbCYkRXvrPZnYNe9ysBbUidfFwBWEOjBnxufn\n k7Ypiv8o43mAMeorftCy40+UR5J1FiRR/A9sefbF7SZwfr0H+zWoLmmzd\n RZjwNq4j2IegaainnTRkTb3VF2VUMVNy9Y46Ts+5/Rn6fFwvToDhQNovt g==;", "X-CSE-ConnectionGUID": [ "VTs4l2MQQKCfoJ3BmFraIQ==", "S9W+d+nHToGTk0DN6GD8GQ==" ], "X-CSE-MsgGUID": [ "lkk7Hy2mTWy6OU1RTqwg1Q==", "xTlSz+wWTVemNeHLIHcY/w==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6600,9927,11054\"; a=\"20289267\"", "E=Sophos;i=\"6.07,226,1708416000\"; d=\"scan'208\";a=\"20289267\"", "E=Sophos;i=\"6.07,226,1708416000\"; d=\"scan'208\";a=\"24749428\"" ], "X-ExtLoop1": "1", "From": "Anatoly Burakov <anatoly.burakov@intel.com>", "To": "dev@dpdk.org", "Cc": "Mical MarekX <marekx.mical@intel.com>,\n\tvladimir.medvedkin@intel.com, bruce.richardson@intel.com,\n\tGalazka@dpdk.org, Krzysztof <krzysztof.galazka@intel.com>,\n\tEryk Rybak <eryk.roch.rybak@intel.com>, Racicot@dpdk.org,\n\tFrancis <Francis.Racicot@intel.com>, Michael@dpdk.org,\n\tAlice <alice.michael@intel.com>", "Subject": "[PATCH v1 11/22] net/ixgbe/base: replace HIC with direct register\n access", "Date": "Wed, 24 Apr 2024 14:21:45 +0100", "Message-ID": "\n <c45db330d98cf93570c8783e44b93677e23a4deb.1713964708.git.anatoly.burakov@intel.com>", "X-Mailer": "git-send-email 2.43.0", "In-Reply-To": "<cover.1713964707.git.anatoly.burakov@intel.com>", "References": "<cover.1713964707.git.anatoly.burakov@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Mical MarekX <marekx.mical@intel.com>\n\nUnifying FW access method to direct register read/writes across\nall Atom(R) C3000 products. Atom(R) C3000 fiber exhibited an issue with\nthe Host Interface Command execution being locked when\nanother LAN function attempted to acquire the SWFW sync\non Manageability Host. This resulted in HIC atomicity break\nand bogus data being read since the other LAN function\ncleared all semaphores on timeout whereas HIC execution\ncontinued after unlock. Direct register IOSF access showed\nhigher stability and reliability.\n\nSigned-off-by: Mical MarekX <marekx.mical@intel.com>\nReviewed-by: Galazka, Krzysztof <krzysztof.galazka@intel.com>\nReviewed-by: Eryk Rybak <eryk.roch.rybak@intel.com>\nReviewed-by: Racicot, Francis <Francis.Racicot@intel.com>\nReviewed-by: Michael, Alice <alice.michael@intel.com>\n---\n drivers/net/ixgbe/base/ixgbe_x550.c | 76 +----------------------------\n drivers/net/ixgbe/base/ixgbe_x550.h | 4 --\n 2 files changed, 2 insertions(+), 78 deletions(-)", "diff": "diff --git a/drivers/net/ixgbe/base/ixgbe_x550.c b/drivers/net/ixgbe/base/ixgbe_x550.c\nindex 844c06cc08..ebfc78235e 100644\n--- a/drivers/net/ixgbe/base/ixgbe_x550.c\n+++ b/drivers/net/ixgbe/base/ixgbe_x550.c\n@@ -764,14 +764,8 @@ s32 ixgbe_init_ops_X550EM_a(struct ixgbe_hw *hw)\n \t/* Start with generic X550EM init */\n \tret_val = ixgbe_init_ops_X550EM(hw);\n \n-\tif (hw->device_id == IXGBE_DEV_ID_X550EM_A_SGMII ||\n-\t hw->device_id == IXGBE_DEV_ID_X550EM_A_SGMII_L) {\n-\t\tmac->ops.read_iosf_sb_reg = ixgbe_read_iosf_sb_reg_x550;\n-\t\tmac->ops.write_iosf_sb_reg = ixgbe_write_iosf_sb_reg_x550;\n-\t} else {\n-\t\tmac->ops.read_iosf_sb_reg = ixgbe_read_iosf_sb_reg_x550a;\n-\t\tmac->ops.write_iosf_sb_reg = ixgbe_write_iosf_sb_reg_x550a;\n-\t}\n+\tmac->ops.read_iosf_sb_reg = ixgbe_read_iosf_sb_reg_x550;\n+\tmac->ops.write_iosf_sb_reg = ixgbe_write_iosf_sb_reg_x550;\n \tmac->ops.acquire_swfw_sync = ixgbe_acquire_swfw_sync_X550a;\n \tmac->ops.release_swfw_sync = ixgbe_release_swfw_sync_X550a;\n \n@@ -1252,72 +1246,6 @@ s32 ixgbe_put_phy_token(struct ixgbe_hw *hw)\n \treturn IXGBE_ERR_FW_RESP_INVALID;\n }\n \n-/**\n- * ixgbe_write_iosf_sb_reg_x550a - Writes a value to specified register\n- * of the IOSF device\n- * @hw: pointer to hardware structure\n- * @reg_addr: 32 bit PHY register to write\n- * @device_type: 3 bit device type\n- * @data: Data to write to the register\n- **/\n-s32 ixgbe_write_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,\n-\t\t\t\t u32 device_type, u32 data)\n-{\n-\tstruct ixgbe_hic_internal_phy_req write_cmd;\n-\ts32 status;\n-\tUNREFERENCED_1PARAMETER(device_type);\n-\n-\tmemset(&write_cmd, 0, sizeof(write_cmd));\n-\twrite_cmd.hdr.cmd = FW_INT_PHY_REQ_CMD;\n-\twrite_cmd.hdr.buf_len = FW_INT_PHY_REQ_LEN;\n-\twrite_cmd.hdr.checksum = FW_DEFAULT_CHECKSUM;\n-\twrite_cmd.port_number = hw->bus.lan_id;\n-\twrite_cmd.command_type = FW_INT_PHY_REQ_WRITE;\n-\twrite_cmd.address = IXGBE_CPU_TO_BE16(reg_addr);\n-\twrite_cmd.write_data = IXGBE_CPU_TO_BE32(data);\n-\n-\tstatus = ixgbe_host_interface_command(hw, (u32 *)&write_cmd,\n-\t\t\t\t\t sizeof(write_cmd),\n-\t\t\t\t\t IXGBE_HI_COMMAND_TIMEOUT, false);\n-\n-\treturn status;\n-}\n-\n-/**\n- * ixgbe_read_iosf_sb_reg_x550a - Reads specified register of the IOSF device\n- * @hw: pointer to hardware structure\n- * @reg_addr: 32 bit PHY register to write\n- * @device_type: 3 bit device type\n- * @data: Pointer to read data from the register\n- **/\n-s32 ixgbe_read_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,\n-\t\t\t\t u32 device_type, u32 *data)\n-{\n-\tunion {\n-\t\tstruct ixgbe_hic_internal_phy_req cmd;\n-\t\tstruct ixgbe_hic_internal_phy_resp rsp;\n-\t} hic;\n-\ts32 status;\n-\tUNREFERENCED_1PARAMETER(device_type);\n-\n-\tmemset(&hic, 0, sizeof(hic));\n-\thic.cmd.hdr.cmd = FW_INT_PHY_REQ_CMD;\n-\thic.cmd.hdr.buf_len = FW_INT_PHY_REQ_LEN;\n-\thic.cmd.hdr.checksum = FW_DEFAULT_CHECKSUM;\n-\thic.cmd.port_number = hw->bus.lan_id;\n-\thic.cmd.command_type = FW_INT_PHY_REQ_READ;\n-\thic.cmd.address = IXGBE_CPU_TO_BE16(reg_addr);\n-\n-\tstatus = ixgbe_host_interface_command(hw, (u32 *)&hic.cmd,\n-\t\t\t\t\t sizeof(hic.cmd),\n-\t\t\t\t\t IXGBE_HI_COMMAND_TIMEOUT, true);\n-\n-\t/* Extract the register value from the response. */\n-\t*data = IXGBE_BE32_TO_CPU(hic.rsp.read_data);\n-\n-\treturn status;\n-}\n-\n /**\n * ixgbe_disable_mdd_X550\n * @hw: pointer to hardware structure\ndiff --git a/drivers/net/ixgbe/base/ixgbe_x550.h b/drivers/net/ixgbe/base/ixgbe_x550.h\nindex 10086ab423..cff107e2ab 100644\n--- a/drivers/net/ixgbe/base/ixgbe_x550.h\n+++ b/drivers/net/ixgbe/base/ixgbe_x550.h\n@@ -40,10 +40,6 @@ s32 ixgbe_set_fw_drv_ver_x550(struct ixgbe_hw *hw, u8 maj, u8 min,\n \t\t\t u8 build, u8 ver, u16 len, const char *str);\n s32 ixgbe_get_phy_token(struct ixgbe_hw *);\n s32 ixgbe_put_phy_token(struct ixgbe_hw *);\n-s32 ixgbe_write_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,\n-\tu32 device_type, u32 data);\n-s32 ixgbe_read_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,\n-\tu32 device_type, u32 *data);\n void ixgbe_disable_mdd_X550(struct ixgbe_hw *hw);\n void ixgbe_enable_mdd_X550(struct ixgbe_hw *hw);\n void ixgbe_mdd_event_X550(struct ixgbe_hw *hw, u32 *vf_bitmap);\n", "prefixes": [ "v1", "11/22" ] }