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GET /api/patches/40875/?format=api
{ "id": 40875, "url": "http://patchwork.dpdk.org/api/patches/40875/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/1528476325-15585-15-git-send-email-anoob.joseph@caviumnetworks.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1528476325-15585-15-git-send-email-anoob.joseph@caviumnetworks.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1528476325-15585-15-git-send-email-anoob.joseph@caviumnetworks.com", "date": "2018-06-08T16:45:23", "name": "[dpdk-dev,14/16] crypto/cpt: adds the enqueue and dequeue callbacks", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "92cf051d8264be387a59de159af5fa6952482606", "submitter": { "id": 893, "url": "http://patchwork.dpdk.org/api/people/893/?format=api", "name": "Anoob Joseph", "email": "anoob.joseph@caviumnetworks.com" }, "delegate": { "id": 6690, "url": "http://patchwork.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/1528476325-15585-15-git-send-email-anoob.joseph@caviumnetworks.com/mbox/", "series": [ { "id": 58, "url": "http://patchwork.dpdk.org/api/series/58/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=58", "date": "2018-06-08T16:45:09", "name": "Adding Cavium's crypto device(CPT) driver", "version": 1, "mbox": "http://patchwork.dpdk.org/series/58/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/40875/comments/", "check": "warning", "checks": "http://patchwork.dpdk.org/api/patches/40875/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 53D9C1BB0E;\n\tFri, 8 Jun 2018 18:49:45 +0200 (CEST)", "from NAM02-SN1-obe.outbound.protection.outlook.com\n\t(mail-sn1nam02on0045.outbound.protection.outlook.com [104.47.36.45])\n\tby dpdk.org (Postfix) with ESMTP id B32801BB0E\n\tfor <dev@dpdk.org>; Fri, 8 Jun 2018 18:49:42 +0200 (CEST)", "from ajoseph83.caveonetworks.com.caveonetworks.com (115.113.156.2)\n\tby SN6PR07MB4911.namprd07.prod.outlook.com (2603:10b6:805:3c::29)\n\twith Microsoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.820.15;\n\tFri, 8 Jun 2018 16:49:35 +0000" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=CAVIUMNETWORKS.onmicrosoft.com; s=selector1-cavium-com;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n\tbh=eiGo7RaG8qB3pVKcOrdElJOaAlgUEyioBfLa3KQDsUo=;\n\tb=I0QXBsdPY5aipImp7f4KeOCVM3W3/SyxTV6d0EpIFxRcGC0Nede/oJF4kZnyedN1g40JhVuQRhVw+BG2Tz2Fg8o/2d6V2bEsZJFhmdXK8SG51HdGmhmE1QI+Hp1CcUeAu5x9JrZT2/8Ttk0irhwG/FCNfG+gddauiE7yP6VEbPs=", "Authentication-Results": "spf=none (sender IP is )\n\tsmtp.mailfrom=Anoob.Joseph@cavium.com; ", "From": "Anoob Joseph <anoob.joseph@caviumnetworks.com>", "To": "Akhil Goyal <akhil.goyal@nxp.com>,\n\tPablo de Lara <pablo.de.lara.guarch@intel.com>,\n\tThomas Monjalon <thomas@monjalon.net>", "Cc": "Ragothaman Jayaraman <Ragothaman.Jayaraman@cavium.com>,\n\tAnkur Dwivedi <ankur.dwivedi@cavium.com>,\n\tJerin Jacob <jerin.jacob@caviumnetworks.com>,\n\tMurthy NSSR <Nidadavolu.Murthy@cavium.com>,\n\tNarayana Prasad <narayanaprasad.athreya@caviumnetworks.com>,\n\tNithin Dabilpuram <nithin.dabilpuram@cavium.com>,\n\tSrisivasubramanian Srinivasan\n\t<Srisivasubramanian.Srinivasan@cavium.com>, dev@dpdk.org", "Date": "Fri, 8 Jun 2018 22:15:23 +0530", "Message-Id": "<1528476325-15585-15-git-send-email-anoob.joseph@caviumnetworks.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1528476325-15585-1-git-send-email-anoob.joseph@caviumnetworks.com>", "References": "<1528476325-15585-1-git-send-email-anoob.joseph@caviumnetworks.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[115.113.156.2]", "X-ClientProxiedBy": "BM1PR01CA0071.INDPRD01.PROD.OUTLOOK.COM\n\t(2603:1096:b00:1::11) To SN6PR07MB4911.namprd07.prod.outlook.com\n\t(2603:10b6:805:3c::29)", "X-MS-PublicTrafficType": "Email", "X-Microsoft-Antispam": "UriScan:; BCL:0; PCL:0;\n\tRULEID:(7020095)(4652020)(5600026)(4534165)(7168020)(4627221)(201703031133081)(201702281549075)(2017052603328)(7153060)(7193020);\n\tSRVR:SN6PR07MB4911; ", "X-Microsoft-Exchange-Diagnostics": [ "1; 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"yVkvjm9qrIOvS/NUC4lJl7QCwQ/gJHMP3LLUn7OU6xDCXMMF/lx0ZzYxdXwxMcnSEJLTygwz7v0VnO9X5mdvjPN+c+jKMQctlHmVtvCX/3v3CYrB0yIm2SS7lyl8FZhn0sRyFTGbjK5BQHFJtbRasdihksswJHk92/WzFc1Uu6vsIKO7XaB9e5LZ5dF7Qpie", "SpamDiagnosticOutput": "1:99", "SpamDiagnosticMetadata": "NSPM", "X-MS-Office365-Filtering-Correlation-Id": "a6839154-0938-4526-6b79-08d5cd5fd371", "X-OriginatorOrg": "caviumnetworks.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "08 Jun 2018 16:49:35.9447\n\t(UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "a6839154-0938-4526-6b79-08d5cd5fd371", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "711e4ccf-2e9b-4bcf-a551-4094005b6194", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "SN6PR07MB4911", "Subject": "[dpdk-dev] [PATCH 14/16] crypto/cpt: adds the enqueue and dequeue\n\tcallbacks", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Ragothaman Jayaraman <Ragothaman.Jayaraman@cavium.com>\n\nThe functions present in cpt_request_mgr.c manages the work of\nenqueing/dequeing the request/response to/from cpt hardware unit.\n\nSigned-off-by: Ankur Dwivedi <ankur.dwivedi@cavium.com>\nSigned-off-by: Murthy NSSR <Nidadavolu.Murthy@cavium.com>\nSigned-off-by: Nithin Dabilpuram <nithin.dabilpuram@cavium.com>\nSigned-off-by: Ragothaman Jayaraman <Ragothaman.Jayaraman@cavium.com>\nSigned-off-by: Srisivasubramanian Srinivasan <Srisivasubramanian.Srinivasan@cavium.com>\n---\n drivers/crypto/cpt/Makefile | 1 +\n drivers/crypto/cpt/cpt_pmd_cryptodev.c | 4 +-\n drivers/crypto/cpt/cpt_pmd_ops.c | 859 +++++++++++++++++++++++++++++++++\n drivers/crypto/cpt/cpt_pmd_ops.h | 10 +\n 4 files changed, 872 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/crypto/cpt/Makefile b/drivers/crypto/cpt/Makefile\nindex bf22c2b..63553e0 100644\n--- a/drivers/crypto/cpt/Makefile\n+++ b/drivers/crypto/cpt/Makefile\n@@ -29,6 +29,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_PMD_CPT) += cpt_pmd_ops.c\n \n # Base code\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_CPT) += cpt_device.c\n+SRCS-$(CONFIG_RTE_LIBRTE_PMD_CPT) += cpt_request_mgr.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_CPT) += cpt_ops.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_CPT) += cpt8xxx_device.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_CPT) += cpt_vf_mbox.c\ndiff --git a/drivers/crypto/cpt/cpt_pmd_cryptodev.c b/drivers/crypto/cpt/cpt_pmd_cryptodev.c\nindex 939f31b..45e052f 100644\n--- a/drivers/crypto/cpt/cpt_pmd_cryptodev.c\n+++ b/drivers/crypto/cpt/cpt_pmd_cryptodev.c\n@@ -137,8 +137,8 @@ static int init_global_resources(void)\n \n \tc_dev->dev_ops = &cptvf_ops;\n \n-\tc_dev->enqueue_burst = NULL;\n-\tc_dev->dequeue_burst = NULL;\n+\tc_dev->enqueue_burst = cpt_pmd_pkt_enqueue;\n+\tc_dev->dequeue_burst = cpt_pmd_pkt_dequeue;\n \n \tc_dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |\n \t\t\tRTE_CRYPTODEV_FF_HW_ACCELERATED |\ndiff --git a/drivers/crypto/cpt/cpt_pmd_ops.c b/drivers/crypto/cpt/cpt_pmd_ops.c\nindex 37808ce..d10caf5 100644\n--- a/drivers/crypto/cpt/cpt_pmd_ops.c\n+++ b/drivers/crypto/cpt/cpt_pmd_ops.c\n@@ -1060,6 +1060,70 @@ int cpt_pmd_session_cfg(struct rte_cryptodev *dev,\n \treturn -EPERM;\n }\n \n+static void *instance_session_cfg(cpt_instance_t *instance,\n+\t\t\t struct rte_crypto_sym_xform *xform, void *sess)\n+{\n+\tstruct rte_crypto_sym_xform *chain;\n+\n+\tPMD_INIT_FUNC_TRACE();\n+\n+\t/*\n+\t * Microcode only supports the following combination.\n+\t * Encryption followed by authentication\n+\t * Authentication followed by decryption\n+\t */\n+\tif (xform->next) {\n+\t\tif ((xform->type == RTE_CRYPTO_SYM_XFORM_AUTH) &&\n+\t\t (xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER) &&\n+\t\t (xform->next->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT)) {\n+\t\t\tPMD_DRV_LOG(ERR, \"Unsupported combination by \"\n+\t\t\t\t\t \"microcode\\n\");\n+\t\t\tgoto err;\n+\t\t\t/* Unsupported as of now by microcode */\n+\t\t}\n+\t\tif ((xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER) &&\n+\t\t (xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH) &&\n+\t\t (xform->cipher.op == RTE_CRYPTO_CIPHER_OP_DECRYPT)) {\n+\t\t\t/* For GMAC auth there is no cipher operation */\n+\t\t\tif (xform->aead.algo != RTE_CRYPTO_AEAD_AES_GCM ||\n+\t\t\t xform->next->auth.algo !=\n+\t\t\t RTE_CRYPTO_AUTH_AES_GMAC) {\n+\t\t\t\tPMD_DRV_LOG(ERR, \"Unsupported combination by \"\n+\t\t\t\t\t \"microcode\\n\");\n+\t\t\t\tgoto err;\n+\t\t\t\t/* Unsupported as of now by microcode */\n+\t\t\t}\n+\t\t}\n+\t}\n+\n+\tchain = xform;\n+\twhile (chain) {\n+\t\tif (chain->type == RTE_CRYPTO_SYM_XFORM_AEAD) {\n+\t\t\tif (fill_sess_aead(instance, chain, sess))\n+\t\t\t\tgoto err;\n+\t\t} else {\n+\t\tif (chain->type == RTE_CRYPTO_SYM_XFORM_CIPHER) {\n+\t\t\tif (fill_sess_cipher(instance, chain, sess))\n+\t\t\t\tgoto err;\n+\t\t} else if (chain->type == RTE_CRYPTO_SYM_XFORM_AUTH) {\n+\t\t\tif (chain->auth.algo == RTE_CRYPTO_AUTH_AES_GMAC) {\n+\t\t\t\tif (fill_sess_gmac(NULL, chain, sess))\n+\t\t\t\t\tgoto err;\n+\t\t\t} else {\n+\t\t\t\tif (fill_sess_auth(instance, chain, sess))\n+\t\t\t\t\tgoto err;\n+\t\t\t}\n+\t\t}\n+\t\t}\n+\t\tchain = chain->next;\n+\t}\n+\n+\treturn sess;\n+\n+err:\n+\treturn NULL;\n+}\n+\n void\n cpt_pmd_session_clear(struct rte_cryptodev *dev,\n \t\t struct rte_cryptodev_sym_session *sess)\n@@ -1075,3 +1139,798 @@ int cpt_pmd_session_cfg(struct rte_cryptodev *dev,\n \t\trte_mempool_put(sess_mp, session_private);\n \t}\n }\n+\n+static inline void *\n+alloc_op_meta(struct rte_mbuf *m_src,\n+\t buf_ptr_t *buf,\n+\t int32_t len)\n+{\n+\tuint8_t *mdata;\n+\n+#ifndef CPT_ALWAYS_USE_SEPARATE_BUF\n+\tif (likely(m_src && (m_src->nb_segs == 1))) {\n+\t\tint32_t tailroom;\n+\t\tphys_addr_t mphys;\n+\n+\t\t/* Check if tailroom is sufficient to hold meta data */\n+\t\ttailroom = rte_pktmbuf_tailroom(m_src);\n+\t\tif (likely(tailroom > len + 8)) {\n+\t\t\tmdata = (uint8_t *)m_src->buf_addr + m_src->buf_len;\n+\t\t\tmphys = m_src->buf_physaddr + m_src->buf_len;\n+\t\t\tmdata -= len;\n+\t\t\tmphys -= len;\n+\t\t\tbuf->vaddr = mdata;\n+\t\t\tbuf->dma_addr = mphys;\n+\t\t\tbuf->size = len;\n+\t\t\t/* Indicate that this is a mbuf allocated mdata */\n+\t\t\tmdata = (uint8_t *)((uint64_t)mdata | 1ull);\n+\t\t\treturn mdata;\n+\t\t}\n+\t}\n+#else\n+\t(void) m_src;\n+#endif\n+\n+\tif (unlikely(rte_mempool_get(cpt_meta_pool, (void **)&mdata) < 0))\n+\t\treturn NULL;\n+\n+\tbuf->vaddr = mdata;\n+\tbuf->dma_addr = rte_mempool_virt2iova(mdata);\n+\tbuf->size = len;\n+\n+\treturn mdata;\n+}\n+\n+/**\n+ * cpt_free_metabuf - free metabuf to mempool.\n+ * @param instance: pointer to instance.\n+ * @param objp: pointer to the metabuf.\n+ */\n+static inline void free_op_meta(void *mdata)\n+{\n+\tbool nofree = ((uint64_t)mdata & 1ull);\n+\n+\tif (likely(nofree))\n+\t\treturn;\n+\trte_mempool_put(cpt_meta_pool, mdata);\n+}\n+\n+static inline uint32_t\n+prepare_iov_from_pkt(struct rte_mbuf *pkt,\n+\t\t iov_ptr_t *iovec, uint32_t start_offset)\n+{\n+\tuint16_t index = 0;\n+\tvoid *seg_data = NULL;\n+\tphys_addr_t seg_phys;\n+\tint32_t seg_size = 0;\n+\n+\tif (!pkt) {\n+\t\tiovec->buf_cnt = 0;\n+\t\treturn 0;\n+\t}\n+\n+\tif (!start_offset) {\n+\t\tseg_data = rte_pktmbuf_mtod(pkt, void *);\n+\t\tseg_phys = rte_pktmbuf_mtophys(pkt);\n+\t\tseg_size = pkt->data_len;\n+\t} else {\n+\t\twhile (start_offset >= pkt->data_len) {\n+\t\t\tstart_offset -= pkt->data_len;\n+\t\t\tpkt = pkt->next;\n+\t\t}\n+\n+\t\tseg_data = rte_pktmbuf_mtod_offset(pkt, void *, start_offset);\n+\t\tseg_phys = rte_pktmbuf_mtophys_offset(pkt, start_offset);\n+\t\tseg_size = pkt->data_len - start_offset;\n+\t\tif (!seg_size)\n+\t\t\treturn 1;\n+\t}\n+\n+\t/* first seg */\n+\tiovec->bufs[index].vaddr = seg_data;\n+\tiovec->bufs[index].dma_addr = seg_phys;\n+\tiovec->bufs[index].size = seg_size;\n+\tindex++;\n+\tpkt = pkt->next;\n+\n+\twhile (unlikely(pkt != NULL)) {\n+\t\tseg_data = rte_pktmbuf_mtod(pkt, void *);\n+\t\tseg_phys = rte_pktmbuf_mtophys(pkt);\n+\t\tseg_size = pkt->data_len;\n+\t\tif (!seg_size)\n+\t\t\tbreak;\n+\n+\t\tiovec->bufs[index].vaddr = seg_data;\n+\t\tiovec->bufs[index].dma_addr = seg_phys;\n+\t\tiovec->bufs[index].size = seg_size;\n+\n+\t\tindex++;\n+\n+\t\t/* FIXME: Not depending on wqe.w0.s.bufs to break */\n+\t\tpkt = pkt->next;\n+\t}\n+\n+\tiovec->buf_cnt = index;\n+\treturn 0;\n+}\n+\n+static inline uint32_t\n+prepare_iov_from_pkt_inplace(struct rte_mbuf *pkt,\n+\t\t\t fc_params_t *param,\n+\t\t\t uint32_t *flags)\n+{\n+\tuint16_t index = 0;\n+\tvoid *seg_data = NULL;\n+\tphys_addr_t seg_phys;\n+\tuint32_t seg_size = 0;\n+\tiov_ptr_t *iovec;\n+\n+\tseg_data = rte_pktmbuf_mtod(pkt, void *);\n+\tseg_phys = rte_pktmbuf_mtophys(pkt);\n+\tseg_size = pkt->data_len;\n+\n+\t/* first seg */\n+\tif (likely(!pkt->next)) {\n+\t\tuint32_t headroom, tailroom;\n+\n+\t\t*flags |= SINGLE_BUF_INPLACE;\n+\t\theadroom = rte_pktmbuf_headroom(pkt);\n+\t\ttailroom = rte_pktmbuf_tailroom(pkt);\n+\t\tif (likely((headroom >= 24) &&\n+\t\t (tailroom >= 8))) {\n+\t\t\t/* In 83XX this is prerequivisit for Direct mode */\n+\t\t\t*flags |= SINGLE_BUF_HEADTAILROOM;\n+\t\t}\n+\t\tparam->bufs[0].vaddr = seg_data;\n+\t\tparam->bufs[0].dma_addr = seg_phys;\n+\t\tparam->bufs[0].size = seg_size;\n+\t\treturn 0;\n+\t}\n+\tiovec = param->src_iov;\n+\tiovec->bufs[index].vaddr = seg_data;\n+\tiovec->bufs[index].dma_addr = seg_phys;\n+\tiovec->bufs[index].size = seg_size;\n+\tindex++;\n+\tpkt = pkt->next;\n+\n+\twhile (unlikely(pkt != NULL)) {\n+\t\tseg_data = rte_pktmbuf_mtod(pkt, void *);\n+\t\tseg_phys = rte_pktmbuf_mtophys(pkt);\n+\t\tseg_size = pkt->data_len;\n+\n+\t\tif (!seg_size)\n+\t\t\tbreak;\n+\n+\t\tiovec->bufs[index].vaddr = seg_data;\n+\t\tiovec->bufs[index].dma_addr = seg_phys;\n+\t\tiovec->bufs[index].size = seg_size;\n+\n+\t\tindex++;\n+\n+\t\tpkt = pkt->next;\n+\t}\n+\n+\tiovec->buf_cnt = index;\n+\treturn 0;\n+}\n+\n+static void\n+find_kasumif9_direction_and_length(uint8_t *src,\n+\t\t\t\t uint32_t counter_num_bytes,\n+\t\t\t\t uint32_t *addr_length_in_bits,\n+\t\t\t\t uint8_t *addr_direction)\n+{\n+\tuint8_t found = 0;\n+\twhile (!found && counter_num_bytes > 0) {\n+\t\tcounter_num_bytes--;\n+\t\tif (src[counter_num_bytes] == 0x00)\n+\t\t\tcontinue;\n+\t\tif (src[counter_num_bytes] == 0x80) {\n+\t\t\t*addr_direction = src[counter_num_bytes - 1] & 0x1;\n+\t\t\t*addr_length_in_bits = counter_num_bytes * 8 - 1;\n+\t\t\tfound = 1;\n+\t\t} else {\n+\t\t\tint i = 0;\n+\t\t\tuint8_t last_byte = src[counter_num_bytes];\n+\t\t\tfor (i = 0; i < 8 && found == 0; i++) {\n+\t\t\t\tif (last_byte & (1 << i)) {\n+\t\t\t\t\t*addr_direction = (last_byte >> (i+1))\n+\t\t\t\t\t\t\t & 0x1;\n+\t\t\t\t\tif (i != 6)\n+\t\t\t\t\t\t*addr_length_in_bits =\n+\t\t\t\t\t\t\tcounter_num_bytes * 8\n+\t\t\t\t\t\t\t+ (8 - (i + 2));\n+\t\t\t\t\telse\n+\t\t\t\t\t\t*addr_length_in_bits =\n+\t\t\t\t\t\t\tcounter_num_bytes * 8;\n+\n+\t\t\t\t\tfound = 1;\n+\t\t\t\t\t}\n+\t\t\t\t}\n+\t\t\t}\n+\t}\n+}\n+/*\n+ * This handles all auth only except AES_GMAC\n+ */\n+static void *\n+fill_digest_params(struct rte_crypto_op *cop,\n+\t\t struct cpt_sess_misc *sess,\n+\t\t void **mdata_ptr,\n+\t\t int *op_ret)\n+{\n+\tuint32_t space = 0;\n+\tstruct rte_crypto_sym_op *sym_op = cop->sym;\n+\tvoid *mdata;\n+\tphys_addr_t mphys;\n+\tuint64_t *op;\n+\tuint32_t auth_range_off;\n+\tuint32_t flags = 0;\n+\tuint64_t d_offs = 0, d_lens;\n+\tvoid *prep_req = NULL;\n+\tstruct rte_mbuf *m_src, *m_dst;\n+\tuint16_t auth_op = sess->cpt_op & CSP_OP_AUTH_MASK;\n+\tuint8_t zsk_flag = sess->zsk_flag;\n+\tuint16_t mac_len = sess->mac_len;\n+\tfc_params_t params;\n+\tchar src[SRC_IOV_SIZE];\n+\tuint8_t iv_buf[16];\n+\n+\tm_src = sym_op->m_src;\n+\n+\t/* For just digest lets force mempool alloc */\n+\tmdata = alloc_op_meta(NULL, ¶ms.meta_buf, cpt_op_mlen);\n+\tif (mdata == NULL) {\n+\t\tPMD_DRV_LOG(ERR, \"Error allocating meta buffer for request\\n\");\n+\t\t*op_ret = -ENOMEM;\n+\t\treturn NULL;\n+\t}\n+\n+\tmphys = params.meta_buf.dma_addr;\n+\n+\top = mdata;\n+\top[0] = (uint64_t)mdata;\n+\top[1] = (uint64_t)cop;\n+\top[2] = op[3] = 0; /* Used to indicate auth verify */\n+\tspace += 4 * sizeof(uint64_t);\n+\n+\tauth_range_off = sym_op->auth.data.offset;\n+\n+\tflags = VALID_MAC_BUF;\n+\tparams.src_iov = (void *)src;\n+\tif (unlikely(zsk_flag)) {\n+\t\t/*\n+\t\t * Since for Zuc, Kasumi, Snow3g offsets are in bits\n+\t\t * we will send pass through even for auth only case,\n+\t\t * let MC handle it\n+\t\t */\n+\t\td_offs = auth_range_off;\n+\t\tauth_range_off = 0;\n+\t\tparams.auth_iv_buf = rte_crypto_op_ctod_offset(cop,\n+\t\t\t\t\tuint8_t *, sess->auth_iv_offset);\n+\t\tif (zsk_flag == K_F9) {\n+\t\t\tuint32_t length_in_bits, num_bytes;\n+\t\t\tuint8_t *src, direction = 0;\n+\t\t\tuint32_t counter_num_bytes;\n+\n+\t\t\tmemcpy(iv_buf, rte_pktmbuf_mtod(cop->sym->m_src,\n+\t\t\t\t\t\t\tuint8_t *), 8);\n+\t\t\t/*\n+\t\t\t * This is kasumi f9, take direction from\n+\t\t\t * source buffer\n+\t\t\t */\n+\t\t\tlength_in_bits = cop->sym->auth.data.length;\n+\t\t\tnum_bytes = (length_in_bits >> 3);\n+\t\t\tcounter_num_bytes = num_bytes;\n+\t\t\tsrc = rte_pktmbuf_mtod(cop->sym->m_src, uint8_t *);\n+\t\t\tfind_kasumif9_direction_and_length(src,\n+\t\t\t\t\t\tcounter_num_bytes,\n+\t\t\t\t\t\t&length_in_bits,\n+\t\t\t\t\t\t&direction);\n+\t\t\tlength_in_bits -= 64;\n+\t\t\tcop->sym->auth.data.offset += 64;\n+\t\t\td_offs = cop->sym->auth.data.offset;\n+\t\t\tauth_range_off = d_offs / 8;\n+\t\t\tcop->sym->auth.data.length = length_in_bits;\n+\n+\t\t\t/* Store it at end of auth iv */\n+\t\t\tiv_buf[8] = direction;\n+\t\t\tparams.auth_iv_buf = iv_buf;\n+\t\t}\n+\t}\n+\n+\td_lens = sym_op->auth.data.length;\n+\n+\tparams.ctx_buf.vaddr = SESS_PRIV(sess);\n+\tparams.ctx_buf.dma_addr = sess->ctx_dma_addr;\n+\n+\tif (auth_op == CSP_OP_AUTH_GENERATE) {\n+\t\tif (sym_op->auth.digest.data) {\n+\t\t\t/*\n+\t\t\t * Digest to be generated\n+\t\t\t * in separate buffer\n+\t\t\t */\n+\t\t\tparams.mac_buf.size =\n+\t\t\t\tsess->mac_len;\n+\t\t\tparams.mac_buf.vaddr =\n+\t\t\t\tsym_op->auth.digest.data;\n+\t\t\tparams.mac_buf.dma_addr =\n+\t\t\t\tsym_op->auth.digest.phys_addr;\n+\t\t} else {\n+\t\t\tuint32_t off = sym_op->auth.data.offset +\n+\t\t\t\tsym_op->auth.data.length;\n+\t\t\tint32_t dlen, space;\n+\n+\t\t\tm_dst = sym_op->m_dst ?\n+\t\t\t\tsym_op->m_dst : sym_op->m_src;\n+\t\t\tdlen = rte_pktmbuf_pkt_len(m_dst);\n+\n+\t\t\tspace = off + mac_len - dlen;\n+\t\t\tif (space > 0)\n+\t\t\t\tif (!rte_pktmbuf_append(m_dst, space)) {\n+\t\t\t\t\tPMD_DRV_LOG(ERR, \"Failed to extend \"\n+\t\t\t\t\t \"mbuf by %uB\\n\", space);\n+\t\t\t\t\tgoto err;\n+\t\t\t\t}\n+\n+\t\t\tparams.mac_buf.vaddr =\n+\t\t\t\trte_pktmbuf_mtod_offset(m_dst,\n+\t\t\t\t\t\t\tvoid *, off);\n+\t\t\tparams.mac_buf.dma_addr =\n+\t\t\t\trte_pktmbuf_mtophys_offset(m_dst, off);\n+\t\t\tparams.mac_buf.size = mac_len;\n+\t\t}\n+\t} else {\n+\t\t/* Need space for storing generated mac */\n+\t\tparams.mac_buf.vaddr =\n+\t\t\t(uint8_t *)mdata + space;\n+\t\tparams.mac_buf.dma_addr = mphys + space;\n+\t\tparams.mac_buf.size = mac_len;\n+\t\tspace += RTE_ALIGN_CEIL(mac_len, 8);\n+\t\top[2] = (uint64_t)params.mac_buf.vaddr;\n+\t\top[3] = mac_len;\n+\n+\t}\n+\n+\tparams.meta_buf.vaddr = (uint8_t *)mdata + space;\n+\tparams.meta_buf.dma_addr = mphys + space;\n+\tparams.meta_buf.size -= space;\n+\n+\t/* Out of place processing */\n+\tparams.src_iov = (void *)src;\n+\n+\t/*Store SG I/O in the api for reuse */\n+\tif (prepare_iov_from_pkt(m_src, params.src_iov,\n+\t\t\t\t auth_range_off)) {\n+\t\tPMD_DRV_LOG(ERR, \"Prepare src iov failed\\n\");\n+\t\t*op_ret = -1;\n+\t\tgoto err;\n+\t}\n+\n+\tprep_req = cpt_fc_enc_hmac_prep(flags, d_offs, d_lens,\n+\t\t\t\t\t¶ms, op, op_ret);\n+\t*mdata_ptr = mdata;\n+\treturn prep_req;\n+err:\n+\tif (unlikely(!prep_req))\n+\t\tfree_op_meta(mdata);\n+\treturn NULL;\n+}\n+\n+static inline void *\n+fill_fc_params(struct rte_crypto_op *cop,\n+\t struct cpt_sess_misc *sess_misc,\n+\t void **mdata_ptr,\n+\t int *op_ret)\n+{\n+\tuint32_t space = 0;\n+\tstruct rte_crypto_sym_op *sym_op = cop->sym;\n+\tvoid *mdata;\n+\tuint64_t *op;\n+\tuint32_t mc_hash_off;\n+\tuint32_t flags = 0;\n+\tuint64_t d_offs, d_lens;\n+\tvoid *prep_req;\n+\tstruct rte_mbuf *m_src, *m_dst;\n+\tuint8_t cpt_op = sess_misc->cpt_op;\n+\tuint8_t zsk_flag = sess_misc->zsk_flag;\n+\tuint8_t aes_gcm = sess_misc->aes_gcm;\n+\tuint16_t mac_len = sess_misc->mac_len;\n+#ifdef CPT_ALWAYS_USE_SG_MODE\n+\tuint8_t inplace = 0;\n+#else\n+\tuint8_t inplace = 1;\n+#endif\n+\tfc_params_t fc_params;\n+\tchar src[SRC_IOV_SIZE];\n+\tchar dst[SRC_IOV_SIZE];\n+\tuint32_t iv_buf[4];\n+\n+\tif (likely(sess_misc->iv_length)) {\n+\t\tflags |= VALID_IV_BUF;\n+\t\tfc_params.iv_buf = rte_crypto_op_ctod_offset(cop,\n+\t\t\t\t uint8_t *, sess_misc->iv_offset);\n+\t\tif (sess_misc->aes_ctr &&\n+\t\t unlikely(sess_misc->iv_length != 16)) {\n+\t\t\tmemcpy((uint8_t *)iv_buf,\n+\t\t\t\trte_crypto_op_ctod_offset(cop,\n+\t\t\t\tuint8_t *, sess_misc->iv_offset), 12);\n+\t\t\tiv_buf[3] = htobe32(0x1);\n+\t\t\tfc_params.iv_buf = iv_buf;\n+\t\t}\n+\t}\n+\n+\tif (zsk_flag) {\n+\t\tfc_params.auth_iv_buf = rte_crypto_op_ctod_offset(cop,\n+\t\t\t\t\tuint8_t *,\n+\t\t\t\t\tsess_misc->auth_iv_offset);\n+\t\tif (zsk_flag == K_F9) {\n+\t\t\tPMD_DRV_LOG(ERR, \"Should not reach here for \"\n+\t\t\t\"kasumi F9\\n\");\n+\t\t}\n+\t\tif (zsk_flag != ZS_EA)\n+\t\t\tinplace = 0;\n+\t}\n+\tm_src = sym_op->m_src;\n+\tm_dst = sym_op->m_dst;\n+\n+\tif (aes_gcm) {\n+\t\tuint8_t *salt;\n+\t\tuint8_t *aad_data;\n+\t\tuint16_t aad_len;\n+\n+\t\td_offs = sym_op->aead.data.offset;\n+\t\td_lens = sym_op->aead.data.length;\n+\t\tmc_hash_off = sym_op->aead.data.offset +\n+\t\t\t sym_op->aead.data.length;\n+\n+\t\taad_data = sym_op->aead.aad.data;\n+\t\taad_len = sess_misc->aad_length;\n+\t\tif (likely((aad_data + aad_len) ==\n+\t\t\t rte_pktmbuf_mtod_offset(m_src,\n+\t\t\t\tuint8_t *,\n+\t\t\t\tsym_op->aead.data.offset))) {\n+\t\t\td_offs = (d_offs - aad_len) | (d_offs << 16);\n+\t\t\td_lens = (d_lens + aad_len) | (d_lens << 32);\n+\t\t} else {\n+\t\t\tfc_params.aad_buf.vaddr = sym_op->aead.aad.data;\n+\t\t\tfc_params.aad_buf.dma_addr = sym_op->aead.aad.phys_addr;\n+\t\t\tfc_params.aad_buf.size = aad_len;\n+\t\t\tflags |= VALID_AAD_BUF;\n+\t\t\tinplace = 0;\n+\t\t\td_offs = d_offs << 16;\n+\t\t\td_lens = d_lens << 32;\n+\t\t}\n+\n+\t\tsalt = fc_params.iv_buf;\n+\t\tif (unlikely(*(uint32_t *)salt != sess_misc->salt)) {\n+\t\t\tcpt_fc_salt_update(SESS_PRIV(sess_misc), salt);\n+\t\t\tsess_misc->salt = *(uint32_t *)salt;\n+\t\t}\n+\t\tfc_params.iv_buf = salt + 4;\n+\t\tif (likely(mac_len)) {\n+\t\t\tstruct rte_mbuf *m = (cpt_op & CSP_OP_ENCODE) ? m_dst :\n+\t\t\t\t\t m_src;\n+\n+\t\t\tif (!m)\n+\t\t\t\tm = m_src;\n+\n+\t\t\t/* hmac immediately following data is best case */\n+\t\t\tif (unlikely(rte_pktmbuf_mtod(m, uint8_t *) +\n+\t\t\t mc_hash_off !=\n+\t\t\t (uint8_t *)sym_op->aead.digest.data)) {\n+\t\t\t\tflags |= VALID_MAC_BUF;\n+\t\t\t\tfc_params.mac_buf.size = sess_misc->mac_len;\n+\t\t\t\tfc_params.mac_buf.vaddr =\n+\t\t\t\t sym_op->aead.digest.data;\n+\t\t\t\tfc_params.mac_buf.dma_addr =\n+\t\t\t\t sym_op->aead.digest.phys_addr;\n+\t\t\t\tinplace = 0;\n+\t\t\t}\n+\t\t}\n+\t} else {\n+\t\td_offs = sym_op->cipher.data.offset;\n+\t\td_lens = sym_op->cipher.data.length;\n+\t\tmc_hash_off = sym_op->cipher.data.offset +\n+\t\t\t sym_op->cipher.data.length;\n+\t\td_offs = (d_offs << 16) | sym_op->auth.data.offset;\n+\t\td_lens = (d_lens << 32) | sym_op->auth.data.length;\n+\n+\t\tif (mc_hash_off < (sym_op->auth.data.offset +\n+\t\t\t\t sym_op->auth.data.length)){\n+\t\t\tmc_hash_off = (sym_op->auth.data.offset +\n+\t\t\t\t sym_op->auth.data.length);\n+\t\t}\n+\t\t/* for gmac, salt should be updated like in gcm */\n+\t\tif (unlikely(sess_misc->is_gmac)) {\n+\t\t\tuint8_t *salt;\n+\t\t\tsalt = fc_params.iv_buf;\n+\t\t\tif (unlikely(*(uint32_t *)salt != sess_misc->salt)) {\n+\t\t\t\tcpt_fc_salt_update(SESS_PRIV(sess_misc), salt);\n+\t\t\t\tsess_misc->salt = *(uint32_t *)salt;\n+\t\t\t}\n+\t\t\tfc_params.iv_buf = salt + 4;\n+\t\t}\n+\t\t\t/* */\n+\t\tif (likely(mac_len)) {\n+\t\t\tstruct rte_mbuf *m =\n+\t\t\t(cpt_op & CSP_OP_ENCODE) ? m_dst : m_src;\n+\n+\t\t\tif (!m)\n+\t\t\t\tm = m_src;\n+\n+\t\t/* hmac immediately following data is best case */\n+\t\t\tif (unlikely(rte_pktmbuf_mtod(m, uint8_t *) +\n+\t\t\t mc_hash_off !=\n+\t\t\t (uint8_t *)sym_op->auth.digest.data)) {\n+\t\t\t\tflags |= VALID_MAC_BUF;\n+\t\t\t\tfc_params.mac_buf.size =\n+\t\t\t\t\tsess_misc->mac_len;\n+\t\t\t\tfc_params.mac_buf.vaddr =\n+\t\t\t\t\tsym_op->auth.digest.data;\n+\t\t\t\tfc_params.mac_buf.dma_addr =\n+\t\t\t\tsym_op->auth.digest.phys_addr;\n+\t\t\t\tinplace = 0;\n+\t\t\t}\n+\t\t}\n+\t}\n+\tfc_params.ctx_buf.vaddr = SESS_PRIV(sess_misc);\n+\tfc_params.ctx_buf.dma_addr = sess_misc->ctx_dma_addr;\n+\n+\tif (likely(!m_dst && inplace)) {\n+\t\t/* Case of single buffer without AAD buf or\n+\t\t * separate mac buf in place and\n+\t\t * not air crypto\n+\t\t */\n+\t\tfc_params.dst_iov = fc_params.src_iov = (void *)src;\n+\n+\t\tif (unlikely(prepare_iov_from_pkt_inplace(m_src,\n+\t\t\t\t\t\t\t &fc_params,\n+\t\t\t\t\t\t\t &flags))) {\n+\t\t\tPMD_DRV_LOG(ERR, \"Prepare inplace src iov failed\\n\");\n+\t\t\t*op_ret = -1;\n+\t\t\treturn NULL;\n+\t\t}\n+\n+\t} else {\n+\t\t/* Out of place processing */\n+\t\tfc_params.src_iov = (void *)src;\n+\t\tfc_params.dst_iov = (void *)dst;\n+\n+\t\t/*Store SG I/O in the api for reuse */\n+\t\tif (prepare_iov_from_pkt(m_src, fc_params.src_iov, 0)) {\n+\t\t\tPMD_DRV_LOG(ERR, \"Prepare src iov failed\\n\");\n+\t\t\t*op_ret = -1;\n+\t\t\treturn NULL;\n+\t\t}\n+\n+\t\tif (unlikely(m_dst != NULL)) {\n+\t\t\tuint32_t pkt_len;\n+\n+\t\t\t/* Try to make room as much as src has */\n+\t\t\tm_dst = sym_op->m_dst;\n+\t\t\tpkt_len = rte_pktmbuf_pkt_len(m_dst);\n+\n+\t\t\tif (unlikely(pkt_len < rte_pktmbuf_pkt_len(m_src))) {\n+\t\t\t\tpkt_len = rte_pktmbuf_pkt_len(m_src) - pkt_len;\n+\t\t\t\tif (!rte_pktmbuf_append(m_dst, pkt_len)) {\n+\t\t\t\t\tPMD_DRV_LOG(ERR, \"Not enough space in \"\n+\t\t\t\t\t \"m_dst %p, need %u more\\n\",\n+\t\t\t\t\t m_dst, pkt_len);\n+\t\t\t\t\treturn NULL;\n+\t\t\t\t}\n+\t\t\t}\n+\n+\t\t\tif (prepare_iov_from_pkt(m_dst, fc_params.dst_iov, 0)) {\n+\t\t\t\tPMD_DRV_LOG(ERR, \"Prepare dst iov failed for \"\n+\t\t\t\t \"m_dst %p\\n\", m_dst);\n+\t\t\t\treturn NULL;\n+\t\t\t}\n+\t\t} else {\n+\t\t\tfc_params.dst_iov = (void *)src;\n+\t\t}\n+\n+\t}\n+\n+\tif (likely(flags & SINGLE_BUF_HEADTAILROOM))\n+\t\tmdata = alloc_op_meta(m_src,\n+\t\t\t\t &fc_params.meta_buf,\n+\t\t\t\t cpt_op_sb_mlen);\n+\telse\n+\t\tmdata = alloc_op_meta(NULL,\n+\t\t\t\t &fc_params.meta_buf,\n+\t\t\t\t cpt_op_mlen);\n+\n+\tif (unlikely(mdata == NULL)) {\n+\t\tPMD_DRV_LOG(ERR, \"Error allocating meta buffer for request\\n\");\n+\t\treturn NULL;\n+\t}\n+\n+\top = (uint64_t *)((uint64_t)mdata & ~1ull);\n+\top[0] = (uint64_t)mdata;\n+\top[1] = (uint64_t)cop;\n+\top[2] = op[3] = 0; /* Used to indicate auth verify */\n+\tspace += 4 * sizeof(uint64_t);\n+\n+\tfc_params.meta_buf.vaddr = (uint8_t *)op + space;\n+\tfc_params.meta_buf.dma_addr += space;\n+\tfc_params.meta_buf.size -= space;\n+\n+\t/* Finally prepare the instruction */\n+\tif (cpt_op & CSP_OP_ENCODE)\n+\t\tprep_req = cpt_fc_enc_hmac_prep(flags, d_offs, d_lens,\n+\t\t\t\t\t\t&fc_params, op, op_ret);\n+\telse\n+\t\tprep_req = cpt_fc_dec_hmac_prep(flags, d_offs, d_lens,\n+\t\t\t\t\t\t&fc_params, op, op_ret);\n+\n+\tif (unlikely(!prep_req))\n+\t\tfree_op_meta(mdata);\n+\t*mdata_ptr = mdata;\n+\treturn prep_req;\n+}\n+\n+static inline void\n+compl_auth_verify(struct rte_crypto_op *op,\n+\t\t uint8_t *gen_mac,\n+\t\t uint64_t mac_len)\n+{\n+\tuint8_t *mac;\n+\tstruct rte_crypto_sym_op *sym_op = op->sym;\n+\n+\tif (sym_op->auth.digest.data)\n+\t\tmac = sym_op->auth.digest.data;\n+\telse\n+\t\tmac = rte_pktmbuf_mtod_offset(sym_op->m_src,\n+\t\t\t\t\t uint8_t *,\n+\t\t\t\t\t sym_op->auth.data.length +\n+\t\t\t\t\t sym_op->auth.data.offset);\n+\tif (!mac) {\n+\t\top->status = RTE_CRYPTO_OP_STATUS_ERROR;\n+\t\treturn;\n+\t}\n+\n+\tif (memcmp(mac, gen_mac, mac_len))\n+\t\top->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;\n+\telse\n+\t\top->status = RTE_CRYPTO_OP_STATUS_SUCCESS;\n+}\n+\n+\n+static inline int __hot\n+cpt_pmd_crypto_operation(cpt_instance_t *instance,\n+\t\t struct rte_crypto_op *op,\n+\t\t bool last_op)\n+{\n+\tstruct cpt_sess_misc *sess = NULL;\n+\tstruct rte_crypto_sym_op *sym_op = op->sym;\n+\tvoid *prep_req, *mdata = NULL;\n+\tint ret = 0;\n+\tuint64_t cpt_op;\n+\tuint8_t flags = last_op ? 0 : ENQ_FLAG_NODOORBELL;\n+\n+\n+\tif (unlikely(op->sess_type == RTE_CRYPTO_OP_SESSIONLESS)) {\n+\t\tvoid *ptr = NULL;\n+\t\tint sess_len;\n+\n+\t\tsess_len = cpt_pmd_get_session_size(NULL);\n+\n+\t\tsess = rte_calloc(__func__, 1, sess_len, 8);\n+\t\tif (!sess)\n+\t\t\treturn -ENOMEM;\n+\n+\t\tsess->ctx_dma_addr = rte_malloc_virt2iova(sess) +\n+\t\t\tsizeof(struct cpt_sess_misc);\n+\n+\t\tptr = instance_session_cfg(instance,\n+\t\t\t\t\t sym_op->xform, (void *)sess);\n+\t\tif (ptr == NULL)\n+\t\t\treturn -EINVAL;\n+\t} else {\n+\t\tsess = (struct cpt_sess_misc *)\n+\t\tget_session_private_data(sym_op->session,\n+\t\tcryptodev_cpt_driver_id);\n+\t}\n+\n+\tcpt_op = sess->cpt_op;\n+\n+\tif (likely(cpt_op & CSP_OP_CIPHER_MASK))\n+\t\tprep_req = fill_fc_params(op, sess, &mdata, &ret);\n+\telse\n+\t\tprep_req = fill_digest_params(op, sess, &mdata, &ret);\n+\n+\tif (unlikely(!prep_req)) {\n+\t\tPMD_DRV_LOG_RAW(ERR, \"prep cryto req : op %p, cpt_op 0x%x ret \"\n+\t\t \"0x%x\\n\", op, (unsigned int)cpt_op, ret);\n+\t\tgoto req_fail;\n+\t}\n+\n+\t/* Enqueue prepared instruction to HW */\n+\tret = cpt_enqueue_req(instance, prep_req,\n+\t\t\t flags, NULL, 0);\n+\n+\tif (unlikely(ret)) {\n+\t\tif (unlikely(ret == -EAGAIN))\n+\t\t\tgoto req_fail;\n+\t\tPMD_DRV_LOG(ERR, \"Error enqueing crypto request : error code \"\n+\t\t \"%d\\n\", ret);\n+\t\tgoto req_fail;\n+\t}\n+\n+\t/* TODO: Stats here */\n+\n+\treturn 0;\n+\n+req_fail:\n+\tif (mdata)\n+\t\tfree_op_meta(mdata);\n+\treturn ret;\n+}\n+\n+\n+\n+uint16_t\n+cpt_pmd_pkt_enqueue(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)\n+{\n+\tcpt_instance_t *instance = (cpt_instance_t *)qptr;\n+\tuint16_t count = 0;\n+\tint ret;\n+\n+\tcount = cpt_queue_full(instance);\n+\tif (nb_ops > count)\n+\t\tnb_ops = count;\n+\n+\tcount = 0;\n+\twhile (likely(count < nb_ops)) {\n+\t\tbool last_op = (count + 1 == nb_ops);\n+\t\tret = cpt_pmd_crypto_operation(instance, ops[count], last_op);\n+\t\tif (unlikely(ret))\n+\t\t\tbreak;\n+\t\tcount++;\n+\t}\n+\treturn count;\n+}\n+\n+uint16_t\n+cpt_pmd_pkt_dequeue(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)\n+{\n+\tcpt_instance_t *instance = (cpt_instance_t *)qptr;\n+\tuint16_t nb_completed, i = 0;\n+\tuint8_t compcode[nb_ops];\n+\n+\tnb_completed = cpt_dequeue_burst(instance, nb_ops,\n+\t\t\t\t\t (void **)ops, compcode);\n+\twhile (likely(i < nb_completed)) {\n+\t\tstruct rte_crypto_op *cop;\n+\t\tvoid *metabuf;\n+\t\tuint64_t *rsp;\n+\t\tuint8_t status;\n+\n+\t\trsp = (void *)ops[i];\n+\t\tstatus = compcode[i];\n+\t\tif (likely((i + 1) < nb_completed))\n+\t\t\trte_prefetch0(ops[i+1]);\n+\t\tmetabuf = (void *)rsp[0];\n+\t\tcop = (void *)rsp[1];\n+\n+\t\tops[i] = cop;\n+\n+\t\tif (likely(status == 0)) {\n+\t\t\tif (likely(!rsp[2]))\n+\t\t\t\tcop->status =\n+\t\t\t\t\tRTE_CRYPTO_OP_STATUS_SUCCESS;\n+\t\t\telse\n+\t\t\t\tcompl_auth_verify(cop, (uint8_t *)rsp[2],\n+\t\t\t\t\t\t rsp[3]);\n+\t\t} else if (status == ERR_GC_ICV_MISCOMPARE) {\n+\t\t\t/*auth data mismatch */\n+\t\t\tcop->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;\n+\t\t} else {\n+\t\t\tcop->status = RTE_CRYPTO_OP_STATUS_ERROR;\n+\t\t}\n+\t\tfree_op_meta(metabuf);\n+\t\ti++;\n+\t}\n+\treturn nb_completed;\n+}\ndiff --git a/drivers/crypto/cpt/cpt_pmd_ops.h b/drivers/crypto/cpt/cpt_pmd_ops.h\nindex 314b2b1..17b3a09 100644\n--- a/drivers/crypto/cpt/cpt_pmd_ops.h\n+++ b/drivers/crypto/cpt/cpt_pmd_ops.h\n@@ -83,4 +83,14 @@ int cpt_pmd_session_cfg(struct rte_cryptodev *dev,\n void\n cpt_pmd_session_clear(struct rte_cryptodev *dev,\n \t\t struct rte_cryptodev_sym_session *sess);\n+\n+uint16_t\n+cpt_pmd_pkt_enqueue(void *qptr,\n+\t\tstruct rte_crypto_op **ops,\n+\t\tuint16_t nb_ops);\n+\n+uint16_t\n+cpt_pmd_pkt_dequeue(void *qptr,\n+\t\tstruct rte_crypto_op **ops,\n+\t\tuint16_t nb_ops);\n #endif\n", "prefixes": [ "dpdk-dev", "14/16" ] }