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GET /api/patches/41468/?format=api
{ "id": 41468, "url": "http://patchwork.dpdk.org/api/patches/41468/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/1529910408-60428-1-git-send-email-wei.zhao1@intel.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1529910408-60428-1-git-send-email-wei.zhao1@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1529910408-60428-1-git-send-email-wei.zhao1@intel.com", "date": "2018-06-25T07:06:48", "name": "net/i40e: fix Tx check descriptor status APIs error", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "d493c1a05bec38d9184ee740793a51058902d636", "submitter": { "id": 495, "url": "http://patchwork.dpdk.org/api/people/495/?format=api", "name": "Zhao1, Wei", "email": "wei.zhao1@intel.com" }, "delegate": { "id": 1540, "url": "http://patchwork.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/1529910408-60428-1-git-send-email-wei.zhao1@intel.com/mbox/", "series": [ { "id": 222, "url": "http://patchwork.dpdk.org/api/series/222/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=222", "date": "2018-06-25T07:06:48", "name": "net/i40e: fix Tx check descriptor status APIs error", "version": 1, "mbox": "http://patchwork.dpdk.org/series/222/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/41468/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/41468/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id DCB4E58FA;\n\tMon, 25 Jun 2018 09:27:47 +0200 (CEST)", "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n\tby dpdk.org (Postfix) with ESMTP id 80D9058C4;\n\tMon, 25 Jun 2018 09:27:46 +0200 (CEST)", "from orsmga008.jf.intel.com ([10.7.209.65])\n\tby orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t25 Jun 2018 00:27:45 -0700", "from dpdk6.bj.intel.com ([172.16.182.94])\n\tby orsmga008.jf.intel.com with ESMTP; 25 Jun 2018 00:27:41 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.51,269,1526367600\"; d=\"scan'208\";a=\"51995423\"", "From": "Wei Zhao <wei.zhao1@intel.com>", "To": "dev@dpdk.org", "Cc": "wenzhuo.lu@intel.com, qi.z.zhang@intel.com, stable@dpdk.org,\n\tWei Zhao <wei.zhao1@intel.com>", "Date": "Mon, 25 Jun 2018 15:06:48 +0800", "Message-Id": "<1529910408-60428-1-git-send-email-wei.zhao1@intel.com>", "X-Mailer": "git-send-email 2.7.5", "Subject": "[dpdk-dev] [PATCH] net/i40e: fix Tx check descriptor status APIs\n\terror", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This is a issue involve RS bit set rule in ixgbe.\nLet us take function i40e_xmit_pkts_vec () as an example,\nin this function RS bit will be set for descriptor with index\ntxq->tx_next_rs, and also descriptor free function\ni40e_tx_free_bufs() also check RS bit for descriptor with index\ntxq->tx_next_rs, This is perfect ok. Let us take an example,\nif app set tx_rs_thresh = 32 and nb_desc = 512, then i40e PMD code\nwill init txq->tx_next_rs = 31 in function i40e_reset_tx_queue when\ntx queue setup. And also txq->tx_next_rs will be update as 63, 95\nand so on. But, in the function i40e_dev_tx_descriptor_status(),\nthe RS bit to check is \" desc = ((desc + txq->tx_rs_thresh - 1) /\ntxq->tx_rs_thresh) * txq-tx_rs_thresh\", which is 32 ,64, 96 and so on.\nSo, they are all wrong! In tx function of i40e_xmit_pkts_simple,\nthe RS bit rule is also the same, it also set index 31 ,64, 95.\nwe need to correct it.\n\nFixes: 68a43d1bb023 (\"net/i40e: implement descriptor status API\")\n\nSigned-off-by: Wei Zhao <wei.zhao1@intel.com>\n---\n drivers/net/i40e/i40e_rxtx.c | 12 ++++++------\n 1 file changed, 6 insertions(+), 6 deletions(-)", "diff": "diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c\nindex 6032d55..7e37d8d 100644\n--- a/drivers/net/i40e/i40e_rxtx.c\n+++ b/drivers/net/i40e/i40e_rxtx.c\n@@ -2032,15 +2032,15 @@ i40e_dev_tx_descriptor_status(void *tx_queue, uint16_t offset)\n \t\treturn -EINVAL;\n \n \tdesc = txq->tx_tail + offset;\n+\tif (desc >= txq->nb_tx_desc)\n+\t\tdesc -= txq->nb_tx_desc;\n \t/* go to next desc that has the RS bit */\n-\tdesc = ((desc + txq->tx_rs_thresh - 1) / txq->tx_rs_thresh) *\n-\t\ttxq->tx_rs_thresh;\n-\tif (desc >= txq->nb_tx_desc) {\n+\tdesc = (desc / txq->tx_rs_thresh + 1) *\n+\t\t\ttxq->tx_rs_thresh - 1;\n+\tif (desc >= txq->nb_tx_desc)\n \t\tdesc -= txq->nb_tx_desc;\n-\t\tif (desc >= txq->nb_tx_desc)\n-\t\t\tdesc -= txq->nb_tx_desc;\n-\t}\n \n+\tdesc = txq->sw_ring[desc].last_id;\n \tstatus = &txq->tx_ring[desc].cmd_type_offset_bsz;\n \tmask = rte_le_to_cpu_64(I40E_TXD_QW1_DTYPE_MASK);\n \texpect = rte_cpu_to_le_64(\n", "prefixes": [] }