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GET /api/patches/41781/?format=api
{ "id": 41781, "url": "http://patchwork.dpdk.org/api/patches/41781/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20180628031940.17397-11-johndale@cisco.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20180628031940.17397-11-johndale@cisco.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20180628031940.17397-11-johndale@cisco.com", "date": "2018-06-28T03:19:37", "name": "[11/14] net/enic: add the simple version of Tx handler", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "5e68e27c3e6bd95e391033e8d5c3f34c2e4a18a2", "submitter": { "id": 359, "url": "http://patchwork.dpdk.org/api/people/359/?format=api", "name": "John Daley (johndale)", "email": "johndale@cisco.com" }, "delegate": { "id": 319, "url": "http://patchwork.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20180628031940.17397-11-johndale@cisco.com/mbox/", "series": [ { "id": 279, "url": "http://patchwork.dpdk.org/api/series/279/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=279", "date": "2018-06-28T03:19:27", "name": "[01/14] net/enic: fix receive packet types", "version": 1, "mbox": "http://patchwork.dpdk.org/series/279/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/41781/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/41781/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id D4B5F5B36;\n\tThu, 28 Jun 2018 05:25:41 +0200 (CEST)", "from alln-iport-1.cisco.com (alln-iport-1.cisco.com\n\t[173.37.142.88]) by dpdk.org (Postfix) with ESMTP id 49D5A5B20\n\tfor <dev@dpdk.org>; Thu, 28 Jun 2018 05:25:40 +0200 (CEST)", "from rcdn-core-10.cisco.com ([173.37.93.146])\n\tby alln-iport-1.cisco.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t28 Jun 2018 03:25:39 +0000", "from cisco.com (savbu-usnic-a.cisco.com [10.193.184.48])\n\tby rcdn-core-10.cisco.com (8.14.5/8.14.5) with ESMTP id\n\tw5S3PdFP022450; Thu, 28 Jun 2018 03:25:39 GMT", "by cisco.com (Postfix, from userid 392789)\n\tid 4576820F2001; Wed, 27 Jun 2018 20:25:39 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n\td=cisco.com; i=@cisco.com; l=10092; q=dns/txt;\n\ts=iport; t=1530156340; x=1531365940;\n\th=from:to:cc:subject:date:message-id:in-reply-to: references;\n\tbh=hiFzwqa5BKQioiup/I88pZkDvulO3/JtevHVhI6cc8s=;\n\tb=Vy2Ba9SFW6V0xv78qMEVywHnaqJXDJctflXdqI5Zz8vGyiEjIRKTv3TU\n\tZFxs+68U5HTa985NzQWG18xdDklaO4aZ9TNRg4q2ZigHIFxZC7H4Q4Y1n\n\t6ouxFP+ehsm40lVjvQjUiwVv3vbylRbCTpjBpxqYfYiWyGKVLKxYLwZ8T c=;", "X-IronPort-AV": "E=Sophos;i=\"5.51,281,1526342400\"; d=\"scan'208\";a=\"135726619\"", "From": "John Daley <johndale@cisco.com>", "To": "ferruh.yigit@intel.com", "Cc": "dev@dpdk.org, Hyong Youb Kim <hyonkim@cisco.com>", "Date": "Wed, 27 Jun 2018 20:19:37 -0700", "Message-Id": "<20180628031940.17397-11-johndale@cisco.com>", "X-Mailer": "git-send-email 2.16.2", "In-Reply-To": "<20180628031940.17397-1-johndale@cisco.com>", "References": "<20180628031940.17397-1-johndale@cisco.com>", "Subject": "[dpdk-dev] [PATCH 11/14] net/enic: add the simple version of Tx\n\thandler", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Hyong Youb Kim <hyonkim@cisco.com>\n\nAdd a much-simplified handler that works when all offloads are\ndisabled, except mbuf fast free. When compared against the default\nhandler, under ideal conditions, cycles per packet drop by 60+%.\n\nBy default, the driver tries to use the simple handler. Add a new\ndevarg (disable-simple-tx) to allow the user to force-disable this new\nhandler.\n\nThe idea of using specialized/simplified handlers is from the Intel\nand Mellanox drivers.\n\nSigned-off-by: Hyong Youb Kim <hyonkim@cisco.com>\nReviewed-by: John Daley <johndale@cisco.com>\n---\n drivers/net/enic/enic.h | 3 ++\n drivers/net/enic/enic_compat.h | 5 +++\n drivers/net/enic/enic_ethdev.c | 31 ++++++++++-------\n drivers/net/enic/enic_main.c | 37 ++++++++++++++++++++\n drivers/net/enic/enic_rxtx.c | 77 ++++++++++++++++++++++++++++++++++++++++++\n 5 files changed, 141 insertions(+), 12 deletions(-)", "diff": "diff --git a/drivers/net/enic/enic.h b/drivers/net/enic/enic.h\nindex af790fc2e..e1d0ea552 100644\n--- a/drivers/net/enic/enic.h\n+++ b/drivers/net/enic/enic.h\n@@ -126,6 +126,7 @@ struct enic {\n \tu8 filter_actions; /* HW supported actions */\n \tbool vxlan;\n \tbool disable_overlay; /* devargs disable_overlay=1 */\n+\tbool disable_simple_tx; /* devargs disable-simple-tx=1 */\n \tbool nic_cfg_chk; /* NIC_CFG_CHK available */\n \tbool udp_rss_weak; /* Bodega style UDP RSS */\n \tuint8_t ig_vlan_rewrite_mode; /* devargs ig-vlan-rewrite */\n@@ -318,6 +319,8 @@ uint16_t enic_dummy_recv_pkts(void *rx_queue,\n \t\t\t uint16_t nb_pkts);\n uint16_t enic_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n \t\t\tuint16_t nb_pkts);\n+uint16_t enic_simple_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n+\t\t\t uint16_t nb_pkts);\n uint16_t enic_prep_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n \t\t\tuint16_t nb_pkts);\n int enic_set_mtu(struct enic *enic, uint16_t new_mtu);\ndiff --git a/drivers/net/enic/enic_compat.h b/drivers/net/enic/enic_compat.h\nindex c0af1ed29..ceb1b0962 100644\n--- a/drivers/net/enic/enic_compat.h\n+++ b/drivers/net/enic/enic_compat.h\n@@ -56,6 +56,11 @@\n #define dev_debug(x, args...) dev_printk(DEBUG, args)\n \n extern int enicpmd_logtype_flow;\n+extern int enicpmd_logtype_init;\n+\n+#define PMD_INIT_LOG(level, fmt, args...) \\\n+\trte_log(RTE_LOG_ ## level, enicpmd_logtype_init, \\\n+\t\t\"%s\" fmt \"\\n\", __func__, ##args)\n \n #define __le16 u16\n #define __le32 u32\ndiff --git a/drivers/net/enic/enic_ethdev.c b/drivers/net/enic/enic_ethdev.c\nindex ef18f8802..d013333f9 100644\n--- a/drivers/net/enic/enic_ethdev.c\n+++ b/drivers/net/enic/enic_ethdev.c\n@@ -24,10 +24,6 @@\n int enicpmd_logtype_init;\n int enicpmd_logtype_flow;\n \n-#define PMD_INIT_LOG(level, fmt, args...) \\\n-\trte_log(RTE_LOG_ ## level, enicpmd_logtype_init, \\\n-\t\t\"%s\" fmt \"\\n\", __func__, ##args)\n-\n #define ENICPMD_FUNC_TRACE() PMD_INIT_LOG(DEBUG, \" >>\")\n \n /*\n@@ -42,6 +38,7 @@ static const struct rte_pci_id pci_id_enic_map[] = {\n \n #define ENIC_DEVARG_DISABLE_OVERLAY \"disable-overlay\"\n #define ENIC_DEVARG_IG_VLAN_REWRITE \"ig-vlan-rewrite\"\n+#define ENIC_DEVARG_DISABLE_SIMPLE_TX \"disable-simple-tx\"\n \n RTE_INIT(enicpmd_init_log);\n static void\n@@ -920,22 +917,27 @@ static const struct eth_dev_ops enicpmd_eth_dev_ops = {\n \t.udp_tunnel_port_del = enicpmd_dev_udp_tunnel_port_del,\n };\n \n-static int enic_parse_disable_overlay(__rte_unused const char *key,\n-\t\t\t\t const char *value,\n-\t\t\t\t void *opaque)\n+static int enic_parse_zero_one(const char *key,\n+\t\t\t const char *value,\n+\t\t\t void *opaque)\n {\n \tstruct enic *enic;\n+\tbool b;\n \n \tenic = (struct enic *)opaque;\n \tif (strcmp(value, \"0\") == 0) {\n-\t\tenic->disable_overlay = false;\n+\t\tb = false;\n \t} else if (strcmp(value, \"1\") == 0) {\n-\t\tenic->disable_overlay = true;\n+\t\tb = true;\n \t} else {\n-\t\tdev_err(enic, \"Invalid value for \" ENIC_DEVARG_DISABLE_OVERLAY\n-\t\t\t\": expected=0|1 given=%s\\n\", value);\n+\t\tdev_err(enic, \"Invalid value for %s\"\n+\t\t\t\": expected=0|1 given=%s\\n\", key, value);\n \t\treturn -EINVAL;\n \t}\n+\tif (strcmp(key, ENIC_DEVARG_DISABLE_OVERLAY) == 0)\n+\t\tenic->disable_overlay = b;\n+\tif (strcmp(key, ENIC_DEVARG_DISABLE_SIMPLE_TX) == 0)\n+\t\tenic->disable_simple_tx = b;\n \treturn 0;\n }\n \n@@ -976,6 +978,7 @@ static int enic_check_devargs(struct rte_eth_dev *dev)\n {\n \tstatic const char *const valid_keys[] = {\n \t\tENIC_DEVARG_DISABLE_OVERLAY,\n+\t\tENIC_DEVARG_DISABLE_SIMPLE_TX,\n \t\tENIC_DEVARG_IG_VLAN_REWRITE,\n \t\tNULL};\n \tstruct enic *enic = pmd_priv(dev);\n@@ -984,6 +987,7 @@ static int enic_check_devargs(struct rte_eth_dev *dev)\n \tENICPMD_FUNC_TRACE();\n \n \tenic->disable_overlay = false;\n+\tenic->disable_simple_tx = false;\n \tenic->ig_vlan_rewrite_mode = IG_VLAN_REWRITE_MODE_PASS_THRU;\n \tif (!dev->device->devargs)\n \t\treturn 0;\n@@ -991,7 +995,9 @@ static int enic_check_devargs(struct rte_eth_dev *dev)\n \tif (!kvlist)\n \t\treturn -EINVAL;\n \tif (rte_kvargs_process(kvlist, ENIC_DEVARG_DISABLE_OVERLAY,\n-\t\t\t enic_parse_disable_overlay, enic) < 0 ||\n+\t\t\t enic_parse_zero_one, enic) < 0 ||\n+\t rte_kvargs_process(kvlist, ENIC_DEVARG_DISABLE_SIMPLE_TX,\n+\t\t\t enic_parse_zero_one, enic) < 0 ||\n \t rte_kvargs_process(kvlist, ENIC_DEVARG_IG_VLAN_REWRITE,\n \t\t\t enic_parse_ig_vlan_rewrite, enic) < 0) {\n \t\trte_kvargs_free(kvlist);\n@@ -1059,4 +1065,5 @@ RTE_PMD_REGISTER_PCI_TABLE(net_enic, pci_id_enic_map);\n RTE_PMD_REGISTER_KMOD_DEP(net_enic, \"* igb_uio | uio_pci_generic | vfio-pci\");\n RTE_PMD_REGISTER_PARAM_STRING(net_enic,\n \tENIC_DEVARG_DISABLE_OVERLAY \"=0|1 \"\n+\tENIC_DEVARG_DISABLE_SIMPLE_TX \"=0|1 \"\n \tENIC_DEVARG_IG_VLAN_REWRITE \"=trunk|untag|priority|pass\");\ndiff --git a/drivers/net/enic/enic_main.c b/drivers/net/enic/enic_main.c\nindex c03ec247a..66706448c 100644\n--- a/drivers/net/enic/enic_main.c\n+++ b/drivers/net/enic/enic_main.c\n@@ -493,6 +493,27 @@ static void enic_rxq_intr_deinit(struct enic *enic)\n \t}\n }\n \n+static void enic_prep_wq_for_simple_tx(struct enic *enic, uint16_t queue_idx)\n+{\n+\tstruct wq_enet_desc *desc;\n+\tstruct vnic_wq *wq;\n+\tunsigned int i;\n+\n+\t/*\n+\t * Fill WQ descriptor fields that never change. Every descriptor is\n+\t * one packet, so set EOP. Also set CQ_ENTRY every ENIC_WQ_CQ_THRESH\n+\t * descriptors (i.e. request one completion update every 32 packets).\n+\t */\n+\twq = &enic->wq[queue_idx];\n+\tdesc = (struct wq_enet_desc *)wq->ring.descs;\n+\tfor (i = 0; i < wq->ring.desc_count; i++, desc++) {\n+\t\tdesc->header_length_flags = 1 << WQ_ENET_FLAGS_EOP_SHIFT;\n+\t\tif (i % ENIC_WQ_CQ_THRESH == ENIC_WQ_CQ_THRESH - 1)\n+\t\t\tdesc->header_length_flags |=\n+\t\t\t\t(1 << WQ_ENET_FLAGS_CQ_ENTRY_SHIFT);\n+\t}\n+}\n+\n int enic_enable(struct enic *enic)\n {\n \tunsigned int index;\n@@ -535,6 +556,22 @@ int enic_enable(struct enic *enic)\n \t\t}\n \t}\n \n+\t/*\n+\t * Use the simple TX handler if possible. All offloads must be disabled\n+\t * except mbuf fast free.\n+\t */\n+\tif (!enic->disable_simple_tx &&\n+\t (eth_dev->data->dev_conf.txmode.offloads &\n+\t ~DEV_TX_OFFLOAD_MBUF_FAST_FREE) == 0) {\n+\t\tPMD_INIT_LOG(DEBUG, \" use the simple tx handler\");\n+\t\teth_dev->tx_pkt_burst = &enic_simple_xmit_pkts;\n+\t\tfor (index = 0; index < enic->wq_count; index++)\n+\t\t\tenic_prep_wq_for_simple_tx(enic, index);\n+\t} else {\n+\t\tPMD_INIT_LOG(DEBUG, \" use the default tx handler\");\n+\t\teth_dev->tx_pkt_burst = &enic_xmit_pkts;\n+\t}\n+\n \tfor (index = 0; index < enic->wq_count; index++)\n \t\tenic_start_wq(enic, index);\n \tfor (index = 0; index < enic->rq_count; index++)\ndiff --git a/drivers/net/enic/enic_rxtx.c b/drivers/net/enic/enic_rxtx.c\nindex 7cddb53d9..7dec486fe 100644\n--- a/drivers/net/enic/enic_rxtx.c\n+++ b/drivers/net/enic/enic_rxtx.c\n@@ -741,4 +741,81 @@ uint16_t enic_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n \treturn index;\n }\n \n+static void enqueue_simple_pkts(struct rte_mbuf **pkts,\n+\t\t\t\tstruct wq_enet_desc *desc,\n+\t\t\t\tuint16_t n,\n+\t\t\t\tstruct enic *enic)\n+{\n+\tstruct rte_mbuf *p;\n+\n+\twhile (n) {\n+\t\tn--;\n+\t\tp = *pkts++;\n+\t\tdesc->address = p->buf_iova + p->data_off;\n+\t\tdesc->length = p->pkt_len;\n+\t\t/*\n+\t\t * The app should not send oversized\n+\t\t * packets. tx_pkt_prepare includes a check as\n+\t\t * well. But some apps ignore the device max size and\n+\t\t * tx_pkt_prepare. Oversized packets cause WQ errrors\n+\t\t * and the NIC ends up disabling the whole WQ. So\n+\t\t * truncate packets..\n+\t\t */\n+\t\tif (unlikely(p->pkt_len > ENIC_TX_MAX_PKT_SIZE)) {\n+\t\t\tdesc->length = ENIC_TX_MAX_PKT_SIZE;\n+\t\t\trte_atomic64_inc(&enic->soft_stats.tx_oversized);\n+\t\t}\n+\t\tdesc++;\n+\t}\n+}\n+\n+uint16_t enic_simple_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n+\t\t\t uint16_t nb_pkts)\n+{\n+\tunsigned int head_idx, desc_count;\n+\tstruct wq_enet_desc *desc;\n+\tstruct vnic_wq *wq;\n+\tstruct enic *enic;\n+\tuint16_t rem, n;\n+\n+\twq = (struct vnic_wq *)tx_queue;\n+\tenic = vnic_dev_priv(wq->vdev);\n+\tenic_cleanup_wq(enic, wq);\n+\t/* Will enqueue this many packets in this call */\n+\tnb_pkts = RTE_MIN(nb_pkts, wq->ring.desc_avail);\n+\tif (nb_pkts == 0)\n+\t\treturn 0;\n+\n+\thead_idx = wq->head_idx;\n+\tdesc_count = wq->ring.desc_count;\n+\n+\t/* Descriptors until the end of the ring */\n+\tn = desc_count - head_idx;\n+\tn = RTE_MIN(nb_pkts, n);\n \n+\t/* Save mbuf pointers to free later */\n+\tmemcpy(wq->bufs + head_idx, tx_pkts, sizeof(struct rte_mbuf *) * n);\n+\n+\t/* Enqueue until the ring end */\n+\trem = nb_pkts - n;\n+\tdesc = ((struct wq_enet_desc *)wq->ring.descs) + head_idx;\n+\tenqueue_simple_pkts(tx_pkts, desc, n, enic);\n+\n+\t/* Wrap to the start of the ring */\n+\tif (rem) {\n+\t\ttx_pkts += n;\n+\t\tmemcpy(wq->bufs, tx_pkts, sizeof(struct rte_mbuf *) * rem);\n+\t\tdesc = (struct wq_enet_desc *)wq->ring.descs;\n+\t\tenqueue_simple_pkts(tx_pkts, desc, rem, enic);\n+\t}\n+\trte_wmb();\n+\n+\t/* Update head_idx and desc_avail */\n+\twq->ring.desc_avail -= nb_pkts;\n+\thead_idx += nb_pkts;\n+\tif (head_idx >= desc_count)\n+\t\thead_idx -= desc_count;\n+\twq->head_idx = head_idx;\n+\tiowrite32_relaxed(head_idx, &wq->ctrl->posted_index);\n+\treturn nb_pkts;\n+}\n", "prefixes": [ "11/14" ] }