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GET /api/patches/52570/?format=api
{ "id": 52570, "url": "http://patchwork.dpdk.org/api/patches/52570/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/478e2875b86b3b097d152ac6a72fca6bc49e4aff.1554894242.git.igor.russkikh@aquantia.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<478e2875b86b3b097d152ac6a72fca6bc49e4aff.1554894242.git.igor.russkikh@aquantia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/478e2875b86b3b097d152ac6a72fca6bc49e4aff.1554894242.git.igor.russkikh@aquantia.com", "date": "2019-04-10T11:18:53", "name": "[04/10] net/atlantic: macsec hardware structures declaration", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "4049831be5f56959e4532ad8b892e738c58026b9", "submitter": { "id": 1124, "url": "http://patchwork.dpdk.org/api/people/1124/?format=api", "name": "Igor Russkikh", "email": "igor.russkikh@aquantia.com" }, "delegate": { "id": 319, "url": "http://patchwork.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/478e2875b86b3b097d152ac6a72fca6bc49e4aff.1554894242.git.igor.russkikh@aquantia.com/mbox/", "series": [ { "id": 4234, "url": "http://patchwork.dpdk.org/api/series/4234/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=4234", "date": "2019-04-10T11:18:35", "name": "add MACSEC hw offload to atlantic PMD", "version": 1, "mbox": "http://patchwork.dpdk.org/series/4234/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/52570/comments/", "check": "warning", "checks": "http://patchwork.dpdk.org/api/patches/52570/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id E24A25F0D;\n\tWed, 10 Apr 2019 13:18:56 +0200 (CEST)", "from NAM03-CO1-obe.outbound.protection.outlook.com\n\t(mail-eopbgr790077.outbound.protection.outlook.com [40.107.79.77])\n\tby dpdk.org (Postfix) with ESMTP id 2369F5B40\n\tfor <dev@dpdk.org>; Wed, 10 Apr 2019 13:18:55 +0200 (CEST)", "from BN8PR11MB3618.namprd11.prod.outlook.com (20.178.219.85) by\n\tBN8PR11MB3540.namprd11.prod.outlook.com (20.178.218.78) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n\t15.20.1771.21; Wed, 10 Apr 2019 11:18:53 +0000", "from BN8PR11MB3618.namprd11.prod.outlook.com\n\t([fe80::9d38:1845:842d:a489]) by\n\tBN8PR11MB3618.namprd11.prod.outlook.com\n\t([fe80::9d38:1845:842d:a489%3]) with mapi id 15.20.1771.016;\n\tWed, 10 Apr 2019 11:18:53 +0000" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=AQUANTIA1COM.onmicrosoft.com; s=selector1-aquantia-com;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n\tbh=vFby3ITODIio0JwNMsmgYlR7gKfO1p3o6nBzNwyOUUQ=;\n\tb=kvSJUxY3Hd87BTCv1/egR6GRmvrrw2nzzRakiVgcL3RS2BW820e6Ki7IqqaknIMrXU0qxyhCEUzgd72TM7Qxr3G6s81oHKuYXhQylc+ist/C+kpvNw+Wg32JMPXodt7JxWop91ksmlF0Bpcv8isLG9qZq2v5arAn7pDJ199abiI=", "From": "Igor Russkikh <Igor.Russkikh@aquantia.com>", "To": "\"dev@dpdk.org\" <dev@dpdk.org>", "CC": "Pavel Belous <Pavel.Belous@aquantia.com>, Wenzhuo Lu\n\t<wenzhuo.lu@intel.com>, Jingjing Wu <jingjing.wu@intel.com>, Bernard\n\tIremonger <bernard.iremonger@intel.com>, John McNamara\n\t<john.mcnamara@intel.com>, Marko Kovacevic <marko.kovacevic@intel.com>,\n\tKonstantin Ananyev <konstantin.ananyev@intel.com>, Thomas Monjalon\n\t<thomas@monjalon.net>, Ferruh Yigit <ferruh.yigit@intel.com>, Andrew\n\tRybchenko <arybchenko@solarflare.com>, Igor Russkikh\n\t<Igor.Russkikh@aquantia.com>", "Thread-Topic": "[PATCH 04/10] net/atlantic: macsec hardware structures\n\tdeclaration", "Thread-Index": "AQHU748ub4X5ms1SVUKFEthV1/z/Ig==", "Date": "Wed, 10 Apr 2019 11:18:53 +0000", "Message-ID": "<478e2875b86b3b097d152ac6a72fca6bc49e4aff.1554894242.git.igor.russkikh@aquantia.com>", "References": "<cover.1554894242.git.igor.russkikh@aquantia.com>", "In-Reply-To": "<cover.1554894242.git.igor.russkikh@aquantia.com>", "Accept-Language": "en-US", "Content-Language": "en-US", "X-MS-Has-Attach": "", "X-MS-TNEF-Correlator": "", "x-clientproxiedby": "BYAPR05CA0061.namprd05.prod.outlook.com\n\t(2603:10b6:a03:74::38) To BN8PR11MB3618.namprd11.prod.outlook.com\n\t(2603:10b6:408:85::21)", "authentication-results": "spf=none (sender IP is )\n\tsmtp.mailfrom=Igor.Russkikh@aquantia.com; ", "x-ms-exchange-messagesentrepresentingtype": "1", "x-mailer": "git-send-email 2.17.1", "x-originating-ip": "[95.79.108.179]", "x-ms-publictraffictype": "Email", "x-ms-office365-filtering-correlation-id": "14c17447-1c14-45b8-dd61-08d6bda6507f", "x-microsoft-antispam": "BCL:0; PCL:0;\n\tRULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600139)(711020)(4605104)(2017052603328)(7193020);\n\tSRVR:BN8PR11MB3540; ", "x-ms-traffictypediagnostic": "BN8PR11MB3540:", "x-microsoft-antispam-prvs": "<BN8PR11MB3540A6976E57D042B5ACC6DB982E0@BN8PR11MB3540.namprd11.prod.outlook.com>", "x-forefront-prvs": "00032065B2", "x-forefront-antispam-report": "SFV:NSPM;\n\tSFS:(10009020)(396003)(39850400004)(376002)(366004)(136003)(346002)(199004)(189003)(486006)(107886003)(6506007)(316002)(2616005)(386003)(54906003)(7416002)(53936002)(8936002)(68736007)(446003)(6916009)(476003)(72206003)(2501003)(105586002)(11346002)(44832011)(99286004)(2351001)(52116002)(186003)(26005)(118296001)(106356001)(14454004)(102836004)(76176011)(71200400001)(81156014)(7736002)(14444005)(8676002)(81166006)(25786009)(256004)(6116002)(5660300002)(71190400001)(1730700003)(5640700003)(2906002)(66066001)(6512007)(478600001)(6486002)(50226002)(305945005)(97736004)(4326008)(3846002)(36756003)(6436002)(86362001);\n\tDIR:OUT; SFP:1101; SCL:1; SRVR:BN8PR11MB3540;\n\tH:BN8PR11MB3618.namprd11.prod.outlook.com; FPR:; SPF:None; LANG:en;\n\tPTR:InfoNoRecords; A:1; MX:1; ", "received-spf": "None (protection.outlook.com: aquantia.com does not designate\n\tpermitted sender hosts)", "x-ms-exchange-senderadcheck": "1", "x-microsoft-antispam-message-info": "ylgMxDCZJ7ZHyc6xC9nMY3YdbRFAJHhfW2pKSSw2SxZc5E1yuy9ahQZ5mJduskBMjHmHyM7iAepd59km1bzQ3QXQBCYWuIGYnkwrAQy5ES9BEeiBJZmuZVJc8LtGjGx6E+NVlf86RYwGP+Yw91LGQZUcrknq/Pc2XFJvynPn5EE2X8y1otvcoJjhRn0Onu8wsRwoAJ36eFvKv5/tKb3n9rmxYd6iXZ+jpdOzNBPSnfXAXiAIGXZyZtsTaCG4kLc08JvuX+IgoJaPDxHEAKK7PWiTSl4kzajmFiQx/7LY8zY0SDzvGVvJLApYQE5laUO4EkHFtM7s9GDAL+RCvkJVwYHBpDam6hc0pgD6VPnCnVY5TLz2gKUkDi/eg4Qx1yCau0jA4sX7CDCJbuKeU7/2Dpcho8WVyGSM4zV4CbZv/TQ=", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "MIME-Version": "1.0", "X-OriginatorOrg": "aquantia.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "14c17447-1c14-45b8-dd61-08d6bda6507f", "X-MS-Exchange-CrossTenant-originalarrivaltime": "10 Apr 2019 11:18:53.5423\n\t(UTC)", "X-MS-Exchange-CrossTenant-fromentityheader": "Hosted", "X-MS-Exchange-CrossTenant-id": "83e2e134-991c-4ede-8ced-34d47e38e6b1", "X-MS-Exchange-CrossTenant-mailboxtype": "HOSTED", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BN8PR11MB3540", "Subject": "[dpdk-dev] [PATCH 04/10] net/atlantic: macsec hardware structures\n\tdeclaration", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Pavel Belous <pavel.belous@aquantia.com>\n\nHere we define hardware and software configuration structures\nfor macsec interface. MACSEC itself is implemented in Phy module,\nbut its configuration is done via firmware interface\n\nSigned-off-by: Pavel Belous <pavel.belous@aquantia.com>\nSigned-off-by: Igor Russkikh <igor.russkikh@aquantia.com>\n---\n drivers/net/atlantic/atl_types.h | 37 ++++++\n drivers/net/atlantic/hw_atl/hw_atl_utils.h | 148 +++++++++++++++++++++\n 2 files changed, 185 insertions(+)", "diff": "diff --git a/drivers/net/atlantic/atl_types.h b/drivers/net/atlantic/atl_types.h\r\nindex 3edaf0c7c047..3cc9e96089e8 100644\r\n--- a/drivers/net/atlantic/atl_types.h\r\n+++ b/drivers/net/atlantic/atl_types.h\r\n@@ -59,6 +59,39 @@ struct aq_rss_parameters {\r\n \tu8 indirection_table[HW_ATL_B0_RSS_REDIRECTION_MAX];\r\n };\r\n \r\n+/* Macsec stuff */\r\n+struct aq_macsec_config {\r\n+\tstruct {\r\n+\t\tu32 macsec_enabled;\r\n+\t\tu32 encryption_enabled;\r\n+\t\tu32 replay_protection_enabled;\r\n+\t} common;\r\n+\r\n+\tstruct {\r\n+\t\tu32 idx;\r\n+\t\tu32 mac[2]; /* 6 bytes */\r\n+\t} txsc;\r\n+\r\n+\tstruct {\r\n+\t\tu32 idx;\r\n+\t\tu32 an; /* association number on the local side */\r\n+\t\tu32 pn; /* packet number on the local side */\r\n+\t\tu32 key[4]; /* 128 bit key */\r\n+\t} txsa;\r\n+\r\n+\tstruct {\r\n+\t\tu32 mac[2]; /* 6 bytes */\r\n+\t\tu32 pi;\r\n+\t} rxsc;\r\n+\r\n+\tstruct {\r\n+\t\tu32 idx;\r\n+\t\tu32 an; /* association number on the remote side */\r\n+\t\tu32 pn; /* packet number on the remote side */\r\n+\t\tu32 key[4]; /* 128 bit key */\r\n+\t} rxsa;\r\n+};\r\n+\r\n struct aq_hw_cfg_s {\r\n \tbool is_lro;\r\n \tbool is_rss;\r\n@@ -75,6 +108,7 @@ struct aq_hw_cfg_s {\r\n \tuint32_t flow_control;\r\n \r\n \tstruct aq_rss_parameters aq_rss;\r\n+\tstruct aq_macsec_config aq_macsec;\r\n };\r\n \r\n struct aq_hw_s {\r\n@@ -143,6 +177,9 @@ struct aq_fw_ops {\r\n \tint (*set_eeprom)(struct aq_hw_s *self, int dev_addr,\r\n \t\t\t u32 *data, u32 len);\r\n \r\n+\tint (*send_macsec_req)(struct aq_hw_s *self,\r\n+\t\t\t struct macsec_msg_fw_request *req,\r\n+\t\t\t struct macsec_msg_fw_response *response);\r\n };\r\n \r\n struct atl_sw_stats {\r\ndiff --git a/drivers/net/atlantic/hw_atl/hw_atl_utils.h b/drivers/net/atlantic/hw_atl/hw_atl_utils.h\r\nindex f2a87826c0d1..b7c531573623 100644\r\n--- a/drivers/net/atlantic/hw_atl/hw_atl_utils.h\r\n+++ b/drivers/net/atlantic/hw_atl/hw_atl_utils.h\r\n@@ -351,6 +351,154 @@ struct smbus_write_request {\r\n \tu32 length;\r\n } __attribute__((__packed__));\r\n \r\n+enum macsec_msg_type {\r\n+\tmacsec_cfg_msg = 0,\r\n+\tmacsec_add_rx_sc_msg,\r\n+\tmacsec_add_tx_sc_msg,\r\n+\tmacsec_add_rx_sa_msg,\r\n+\tmacsec_add_tx_sa_msg,\r\n+\tmacsec_get_stats_msg,\r\n+};\r\n+\r\n+struct macsec_cfg {\r\n+\tuint32_t enabled;\r\n+\tuint32_t egress_threshold;\r\n+\tuint32_t ingress_threshold;\r\n+\tuint32_t interrupts_enabled;\r\n+} __attribute__((__packed__));\r\n+\r\n+struct add_rx_sc {\r\n+\tuint32_t index;\r\n+\tuint32_t pi; /* Port identifier */\r\n+\tuint32_t sci[2]; /* Secure Channel identifier */\r\n+\tuint32_t sci_mask; /* 1: enable comparison of SCI, 0: don't care */\r\n+\tuint32_t tci;\r\n+\tuint32_t tci_mask;\r\n+\tuint32_t mac_sa[2];\r\n+\tuint32_t sa_mask; /* 0: ignore mac_sa */\r\n+\tuint32_t mac_da[2];\r\n+\tuint32_t da_mask; /* 0: ignore mac_da */\r\n+\tuint32_t validate_frames; /* 0: strict, 1:check, 2:disabled */\r\n+\tuint32_t replay_protect; /* 1: enabled, 0:disabled */\r\n+\tuint32_t anti_replay_window; /* default 0 */\r\n+\t/* 1: auto_rollover enabled (when SA next_pn is saturated */\r\n+\tuint32_t an_rol;\r\n+} __attribute__((__packed__));\r\n+\r\n+struct add_tx_sc {\r\n+\tuint32_t index;\r\n+\tuint32_t pi; /* Port identifier */\r\n+\tuint32_t sci[2]; /* Secure Channel identifier */\r\n+\tuint32_t sci_mask; /* 1: enable comparison of SCI, 0: don't care */\r\n+\tuint32_t tci; /* TCI value, used if packet is not explicitly tagged */\r\n+\tuint32_t tci_mask;\r\n+\tuint32_t mac_sa[2];\r\n+\tuint32_t sa_mask; /* 0: ignore mac_sa */\r\n+\tuint32_t mac_da[2];\r\n+\tuint32_t da_mask; /* 0: ignore mac_da */\r\n+\tuint32_t protect;\r\n+\tuint32_t curr_an; /* SA index which currently used */\r\n+} __attribute__((__packed__));\r\n+\r\n+struct add_rx_sa {\r\n+\tuint32_t index;\r\n+\tuint32_t next_pn;\r\n+\tuint32_t key[4]; /* 128 bit key */\r\n+} __attribute__((__packed__));\r\n+\r\n+struct add_tx_sa {\r\n+\tuint32_t index;\r\n+\tuint32_t next_pn;\r\n+\tuint32_t key[4]; /* 128 bit key */\r\n+} __attribute__((__packed__));\r\n+\r\n+struct get_stats {\r\n+\tuint32_t version_only;\r\n+\tuint32_t ingress_sa_index;\r\n+\tuint32_t egress_sa_index;\r\n+\tuint32_t egress_sc_index;\r\n+} __attribute__((__packed__));\r\n+\r\n+struct macsec_stats {\r\n+\tuint32_t api_version;\r\n+\t/* Ingress Common Counters */\r\n+\tuint64_t in_ctl_pkts;\r\n+\tuint64_t in_tagged_miss_pkts;\r\n+\tuint64_t in_untagged_miss_pkts;\r\n+\tuint64_t in_notag_pkts;\r\n+\tuint64_t in_untagged_pkts;\r\n+\tuint64_t in_bad_tag_pkts;\r\n+\tuint64_t in_no_sci_pkts;\r\n+\tuint64_t in_unknown_sci_pkts;\r\n+\tuint64_t in_ctrl_prt_pass_pkts;\r\n+\tuint64_t in_unctrl_prt_pass_pkts;\r\n+\tuint64_t in_ctrl_prt_fail_pkts;\r\n+\tuint64_t in_unctrl_prt_fail_pkts;\r\n+\tuint64_t in_too_long_pkts;\r\n+\tuint64_t in_igpoc_ctl_pkts;\r\n+\tuint64_t in_ecc_error_pkts;\r\n+\tuint64_t in_unctrl_hit_drop_redir;\r\n+\r\n+\t/* Egress Common Counters */\r\n+\tuint64_t out_ctl_pkts;\r\n+\tuint64_t out_unknown_sa_pkts;\r\n+\tuint64_t out_untagged_pkts;\r\n+\tuint64_t out_too_long;\r\n+\tuint64_t out_ecc_error_pkts;\r\n+\tuint64_t out_unctrl_hit_drop_redir;\r\n+\r\n+\t/* Ingress SA Counters */\r\n+\tuint64_t in_untagged_hit_pkts;\r\n+\tuint64_t in_ctrl_hit_drop_redir_pkts;\r\n+\tuint64_t in_not_using_sa;\r\n+\tuint64_t in_unused_sa;\r\n+\tuint64_t in_not_valid_pkts;\r\n+\tuint64_t in_invalid_pkts;\r\n+\tuint64_t in_ok_pkts;\r\n+\tuint64_t in_late_pkts;\r\n+\tuint64_t in_delayed_pkts;\r\n+\tuint64_t in_unchecked_pkts;\r\n+\tuint64_t in_validated_octets;\r\n+\tuint64_t in_decrypted_octets;\r\n+\r\n+\t/* Egress SA Counters */\r\n+\tuint64_t out_sa_hit_drop_redirect;\r\n+\tuint64_t out_sa_protected2_pkts;\r\n+\tuint64_t out_sa_protected_pkts;\r\n+\tuint64_t out_sa_encrypted_pkts;\r\n+\r\n+\t/* Egress SC Counters */\r\n+\tuint64_t out_sc_protected_pkts;\r\n+\tuint64_t out_sc_encrypted_pkts;\r\n+\tuint64_t out_sc_protected_octets;\r\n+\tuint64_t out_sc_encrypted_octets;\r\n+\r\n+\t/* SA Counters expiration info */\r\n+\tuint32_t egress_threshold_expired;\r\n+\tuint32_t ingress_threshold_expired;\r\n+\tuint32_t egress_expired;\r\n+\tuint32_t ingress_expired;\r\n+} __attribute__((__packed__));\r\n+\r\n+struct macsec_msg_fw_request {\r\n+\tuint32_t offset; /* not used */\r\n+\tuint32_t msg_type;\r\n+\r\n+\tunion {\r\n+\t\tstruct macsec_cfg cfg;\r\n+\t\tstruct add_rx_sc rxsc;\r\n+\t\tstruct add_tx_sc txsc;\r\n+\t\tstruct add_rx_sa rxsa;\r\n+\t\tstruct add_tx_sa txsa;\r\n+\t\tstruct get_stats stats;\r\n+\t};\r\n+} __attribute__((__packed__));\r\n+\r\n+struct macsec_msg_fw_response {\r\n+\tuint32_t result;\r\n+\tstruct macsec_stats stats;\r\n+} __attribute__((__packed__));\r\n+\r\n #define HAL_ATLANTIC_UTILS_CHIP_MIPS 0x00000001U\r\n #define HAL_ATLANTIC_UTILS_CHIP_TPO2 0x00000002U\r\n #define HAL_ATLANTIC_UTILS_CHIP_RPF2 0x00000004U\r\n", "prefixes": [ "04/10" ] }