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GET /api/patches/56837/?format=api
{ "id": 56837, "url": "http://patchwork.dpdk.org/api/patches/56837/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/1563786795-14027-9-git-send-email-matan@mellanox.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1563786795-14027-9-git-send-email-matan@mellanox.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1563786795-14027-9-git-send-email-matan@mellanox.com", "date": "2019-07-22T09:12:55", "name": "[08/28] net/mlx5: update Tx queue create for LRO", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "2c51c78b500256cd5d51df74b76f9c6a1d2876ba", "submitter": { "id": 796, "url": "http://patchwork.dpdk.org/api/people/796/?format=api", "name": "Matan Azrad", "email": "matan@mellanox.com" }, "delegate": { "id": 3268, "url": "http://patchwork.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/1563786795-14027-9-git-send-email-matan@mellanox.com/mbox/", "series": [ { "id": 5639, "url": "http://patchwork.dpdk.org/api/series/5639/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=5639", "date": "2019-07-22T09:12:48", "name": "net/mlx5: support LRO", "version": 1, "mbox": "http://patchwork.dpdk.org/series/5639/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/56837/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/56837/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id ADEA71BE3D;\n\tMon, 22 Jul 2019 11:13:56 +0200 (CEST)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n\tby dpdk.org (Postfix) with ESMTP id D2E431BDEF\n\tfor <dev@dpdk.org>; Mon, 22 Jul 2019 11:13:29 +0200 (CEST)", "from Internal Mail-Server by MTLPINE2 (envelope-from\n\tmatan@mellanox.com)\n\twith ESMTPS (AES256-SHA encrypted); 22 Jul 2019 12:13:23 +0300", "from pegasus07.mtr.labs.mlnx (pegasus07.mtr.labs.mlnx\n\t[10.210.16.112])\n\tby labmailer.mlnx (8.13.8/8.13.8) with ESMTP id x6M9DMjX010084;\n\tMon, 22 Jul 2019 12:13:23 +0300" ], "From": "Matan Azrad <matan@mellanox.com>", "To": "Shahaf Shuler <shahafs@mellanox.com>, Yongseok Koh <yskoh@mellanox.com>, \n\tViacheslav Ovsiienko <viacheslavo@mellanox.com>", "Cc": "dev@dpdk.org, Dekel Peled <dekelp@mellanox.com>", "Date": "Mon, 22 Jul 2019 09:12:55 +0000", "Message-Id": "<1563786795-14027-9-git-send-email-matan@mellanox.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1563786795-14027-1-git-send-email-matan@mellanox.com>", "References": "<1563786795-14027-1-git-send-email-matan@mellanox.com>", "Subject": "[dpdk-dev] [PATCH 08/28] net/mlx5: update Tx queue create for LRO", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Dekel Peled <dekelp@mellanox.com>\n\nUpdate function mlx5_txq_ibv_new(), query and store the TIS\ntransport domain value.\nIt is required later on Rx side when creating matching TIR.\nAdd field in mlx5 data structure to store Transport Domain ID.\n\nSigned-off-by: Dekel Peled <dekelp@mellanox.com>\nAcked-by: Matan Azrad <matan@mellanox.com>\n---\n drivers/net/mlx5/mlx5.h | 1 +\n drivers/net/mlx5/mlx5_txq.c | 26 ++++++++++++++++++++++++++\n 2 files changed, 27 insertions(+)", "diff": "diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex b78a1ec..471e220 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -418,6 +418,7 @@ struct mlx5_ibv_shared {\n \tuint32_t max_port; /* Maximal IB device port index. */\n \tstruct ibv_context *ctx; /* Verbs/DV context. */\n \tstruct ibv_pd *pd; /* Protection Domain. */\n+\tuint32_t tdn; /* Transport Domain number. */\n \tchar ibdev_name[IBV_SYSFS_NAME_MAX]; /* IB device name. */\n \tchar ibdev_path[IBV_SYSFS_PATH_MAX]; /* IB device path for secondary */\n \tstruct ibv_device_attr_ex device_attr; /* Device properties. */\ndiff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c\nindex dbad361..fe3b4ec 100644\n--- a/drivers/net/mlx5/mlx5_txq.c\n+++ b/drivers/net/mlx5/mlx5_txq.c\n@@ -396,6 +396,11 @@ struct mlx5_txq_ibv *\n \tconst int desc = 1 << txq_data->elts_n;\n \tint ret = 0;\n \n+#ifdef HAVE_IBV_FLOW_DV_SUPPORT\n+\t/* If using DevX, need additional mask to read tisn value. */\n+\tif (priv->config.devx && !priv->sh->tdn)\n+\t\tqp.comp_mask |= MLX5DV_QP_MASK_RAW_QP_HANDLES;\n+#endif\n \tassert(txq_data);\n \tpriv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_TX_QUEUE;\n \tpriv->verbs_alloc_ctx.obj = txq_ctrl;\n@@ -542,6 +547,27 @@ struct mlx5_txq_ibv *\n \ttxq_data->wqe_pi = 0;\n \ttxq_data->wqe_comp = 0;\n \ttxq_data->wqe_thres = txq_data->wqe_s / MLX5_TX_COMP_THRESH_INLINE_DIV;\n+#ifdef HAVE_IBV_FLOW_DV_SUPPORT\n+\t/*\n+\t * If using DevX need to query and store TIS transport domain value.\n+\t * This is done once per port.\n+\t * Will use this value on Rx, when creating matching TIR.\n+\t */\n+\tif (priv->config.devx && !priv->sh->tdn) {\n+\t\tret = mlx5_devx_cmd_qp_query_tis_td(tmpl.qp, qp.tisn,\n+\t\t\t\t\t\t &priv->sh->tdn);\n+\t\tif (ret) {\n+\t\t\tDRV_LOG(ERR, \"Fail to query port %u Tx queue %u QP TIS \"\n+\t\t\t\t\"transport domain\", dev->data->port_id, idx);\n+\t\t\trte_errno = EINVAL;\n+\t\t\tgoto error;\n+\t\t} else {\n+\t\t\tDRV_LOG(DEBUG, \"port %u Tx queue %u TIS number %d \"\n+\t\t\t\t\"transport domain %d\", dev->data->port_id,\n+\t\t\t\tidx, qp.tisn, priv->sh->tdn);\n+\t\t}\n+\t}\n+#endif\n \ttxq_ibv->qp = tmpl.qp;\n \ttxq_ibv->cq = tmpl.cq;\n \trte_atomic32_inc(&txq_ibv->refcnt);\n", "prefixes": [ "08/28" ] }