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GET /api/patches/56849/?format=api
{ "id": 56849, "url": "http://patchwork.dpdk.org/api/patches/56849/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/1563786795-14027-25-git-send-email-matan@mellanox.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1563786795-14027-25-git-send-email-matan@mellanox.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1563786795-14027-25-git-send-email-matan@mellanox.com", "date": "2019-07-22T09:13:11", "name": "[24/28] net/mlx5: update LRO fields in completion entry", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "9655dbe6febcb06bf6fb3b63f93fff8869409e2d", "submitter": { "id": 796, "url": "http://patchwork.dpdk.org/api/people/796/?format=api", "name": "Matan Azrad", "email": "matan@mellanox.com" }, "delegate": { "id": 3268, "url": "http://patchwork.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/1563786795-14027-25-git-send-email-matan@mellanox.com/mbox/", "series": [ { "id": 5639, "url": "http://patchwork.dpdk.org/api/series/5639/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=5639", "date": "2019-07-22T09:12:48", "name": "net/mlx5: support LRO", "version": 1, "mbox": "http://patchwork.dpdk.org/series/5639/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/56849/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/56849/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 658611BE8C;\n\tMon, 22 Jul 2019 11:14:24 +0200 (CEST)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n\tby dpdk.org (Postfix) with ESMTP id C49431BDEF\n\tfor <dev@dpdk.org>; Mon, 22 Jul 2019 11:13:30 +0200 (CEST)", "from Internal Mail-Server by MTLPINE2 (envelope-from\n\tmatan@mellanox.com)\n\twith ESMTPS (AES256-SHA encrypted); 22 Jul 2019 12:13:24 +0300", "from pegasus07.mtr.labs.mlnx (pegasus07.mtr.labs.mlnx\n\t[10.210.16.112])\n\tby labmailer.mlnx (8.13.8/8.13.8) with ESMTP id x6M9DMjn010084;\n\tMon, 22 Jul 2019 12:13:24 +0300" ], "From": "Matan Azrad <matan@mellanox.com>", "To": "Shahaf Shuler <shahafs@mellanox.com>, Yongseok Koh <yskoh@mellanox.com>, \n\tViacheslav Ovsiienko <viacheslavo@mellanox.com>", "Cc": "dev@dpdk.org, Dekel Peled <dekelp@mellanox.com>", "Date": "Mon, 22 Jul 2019 09:13:11 +0000", "Message-Id": "<1563786795-14027-25-git-send-email-matan@mellanox.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1563786795-14027-1-git-send-email-matan@mellanox.com>", "References": "<1563786795-14027-1-git-send-email-matan@mellanox.com>", "Subject": "[dpdk-dev] [PATCH 24/28] net/mlx5: update LRO fields in completion\n\tentry", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Update the CQE structure to include LRO fields.\n\nSome reserved values were changed, hence also data-path code used the\nreserved values were updated accordingly.\n\nSigned-off-by: Matan Azrad <matan@mellanox.com>\n---\n drivers/net/mlx5/mlx5_prm.h | 12 +++++++++---\n drivers/net/mlx5/mlx5_rxtx_vec.h | 6 ++----\n drivers/net/mlx5/mlx5_rxtx_vec_sse.h | 16 ++++++++--------\n 3 files changed, 19 insertions(+), 15 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5_prm.h b/drivers/net/mlx5/mlx5_prm.h\nindex b0e281f..3f73a28 100644\n--- a/drivers/net/mlx5/mlx5_prm.h\n+++ b/drivers/net/mlx5/mlx5_prm.h\n@@ -317,13 +317,19 @@ struct mlx5_cqe {\n \tuint8_t pkt_info;\n \tuint8_t rsvd0;\n \tuint16_t wqe_id;\n-\tuint8_t rsvd3[8];\n+\tuint8_t lro_tcppsh_abort_dupack;\n+\tuint8_t lro_min_ttl;\n+\tuint16_t lro_tcp_win;\n+\tuint32_t lro_ack_seq_num;\n \tuint32_t rx_hash_res;\n \tuint8_t rx_hash_type;\n-\tuint8_t rsvd1[11];\n+\tuint8_t rsvd1[3];\n+\tuint16_t csum;\n+\tuint8_t rsvd2[6];\n \tuint16_t hdr_type_etc;\n \tuint16_t vlan_info;\n-\tuint8_t rsvd2[12];\n+\tuint8_t lro_num_seg;\n+\tuint8_t rsvd3[11];\n \tuint32_t byte_cnt;\n \tuint64_t timestamp;\n \tuint32_t sop_drop_qpn;\ndiff --git a/drivers/net/mlx5/mlx5_rxtx_vec.h b/drivers/net/mlx5/mlx5_rxtx_vec.h\nindex 4220b08..b54ff72 100644\n--- a/drivers/net/mlx5/mlx5_rxtx_vec.h\n+++ b/drivers/net/mlx5/mlx5_rxtx_vec.h\n@@ -60,13 +60,11 @@\n #endif\n S_ASSERT_MLX5_CQE(offsetof(struct mlx5_cqe, rx_hash_res) ==\n \t\t offsetof(struct mlx5_cqe, pkt_info) + 12);\n-S_ASSERT_MLX5_CQE(offsetof(struct mlx5_cqe, rsvd1) +\n-\t\t sizeof(((struct mlx5_cqe *)0)->rsvd1) ==\n+S_ASSERT_MLX5_CQE(offsetof(struct mlx5_cqe, rsvd1) + 11 ==\n \t\t offsetof(struct mlx5_cqe, hdr_type_etc));\n S_ASSERT_MLX5_CQE(offsetof(struct mlx5_cqe, vlan_info) ==\n \t\t offsetof(struct mlx5_cqe, hdr_type_etc) + 2);\n-S_ASSERT_MLX5_CQE(offsetof(struct mlx5_cqe, rsvd2) +\n-\t\t sizeof(((struct mlx5_cqe *)0)->rsvd2) ==\n+S_ASSERT_MLX5_CQE(offsetof(struct mlx5_cqe, lro_num_seg) + 12 ==\n \t\t offsetof(struct mlx5_cqe, byte_cnt));\n S_ASSERT_MLX5_CQE(offsetof(struct mlx5_cqe, sop_drop_qpn) ==\n \t\t RTE_ALIGN(offsetof(struct mlx5_cqe, sop_drop_qpn), 8));\ndiff --git a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h\nindex 7bd254f..ca8ed41 100644\n--- a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h\n+++ b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h\n@@ -533,12 +533,12 @@\n \t\tcqe_tmp1 = _mm_load_si128((__m128i *)&cq[pos + p2]);\n \t\tcqes[3] = _mm_blendv_epi8(cqes[3], cqe_tmp2, blend_mask);\n \t\tcqes[2] = _mm_blendv_epi8(cqes[2], cqe_tmp1, blend_mask);\n-\t\tcqe_tmp2 = _mm_loadu_si128((__m128i *)&cq[pos + p3].rsvd1[3]);\n-\t\tcqe_tmp1 = _mm_loadu_si128((__m128i *)&cq[pos + p2].rsvd1[3]);\n+\t\tcqe_tmp2 = _mm_loadu_si128((__m128i *)&cq[pos + p3].csum);\n+\t\tcqe_tmp1 = _mm_loadu_si128((__m128i *)&cq[pos + p2].csum);\n \t\tcqes[3] = _mm_blend_epi16(cqes[3], cqe_tmp2, 0x30);\n \t\tcqes[2] = _mm_blend_epi16(cqes[2], cqe_tmp1, 0x30);\n-\t\tcqe_tmp2 = _mm_loadl_epi64((__m128i *)&cq[pos + p3].rsvd2[10]);\n-\t\tcqe_tmp1 = _mm_loadl_epi64((__m128i *)&cq[pos + p2].rsvd2[10]);\n+\t\tcqe_tmp2 = _mm_loadl_epi64((__m128i *)&cq[pos + p3].rsvd3[9]);\n+\t\tcqe_tmp1 = _mm_loadl_epi64((__m128i *)&cq[pos + p2].rsvd3[9]);\n \t\tcqes[3] = _mm_blend_epi16(cqes[3], cqe_tmp2, 0x04);\n \t\tcqes[2] = _mm_blend_epi16(cqes[2], cqe_tmp1, 0x04);\n \t\t/* C.2 generate final structure for mbuf with swapping bytes. */\n@@ -560,12 +560,12 @@\n \t\tcqe_tmp1 = _mm_load_si128((__m128i *)&cq[pos]);\n \t\tcqes[1] = _mm_blendv_epi8(cqes[1], cqe_tmp2, blend_mask);\n \t\tcqes[0] = _mm_blendv_epi8(cqes[0], cqe_tmp1, blend_mask);\n-\t\tcqe_tmp2 = _mm_loadu_si128((__m128i *)&cq[pos + p1].rsvd1[3]);\n-\t\tcqe_tmp1 = _mm_loadu_si128((__m128i *)&cq[pos].rsvd1[3]);\n+\t\tcqe_tmp2 = _mm_loadu_si128((__m128i *)&cq[pos + p1].csum);\n+\t\tcqe_tmp1 = _mm_loadu_si128((__m128i *)&cq[pos].csum);\n \t\tcqes[1] = _mm_blend_epi16(cqes[1], cqe_tmp2, 0x30);\n \t\tcqes[0] = _mm_blend_epi16(cqes[0], cqe_tmp1, 0x30);\n-\t\tcqe_tmp2 = _mm_loadl_epi64((__m128i *)&cq[pos + p1].rsvd2[10]);\n-\t\tcqe_tmp1 = _mm_loadl_epi64((__m128i *)&cq[pos].rsvd2[10]);\n+\t\tcqe_tmp2 = _mm_loadl_epi64((__m128i *)&cq[pos + p1].rsvd3[9]);\n+\t\tcqe_tmp1 = _mm_loadl_epi64((__m128i *)&cq[pos].rsvd3[9]);\n \t\tcqes[1] = _mm_blend_epi16(cqes[1], cqe_tmp2, 0x04);\n \t\tcqes[0] = _mm_blend_epi16(cqes[0], cqe_tmp1, 0x04);\n \t\t/* C.2 generate final structure for mbuf with swapping bytes. */\n", "prefixes": [ "24/28" ] }