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GET /api/patches/57229/?format=api
{ "id": 57229, "url": "http://patchwork.dpdk.org/api/patches/57229/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/1564401209-18752-11-git-send-email-matan@mellanox.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1564401209-18752-11-git-send-email-matan@mellanox.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1564401209-18752-11-git-send-email-matan@mellanox.com", "date": "2019-07-29T11:53:28", "name": "[10/11] net/mlx5: allow implicit LRO flow", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "2fe2435bdb9ca7e03f5b3f14dd6550cc4c543a2a", "submitter": { "id": 796, "url": "http://patchwork.dpdk.org/api/people/796/?format=api", "name": "Matan Azrad", "email": "matan@mellanox.com" }, "delegate": { "id": 3268, "url": "http://patchwork.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/1564401209-18752-11-git-send-email-matan@mellanox.com/mbox/", "series": [ { "id": 5809, "url": "http://patchwork.dpdk.org/api/series/5809/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=5809", "date": "2019-07-29T11:53:21", "name": "net/mlx5: LRO fixes and enhancements", "version": 1, "mbox": "http://patchwork.dpdk.org/series/5809/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/57229/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/57229/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 2A5FA1BF68;\n\tMon, 29 Jul 2019 14:16:41 +0200 (CEST)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n\tby dpdk.org (Postfix) with ESMTP id 928BC1BF51\n\tfor <dev@dpdk.org>; Mon, 29 Jul 2019 14:16:34 +0200 (CEST)", "from Internal Mail-Server by MTLPINE2 (envelope-from\n\tmatan@mellanox.com)\n\twith ESMTPS (AES256-SHA encrypted); 29 Jul 2019 15:16:30 +0300", "from pegasus07.mtr.labs.mlnx (pegasus07.mtr.labs.mlnx\n\t[10.210.16.112])\n\tby labmailer.mlnx (8.13.8/8.13.8) with ESMTP id x6TCGS4O021429;\n\tMon, 29 Jul 2019 15:16:29 +0300" ], "From": "Matan Azrad <matan@mellanox.com>", "To": "Shahaf Shuler <shahafs@mellanox.com>, Yongseok Koh <yskoh@mellanox.com>, \n\tViacheslav Ovsiienko <viacheslavo@mellanox.com>", "Cc": "dev@dpdk.org, Dekel Peled <dekelp@mellanox.com>", "Date": "Mon, 29 Jul 2019 11:53:28 +0000", "Message-Id": "<1564401209-18752-11-git-send-email-matan@mellanox.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1564401209-18752-1-git-send-email-matan@mellanox.com>", "References": "<1564401209-18752-1-git-send-email-matan@mellanox.com>", "Subject": "[dpdk-dev] [PATCH 10/11] net/mlx5: allow implicit LRO flow", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "When a user configures LRO in the port offloads, he probably wants each\nTCP packet will have a chance to open an LRO session.\n\nThe PMD wasn't configure LRO in the flow TIR if the flow is not\nexplicitly configured TCP item despite the flow included TCP traffic.\n\nFor example, the next flows were not LRO offloaded:\npattern eth / end, pattern eth / ip / end, pattern eth / ipv6 / end.\n\nEnable LRO configuration for all the TIRs if LRO is configured in the\nport.\n\nNo performance impact for non-LRO traffic in these TIRs.\n\nSigned-off-by: Matan Azrad <matan@mellanox.com>\nAcked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>\n---\n drivers/net/mlx5/mlx5.h | 3 ---\n drivers/net/mlx5/mlx5_flow_dv.c | 18 +-----------------\n drivers/net/mlx5/mlx5_flow_verbs.c | 3 +--\n drivers/net/mlx5/mlx5_rxq.c | 10 +++++-----\n drivers/net/mlx5/mlx5_rxtx.h | 2 +-\n 5 files changed, 8 insertions(+), 28 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex 6cb8858..5c40091 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -198,9 +198,6 @@ struct mlx5_hca_attr {\n #define MLX5_LRO_ENABLED(dev) \\\n \t((dev)->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_TCP_LRO)\n \n-#define MLX5_FLOW_IPV4_LRO\t(1 << 0)\n-#define MLX5_FLOW_IPV6_LRO\t(1 << 1)\n-\n /* LRO configurations structure. */\n struct mlx5_lro_config {\n \tuint32_t supported:1; /* Whether LRO is supported. */\ndiff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c\nindex f1d32bd..59ef716 100644\n--- a/drivers/net/mlx5/mlx5_flow_dv.c\n+++ b/drivers/net/mlx5/mlx5_flow_dv.c\n@@ -62,9 +62,6 @@\n \tuint32_t attr;\n };\n \n-#define MLX5_FLOW_IPV4_LRO (1 << 0)\n-#define MLX5_FLOW_IPV6_LRO (1 << 1)\n-\n /**\n * Initialize flow attributes structure according to flow items' types.\n *\n@@ -5186,26 +5183,13 @@ struct field_modify_info modify_tcp[] = {\n \t\t\t\t\t (*flow->queue),\n \t\t\t\t\t flow->rss.queue_num);\n \t\t\tif (!hrxq) {\n-\t\t\t\tint lro = 0;\n-\n-\t\t\t\tif (mlx5_lro_on(dev)) {\n-\t\t\t\t\tif ((dev_flow->layers &\n-\t\t\t\t\t MLX5_FLOW_LAYER_IPV4_LRO)\n-\t\t\t\t\t == MLX5_FLOW_LAYER_IPV4_LRO)\n-\t\t\t\t\t\tlro = MLX5_FLOW_IPV4_LRO;\n-\t\t\t\t\telse if ((dev_flow->layers &\n-\t\t\t\t\t\t MLX5_FLOW_LAYER_IPV6_LRO)\n-\t\t\t\t\t\t == MLX5_FLOW_LAYER_IPV6_LRO)\n-\t\t\t\t\t\tlro = MLX5_FLOW_IPV6_LRO;\n-\t\t\t\t}\n \t\t\t\thrxq = mlx5_hrxq_new\n \t\t\t\t\t(dev, flow->key, MLX5_RSS_HASH_KEY_LEN,\n \t\t\t\t\t dv->hash_fields, (*flow->queue),\n \t\t\t\t\t flow->rss.queue_num,\n \t\t\t\t\t !!(dev_flow->layers &\n-\t\t\t\t\t MLX5_FLOW_LAYER_TUNNEL), lro);\n+\t\t\t\t\t MLX5_FLOW_LAYER_TUNNEL));\n \t\t\t}\n-\n \t\t\tif (!hrxq) {\n \t\t\t\trte_flow_error_set\n \t\t\t\t\t(error, rte_errno,\ndiff --git a/drivers/net/mlx5/mlx5_flow_verbs.c b/drivers/net/mlx5/mlx5_flow_verbs.c\nindex bcec3b4..fd6f2d5 100644\n--- a/drivers/net/mlx5/mlx5_flow_verbs.c\n+++ b/drivers/net/mlx5/mlx5_flow_verbs.c\n@@ -1669,8 +1669,7 @@\n \t\t\t\t\t\t (*flow->queue),\n \t\t\t\t\t\t flow->rss.queue_num,\n \t\t\t\t\t\t !!(dev_flow->layers &\n-\t\t\t\t\t\t\tMLX5_FLOW_LAYER_TUNNEL),\n-\t\t\t\t\t\t 0);\n+\t\t\t\t\t\t MLX5_FLOW_LAYER_TUNNEL));\n \t\t\tif (!hrxq) {\n \t\t\t\trte_flow_error_set\n \t\t\t\t\t(error, rte_errno,\ndiff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c\nindex 3705d07..f7e861c 100644\n--- a/drivers/net/mlx5/mlx5_rxq.c\n+++ b/drivers/net/mlx5/mlx5_rxq.c\n@@ -2100,8 +2100,6 @@ struct mlx5_rxq_ctrl *\n * Number of queues.\n * @param tunnel\n * Tunnel type.\n- * @param lro\n- * Flow rule is relevant for LRO, i.e. contains IPv4/IPv6 and TCP.\n *\n * @return\n * The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.\n@@ -2111,7 +2109,7 @@ struct mlx5_hrxq *\n \t const uint8_t *rss_key, uint32_t rss_key_len,\n \t uint64_t hash_fields,\n \t const uint16_t *queues, uint32_t queues_n,\n-\t int tunnel __rte_unused, int lro)\n+\t int tunnel __rte_unused)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n \tstruct mlx5_hrxq *hrxq;\n@@ -2218,11 +2216,13 @@ struct mlx5_hrxq *\n \t\tif (dev->data->dev_conf.lpbk_mode)\n \t\t\ttir_attr.self_lb_block =\n \t\t\t\t\tMLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST;\n-\t\tif (lro) {\n+\t\tif (mlx5_lro_on(dev)) {\n \t\t\ttir_attr.lro_timeout_period_usecs =\n \t\t\t\t\tpriv->config.lro.timeout;\n \t\t\ttir_attr.lro_max_msg_sz = priv->max_lro_msg_size;\n-\t\t\ttir_attr.lro_enable_mask = lro;\n+\t\t\ttir_attr.lro_enable_mask =\n+\t\t\t\t\tMLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO |\n+\t\t\t\t\tMLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO;\n \t\t}\n \t\ttir = mlx5_devx_cmd_create_tir(priv->sh->ctx, &tir_attr);\n \t\tif (!tir) {\ndiff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h\nindex 5704d0a..9b58d0a 100644\n--- a/drivers/net/mlx5/mlx5_rxtx.h\n+++ b/drivers/net/mlx5/mlx5_rxtx.h\n@@ -358,7 +358,7 @@ struct mlx5_hrxq *mlx5_hrxq_new(struct rte_eth_dev *dev,\n \t\t\t\tconst uint8_t *rss_key, uint32_t rss_key_len,\n \t\t\t\tuint64_t hash_fields,\n \t\t\t\tconst uint16_t *queues, uint32_t queues_n,\n-\t\t\t\tint tunnel __rte_unused, int lro);\n+\t\t\t\tint tunnel __rte_unused);\n struct mlx5_hrxq *mlx5_hrxq_get(struct rte_eth_dev *dev,\n \t\t\t\tconst uint8_t *rss_key, uint32_t rss_key_len,\n \t\t\t\tuint64_t hash_fields,\n", "prefixes": [ "10/11" ] }