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GET /api/patches/57236/?format=api
{ "id": 57236, "url": "http://patchwork.dpdk.org/api/patches/57236/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/1564401209-18752-8-git-send-email-matan@mellanox.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1564401209-18752-8-git-send-email-matan@mellanox.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1564401209-18752-8-git-send-email-matan@mellanox.com", "date": "2019-07-29T11:53:25", "name": "[07/11] net/mlx5: allow LRO in regular Rx queue", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "ad7a029db0ab13e59fb90e2651305a73b96d71e8", "submitter": { "id": 796, "url": "http://patchwork.dpdk.org/api/people/796/?format=api", "name": "Matan Azrad", "email": "matan@mellanox.com" }, "delegate": { "id": 3268, "url": "http://patchwork.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/1564401209-18752-8-git-send-email-matan@mellanox.com/mbox/", "series": [ { "id": 5809, "url": "http://patchwork.dpdk.org/api/series/5809/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=5809", "date": "2019-07-29T11:53:21", "name": "net/mlx5: LRO fixes and enhancements", "version": 1, "mbox": "http://patchwork.dpdk.org/series/5809/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/57236/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/57236/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 162131BF96;\n\tMon, 29 Jul 2019 14:16:56 +0200 (CEST)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n\tby dpdk.org (Postfix) with ESMTP id 3F3B61BF5C\n\tfor <dev@dpdk.org>; Mon, 29 Jul 2019 14:16:36 +0200 (CEST)", "from Internal Mail-Server by MTLPINE2 (envelope-from\n\tmatan@mellanox.com)\n\twith ESMTPS (AES256-SHA encrypted); 29 Jul 2019 15:16:29 +0300", "from pegasus07.mtr.labs.mlnx (pegasus07.mtr.labs.mlnx\n\t[10.210.16.112])\n\tby labmailer.mlnx (8.13.8/8.13.8) with ESMTP id x6TCGS4L021429;\n\tMon, 29 Jul 2019 15:16:29 +0300" ], "From": "Matan Azrad <matan@mellanox.com>", "To": "Shahaf Shuler <shahafs@mellanox.com>, Yongseok Koh <yskoh@mellanox.com>, \n\tViacheslav Ovsiienko <viacheslavo@mellanox.com>", "Cc": "dev@dpdk.org, Dekel Peled <dekelp@mellanox.com>", "Date": "Mon, 29 Jul 2019 11:53:25 +0000", "Message-Id": "<1564401209-18752-8-git-send-email-matan@mellanox.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1564401209-18752-1-git-send-email-matan@mellanox.com>", "References": "<1564401209-18752-1-git-send-email-matan@mellanox.com>", "Subject": "[dpdk-dev] [PATCH 07/11] net/mlx5: allow LRO in regular Rx queue", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "LRO support was only for MPRQ, hence mprq Rx burst was selected when\nLRO was configured in the port.\n\nThe current support for MPRQ is suffering from bad memory utilization\nsince an external mempool is allocated by the PMD for the packets data\nin addition to the user mempool, besides that, the user may get packet\ndata addresses which were not configured by him.\n\nEven though MPRQ has the best performance for packet receiving in the\nmost cases and because of the above facts it is better to remove the\nautomatic MPRQ select when LRO is configured.\n\nMove MPRQ to be selected only when the user force it by the PMD\narguments including LRO case.\n\nAllow LRO offload using the regular RQ with the regular Rx burst\nfunction.\n\nSigned-off-by: Matan Azrad <matan@mellanox.com>\nAcked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>\n---\n drivers/net/mlx5/mlx5.c | 4 +---\n drivers/net/mlx5/mlx5_ethdev.c | 6 ------\n drivers/net/mlx5/mlx5_prm.h | 3 +++\n drivers/net/mlx5/mlx5_rxq.c | 27 ++++++++++++++-------------\n drivers/net/mlx5/mlx5_rxtx.h | 4 ++--\n drivers/net/mlx5/mlx5_rxtx_vec.c | 2 ++\n 6 files changed, 22 insertions(+), 24 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c\nindex ad0883d..a490bf2 100644\n--- a/drivers/net/mlx5/mlx5.c\n+++ b/drivers/net/mlx5/mlx5.c\n@@ -1856,7 +1856,7 @@ struct mlx5_dev_spawn_data {\n \t\tif (priv->counter_fallback)\n \t\t\tDRV_LOG(INFO, \"Use fall-back DV counter management\\n\");\n \t\t/* Check for LRO support. */\n-\t\tif (config.dest_tir && mprq && config.hca_attr.lro_cap) {\n+\t\tif (config.dest_tir && config.hca_attr.lro_cap) {\n \t\t\t/* TBD check tunnel lro caps. */\n \t\t\tconfig.lro.supported = config.hca_attr.lro_cap;\n \t\t\tDRV_LOG(DEBUG, \"Device supports LRO\");\n@@ -1869,8 +1869,6 @@ struct mlx5_dev_spawn_data {\n \t\t\t\tconfig.hca_attr.lro_timer_supported_periods[0];\n \t\t\tDRV_LOG(DEBUG, \"LRO session timeout set to %d usec\",\n \t\t\t\tconfig.lro.timeout);\n-\t\t\tconfig.mprq.enabled = 1;\n-\t\t\tDRV_LOG(DEBUG, \"Enable MPRQ for LRO use\");\n \t\t}\n \t}\n \tif (config.mprq.enabled && mprq) {\ndiff --git a/drivers/net/mlx5/mlx5_ethdev.c b/drivers/net/mlx5/mlx5_ethdev.c\nindex e627909..9d11831 100644\n--- a/drivers/net/mlx5/mlx5_ethdev.c\n+++ b/drivers/net/mlx5/mlx5_ethdev.c\n@@ -433,12 +433,6 @@ struct ethtool_link_settings {\n \t\t\tdev->data->port_id, priv->rxqs_n, rxqs_n);\n \t\tpriv->rxqs_n = rxqs_n;\n \t\t/*\n-\t\t * WHen using LRO, MPRQ is implicitly enabled.\n-\t\t * Adjust threshold value to ensure MPRQ can be enabled.\n-\t\t */\n-\t\tif (lro_on && priv->config.mprq.min_rxqs_num > priv->rxqs_n)\n-\t\t\tpriv->config.mprq.min_rxqs_num = priv->rxqs_n;\n-\t\t/*\n \t\t * If the requested number of RX queues is not a power of two,\n \t\t * use the maximum indirection table size for better balancing.\n \t\t * The result is always rounded to the next power of two.\ndiff --git a/drivers/net/mlx5/mlx5_prm.h b/drivers/net/mlx5/mlx5_prm.h\nindex 0716bbd..6ea6345 100644\n--- a/drivers/net/mlx5/mlx5_prm.h\n+++ b/drivers/net/mlx5/mlx5_prm.h\n@@ -237,6 +237,9 @@\n /* Amount of data bytes after eth data segment. */\n #define MLX5_ESEG_EXTRA_DATA_SIZE 32u\n \n+/* The maximum log value of segments per RQ WQE. */\n+#define MLX5_MAX_LOG_RQ_SEGS 5u\n+\n /* Completion mode. */\n enum mlx5_completion_mode {\n \tMLX5_COMP_ONLY_ERR = 0x0,\ndiff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c\nindex 5e54156..ad5b0a9 100644\n--- a/drivers/net/mlx5/mlx5_rxq.c\n+++ b/drivers/net/mlx5/mlx5_rxq.c\n@@ -93,7 +93,6 @@\n \n /**\n * Check whether Multi-Packet RQ is enabled for the device.\n- * MPRQ can be enabled explicitly, or implicitly by enabling LRO.\n *\n * @param dev\n * Pointer to Ethernet device.\n@@ -1607,6 +1606,7 @@ struct mlx5_rxq_ctrl *\n \tunsigned int max_rx_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;\n \tunsigned int non_scatter_min_mbuf_size = max_rx_pkt_len +\n \t\t\t\t\t\t\tRTE_PKTMBUF_HEADROOM;\n+\tunsigned int max_lro_size = 0;\n \n \tif (non_scatter_min_mbuf_size > mb_len && !(offloads &\n \t\t\t\t\t\t DEV_RX_OFFLOAD_SCATTER)) {\n@@ -1672,8 +1672,9 @@ struct mlx5_rxq_ctrl *\n \t\ttmpl->rxq.strd_headroom_en = strd_headroom_en;\n \t\ttmpl->rxq.mprq_max_memcpy_len = RTE_MIN(mb_len -\n \t\t\t RTE_PKTMBUF_HEADROOM, config->mprq.max_memcpy_len);\n-\t\tmlx5_max_lro_msg_size_adjust(dev, RTE_MIN(max_rx_pkt_len,\n-\t\t (1u << tmpl->rxq.strd_num_n) * (1u << tmpl->rxq.strd_sz_n)));\n+\t\tmax_lro_size = RTE_MIN(max_rx_pkt_len,\n+\t\t\t\t (1u << tmpl->rxq.strd_num_n) *\n+\t\t\t\t (1u << tmpl->rxq.strd_sz_n));\n \t\tDRV_LOG(DEBUG,\n \t\t\t\"port %u Rx queue %u: Multi-Packet RQ is enabled\"\n \t\t\t\" strd_num_n = %u, strd_sz_n = %u\",\n@@ -1681,6 +1682,7 @@ struct mlx5_rxq_ctrl *\n \t\t\ttmpl->rxq.strd_num_n, tmpl->rxq.strd_sz_n);\n \t} else if (max_rx_pkt_len <= (mb_len - RTE_PKTMBUF_HEADROOM)) {\n \t\ttmpl->rxq.sges_n = 0;\n+\t\tmax_lro_size = max_rx_pkt_len;\n \t} else if (offloads & DEV_RX_OFFLOAD_SCATTER) {\n \t\tunsigned int size = non_scatter_min_mbuf_size;\n \t\tunsigned int sges_n;\n@@ -1690,20 +1692,18 @@ struct mlx5_rxq_ctrl *\n \t\t * and round it to the next power of two.\n \t\t */\n \t\tsges_n = log2above((size / mb_len) + !!(size % mb_len));\n-\t\ttmpl->rxq.sges_n = sges_n;\n-\t\t/* Make sure rxq.sges_n did not overflow. */\n-\t\tsize = mb_len * (1 << tmpl->rxq.sges_n);\n-\t\tsize -= RTE_PKTMBUF_HEADROOM;\n-\t\tif (size < max_rx_pkt_len) {\n+\t\tif (sges_n > MLX5_MAX_LOG_RQ_SEGS) {\n \t\t\tDRV_LOG(ERR,\n \t\t\t\t\"port %u too many SGEs (%u) needed to handle\"\n-\t\t\t\t\" requested maximum packet size %u\",\n-\t\t\t\tdev->data->port_id,\n-\t\t\t\t1 << sges_n,\n-\t\t\t\tmax_rx_pkt_len);\n-\t\t\trte_errno = EOVERFLOW;\n+\t\t\t\t\" requested maximum packet size %u, the maximum\"\n+\t\t\t\t\" supported are %u\", dev->data->port_id,\n+\t\t\t\t1 << sges_n, max_rx_pkt_len,\n+\t\t\t\t1u << MLX5_MAX_LOG_RQ_SEGS);\n+\t\t\trte_errno = ENOTSUP;\n \t\t\tgoto error;\n \t\t}\n+\t\ttmpl->rxq.sges_n = sges_n;\n+\t\tmax_lro_size = max_rx_pkt_len;\n \t}\n \tif (mprq_en && !mlx5_rxq_mprq_enabled(&tmpl->rxq))\n \t\tDRV_LOG(WARNING,\n@@ -1725,6 +1725,7 @@ struct mlx5_rxq_ctrl *\n \t\trte_errno = EINVAL;\n \t\tgoto error;\n \t}\n+\tmlx5_max_lro_msg_size_adjust(dev, max_lro_size);\n \t/* Toggle RX checksum offload if hardware supports it. */\n \ttmpl->rxq.csum = !!(offloads & DEV_RX_OFFLOAD_CHECKSUM);\n \ttmpl->rxq.hw_timestamp = !!(offloads & DEV_RX_OFFLOAD_TIMESTAMP);\ndiff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h\nindex 60d871c..5704d0a 100644\n--- a/drivers/net/mlx5/mlx5_rxtx.h\n+++ b/drivers/net/mlx5/mlx5_rxtx.h\n@@ -105,7 +105,7 @@ struct mlx5_rxq_data {\n \tunsigned int hw_timestamp:1; /* Enable HW timestamp. */\n \tunsigned int vlan_strip:1; /* Enable VLAN stripping. */\n \tunsigned int crc_present:1; /* CRC must be subtracted. */\n-\tunsigned int sges_n:2; /* Log 2 of SGEs (max buffers per packet). */\n+\tunsigned int sges_n:3; /* Log 2 of SGEs (max buffers per packet). */\n \tunsigned int cqe_n:4; /* Log 2 of CQ elements. */\n \tunsigned int elts_n:4; /* Log 2 of Mbufs. */\n \tunsigned int rss_hash:1; /* RSS hash result is enabled. */\n@@ -115,7 +115,7 @@ struct mlx5_rxq_data {\n \tunsigned int strd_shift_en:1; /* Enable 2bytes shift on a stride. */\n \tunsigned int err_state:2; /* enum mlx5_rxq_err_state. */\n \tunsigned int strd_headroom_en:1; /* Enable mbuf headroom in MPRQ. */\n-\tunsigned int :3; /* Remaining bits. */\n+\tunsigned int :2; /* Remaining bits. */\n \tvolatile uint32_t *rq_db;\n \tvolatile uint32_t *cq_db;\n \tuint16_t port_id;\ndiff --git a/drivers/net/mlx5/mlx5_rxtx_vec.c b/drivers/net/mlx5/mlx5_rxtx_vec.c\nindex f6ec828..3815ff6 100644\n--- a/drivers/net/mlx5/mlx5_rxtx_vec.c\n+++ b/drivers/net/mlx5/mlx5_rxtx_vec.c\n@@ -151,6 +151,8 @@ int __attribute__((cold))\n \t\treturn -ENOTSUP;\n \tif (mlx5_mprq_enabled(dev))\n \t\treturn -ENOTSUP;\n+\tif (mlx5_lro_on(dev))\n+\t\treturn -ENOTSUP;\n \t/* All the configured queues should support. */\n \tfor (i = 0; i < priv->rxqs_n; ++i) {\n \t\tstruct mlx5_rxq_data *rxq = (*priv->rxqs)[i];\n", "prefixes": [ "07/11" ] }