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GET /api/patches/58289/?format=api
{ "id": 58289, "url": "http://patchwork.dpdk.org/api/patches/58289/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/1567146501-8224-3-git-send-email-anoobj@marvell.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1567146501-8224-3-git-send-email-anoobj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1567146501-8224-3-git-send-email-anoobj@marvell.com", "date": "2019-08-30T06:28:12", "name": "[02/11] crypto/octeontx2: add device init sequence in probe", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "df59ab913f19a5b5d44b495ffbe9fffa5d3389bb", "submitter": { "id": 1205, "url": "http://patchwork.dpdk.org/api/people/1205/?format=api", "name": "Anoob Joseph", "email": "anoobj@marvell.com" }, "delegate": { "id": 6690, "url": "http://patchwork.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/1567146501-8224-3-git-send-email-anoobj@marvell.com/mbox/", "series": [ { "id": 6176, "url": "http://patchwork.dpdk.org/api/series/6176/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=6176", "date": "2019-08-30T06:28:10", "name": "add OCTEON TX2 crypto PMD", "version": 1, "mbox": "http://patchwork.dpdk.org/series/6176/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/58289/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/58289/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 13BDA1E86F;\n\tFri, 30 Aug 2019 08:31:59 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n\t[67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 33B271E86F\n\tfor <dev@dpdk.org>; Fri, 30 Aug 2019 08:31:58 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n\tby mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id\n\tx7U6V3oi028322; Thu, 29 Aug 2019 23:31:57 -0700", "from sc-exch04.marvell.com ([199.233.58.184])\n\tby mx0b-0016f401.pphosted.com with ESMTP id 2uk4rkyg1u-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); \n\tThu, 29 Aug 2019 23:31:57 -0700", "from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH04.marvell.com\n\t(10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tThu, 29 Aug 2019 23:31:55 -0700", "from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com\n\t(10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Thu, 29 Aug 2019 23:31:55 -0700", "from ajoseph83.caveonetworks.com.com (unknown [10.29.45.56])\n\tby maili.marvell.com (Postfix) with ESMTP id 9D2A83F703F;\n\tThu, 29 Aug 2019 23:31:52 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-transfer-encoding : content-type; s=pfpt0818;\n\tbh=98OiPxMWAJqm5rpU4gICIFiyT1yWW6L6+9wy3ZDP9JM=;\n\tb=Tonw8xn3ywY4M0o9SAjTLP0Y5oQvm5DX1sHdB28fkxL5MuCdK/xPbU/Fca7GThV7Q/5N\n\tu/ce9sH9wKNGjiWQK7zkj5fUwruziia1253/5stQeVY1bsGH26Z+bo2M/Xf0jbHAd5U4\n\t+cBJwNrAs+vX+XHdMyaKU7q8+GDIcibjzC4/ZCqwAf6u3vlDIlu/3qnd2evOx0A2PHuD\n\tFKRyU/F2TuSKXghya5xCfOcpwhN6ydk5RInUI+PqfEZym29Q1XA0auZ4sMvoAV+KFVxn\n\t2CYjNx8Ud/X72bBkY+qeAylGOeA1OjIgmbIMpLbW7L4BVyr9dg+DDuBY8u9I6eDK0AN4\n\tzw== ", "From": "Anoob Joseph <anoobj@marvell.com>", "To": "Akhil Goyal <akhil.goyal@nxp.com>, Pablo de Lara\n\t<pablo.de.lara.guarch@intel.com>, Thomas Monjalon <thomas@monjalon.net>", "CC": "Anoob Joseph <anoobj@marvell.com>, Jerin Jacob <jerinj@marvell.com>,\n\tNarayana Prasad <pathreya@marvell.com>,\n\tAnkur Dwivedi <adwivedi@marvell.com>,\n\tTejasree Kondoj <ktejasree@marvell.com>, <dev@dpdk.org>", "Date": "Fri, 30 Aug 2019 11:58:12 +0530", "Message-ID": "<1567146501-8224-3-git-send-email-anoobj@marvell.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1567146501-8224-1-git-send-email-anoobj@marvell.com>", "References": "<1567146501-8224-1-git-send-email-anoobj@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.70,1.0.8\n\tdefinitions=2019-08-30_02:2019-08-29,2019-08-30 signatures=0", "Subject": "[dpdk-dev] [PATCH 02/11] crypto/octeontx2: add device init sequence\n\tin probe", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This patch adds the device init sequence for OCTEON TX2 crypto\ndevice.\n\nSigned-off-by: Ankur Dwivedi <adwivedi@marvell.com>\nSigned-off-by: Anoob Joseph <anoobj@marvell.com>\nSigned-off-by: Tejasree Kondoj <ktejasree@marvell.com>\n---\n drivers/crypto/octeontx2/Makefile | 10 +++++++\n drivers/crypto/octeontx2/meson.build | 2 ++\n drivers/crypto/octeontx2/otx2_cryptodev.c | 40 ++++++++++++++++++++++++++\n drivers/crypto/octeontx2/otx2_cryptodev.h | 10 ++++++-\n drivers/crypto/octeontx2/otx2_cryptodev_mbox.c | 30 +++++++++++++++++++\n drivers/crypto/octeontx2/otx2_cryptodev_mbox.h | 13 +++++++++\n 6 files changed, 104 insertions(+), 1 deletion(-)\n create mode 100644 drivers/crypto/octeontx2/otx2_cryptodev_mbox.c\n create mode 100644 drivers/crypto/octeontx2/otx2_cryptodev_mbox.h", "diff": "diff --git a/drivers/crypto/octeontx2/Makefile b/drivers/crypto/octeontx2/Makefile\nindex 3273178..10d8c39 100644\n--- a/drivers/crypto/octeontx2/Makefile\n+++ b/drivers/crypto/octeontx2/Makefile\n@@ -23,9 +23,19 @@ VPATH += $(RTE_SDK)/drivers/crypto/octeontx2\n CFLAGS += -O3\n CFLAGS += -I$(RTE_SDK)/drivers/common/cpt\n CFLAGS += -I$(RTE_SDK)/drivers/common/octeontx2\n+CFLAGS += -I$(RTE_SDK)/drivers/mempool/octeontx2\n+\n+ifneq ($(CONFIG_RTE_ARCH_64),y)\n+CFLAGS += -Wno-int-to-pointer-cast\n+CFLAGS += -Wno-pointer-to-int-cast\n+ifeq ($(CONFIG_RTE_TOOLCHAIN_ICC),y)\n+CFLAGS += -diag-disable 2259\n+endif\n+endif\n \n # PMD code\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO) += otx2_cryptodev.c\n+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO) += otx2_cryptodev_mbox.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO) += otx2_cryptodev_ops.c\n \n # export include files\ndiff --git a/drivers/crypto/octeontx2/meson.build b/drivers/crypto/octeontx2/meson.build\nindex 2b55d2a..845d50d 100644\n--- a/drivers/crypto/octeontx2/meson.build\n+++ b/drivers/crypto/octeontx2/meson.build\n@@ -11,6 +11,7 @@ deps += ['common_octeontx2']\n name = 'octeontx2_crypto'\n \n sources = files('otx2_cryptodev.c',\n+\t\t'otx2_cryptodev_mbox.c',\n \t\t'otx2_cryptodev_ops.c')\n \n extra_flags = []\n@@ -27,3 +28,4 @@ endforeach\n \n includes += include_directories('../../common/cpt')\n includes += include_directories('../../common/octeontx2')\n+includes += include_directories('../../mempool/octeontx2')\ndiff --git a/drivers/crypto/octeontx2/otx2_cryptodev.c b/drivers/crypto/octeontx2/otx2_cryptodev.c\nindex cf3a010..814b9ed 100644\n--- a/drivers/crypto/octeontx2/otx2_cryptodev.c\n+++ b/drivers/crypto/octeontx2/otx2_cryptodev.c\n@@ -18,7 +18,9 @@\n \n #include \"otx2_common.h\"\n #include \"otx2_cryptodev.h\"\n+#include \"otx2_cryptodev_mbox.h\"\n #include \"otx2_cryptodev_ops.h\"\n+#include \"otx2_dev.h\"\n \n static int otx2_cryptodev_logtype;\n \n@@ -44,6 +46,9 @@ otx2_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,\n \t};\n \tchar name[RTE_CRYPTODEV_NAME_MAX_LEN];\n \tstruct rte_cryptodev *dev;\n+\tstruct otx2_dev *otx2_dev;\n+\tstruct otx2_cpt_vf *vf;\n+\tuint16_t nb_queues;\n \tint ret;\n \n \t/* Initialize logtype used in common */\n@@ -61,6 +66,37 @@ otx2_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,\n \n \tdev->driver_id = otx2_cryptodev_driver_id;\n \n+\t/* Get private data space allocated */\n+\tvf = dev->data->dev_private;\n+\n+\totx2_dev = &vf->otx2_dev;\n+\n+\t/* Initialize the base otx2_dev object */\n+\tret = otx2_dev_init(pci_dev, otx2_dev);\n+\tif (ret) {\n+\t\tCPT_LOG_ERR(\"Could not initialize otx2_dev\");\n+\t\tgoto pmd_destroy;\n+\t}\n+\n+\t/* Get number of queues available on the device */\n+\tret = otx2_cpt_available_queues_get(dev, &nb_queues);\n+\tif (ret) {\n+\t\tCPT_LOG_ERR(\"Could not determine the number of queues available\");\n+\t\tgoto otx2_dev_fini;\n+\t}\n+\n+\t/* Don't exceed the limits set per VF */\n+\tnb_queues = RTE_MIN(nb_queues, OTX2_CPT_MAX_QUEUES_PER_VF);\n+\n+\tif (nb_queues == 0) {\n+\t\tCPT_LOG_ERR(\"No free queues available on the device\");\n+\t\tgoto otx2_dev_fini;\n+\t}\n+\n+\tvf->max_queues = nb_queues;\n+\n+\tCPT_LOG_INFO(\"Max queues supported by device: %d\", vf->max_queues);\n+\n \tdev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |\n \t\t\t RTE_CRYPTODEV_FF_HW_ACCELERATED |\n \t\t\t RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |\n@@ -70,6 +106,10 @@ otx2_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,\n \n \treturn 0;\n \n+otx2_dev_fini:\n+\totx2_dev_fini(pci_dev, otx2_dev);\n+pmd_destroy:\n+\trte_cryptodev_pmd_destroy(dev);\n exit:\n \tCPT_LOG_ERR(\"Could not create device (vendor_id: 0x%x device_id: 0x%x)\",\n \t\t pci_dev->id.vendor_id, pci_dev->id.device_id);\ndiff --git a/drivers/crypto/octeontx2/otx2_cryptodev.h b/drivers/crypto/octeontx2/otx2_cryptodev.h\nindex da0f653..531bd6d 100644\n--- a/drivers/crypto/octeontx2/otx2_cryptodev.h\n+++ b/drivers/crypto/octeontx2/otx2_cryptodev.h\n@@ -7,14 +7,22 @@\n \n #include \"cpt_common.h\"\n \n+#include \"otx2_dev.h\"\n+\n /* Marvell OCTEON TX2 Crypto PMD device name */\n #define CRYPTODEV_NAME_OCTEONTX2_PMD\tcrypto_octeontx2\n \n+#define OTX2_CPT_MAX_LFS\t\t64\n+#define OTX2_CPT_MAX_QUEUES_PER_VF\t64\n+\n /**\n * Device private data\n */\n struct otx2_cpt_vf {\n-\t/* To be populated */\n+\tstruct otx2_dev otx2_dev;\n+\t/**< Base class */\n+\tuint16_t max_queues;\n+\t/**< Max queues supported */\n };\n \n /*\ndiff --git a/drivers/crypto/octeontx2/otx2_cryptodev_mbox.c b/drivers/crypto/octeontx2/otx2_cryptodev_mbox.c\nnew file mode 100644\nindex 0000000..48d86ef\n--- /dev/null\n+++ b/drivers/crypto/octeontx2/otx2_cryptodev_mbox.c\n@@ -0,0 +1,30 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright (C) 2019 Marvell International Ltd.\n+ */\n+#include <rte_cryptodev.h>\n+\n+#include \"cpt_pmd_logs.h\"\n+\n+#include \"otx2_cryptodev.h\"\n+#include \"otx2_cryptodev_mbox.h\"\n+#include \"otx2_dev.h\"\n+#include \"otx2_mbox.h\"\n+\n+int\n+otx2_cpt_available_queues_get(const struct rte_cryptodev *dev,\n+\t\t\t uint16_t *nb_queues)\n+{\n+\tstruct otx2_cpt_vf *vf = dev->data->dev_private;\n+\tstruct otx2_dev *otx2_dev = &vf->otx2_dev;\n+\tstruct free_rsrcs_rsp *rsp;\n+\tint ret;\n+\n+\totx2_mbox_alloc_msg_free_rsrc_cnt(otx2_dev->mbox);\n+\n+\tret = otx2_mbox_process_msg(otx2_dev->mbox, (void *)&rsp);\n+\tif (ret)\n+\t\treturn -EIO;\n+\n+\t*nb_queues = rsp->cpt;\n+\treturn 0;\n+}\ndiff --git a/drivers/crypto/octeontx2/otx2_cryptodev_mbox.h b/drivers/crypto/octeontx2/otx2_cryptodev_mbox.h\nnew file mode 100644\nindex 0000000..648c009\n--- /dev/null\n+++ b/drivers/crypto/octeontx2/otx2_cryptodev_mbox.h\n@@ -0,0 +1,13 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright (C) 2019 Marvell International Ltd.\n+ */\n+\n+#ifndef _OTX2_CRYPTODEV_MBOX_H_\n+#define _OTX2_CRYPTODEV_MBOX_H_\n+\n+#include <rte_cryptodev.h>\n+\n+int otx2_cpt_available_queues_get(const struct rte_cryptodev *dev,\n+\t\t\t\t uint16_t *nb_queues);\n+\n+#endif /* _OTX2_CRYPTODEV_MBOX_H_ */\n", "prefixes": [ "02/11" ] }