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GET /api/patches/63629/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 63629,
    "url": "http://patchwork.dpdk.org/api/patches/63629/?format=api",
    "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/1575806094-28391-5-git-send-email-anoobj@marvell.com/",
    "project": {
        "id": 1,
        "url": "http://patchwork.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1575806094-28391-5-git-send-email-anoobj@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1575806094-28391-5-git-send-email-anoobj@marvell.com",
    "date": "2019-12-08T11:54:43",
    "name": "[04/15] crypto/octeontx2: create eth security ctx",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "fbc7ec3ef8f58078c45c1b6a3b9ee9bfdaef6913",
    "submitter": {
        "id": 1205,
        "url": "http://patchwork.dpdk.org/api/people/1205/?format=api",
        "name": "Anoob Joseph",
        "email": "anoobj@marvell.com"
    },
    "delegate": {
        "id": 6690,
        "url": "http://patchwork.dpdk.org/api/users/6690/?format=api",
        "username": "akhil",
        "first_name": "akhil",
        "last_name": "goyal",
        "email": "gakhil@marvell.com"
    },
    "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/1575806094-28391-5-git-send-email-anoobj@marvell.com/mbox/",
    "series": [
        {
            "id": 7749,
            "url": "http://patchwork.dpdk.org/api/series/7749/?format=api",
            "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=7749",
            "date": "2019-12-08T11:54:39",
            "name": "add OCTEONTX2 inline IPsec support",
            "version": 1,
            "mbox": "http://patchwork.dpdk.org/series/7749/mbox/"
        }
    ],
    "comments": "http://patchwork.dpdk.org/api/patches/63629/comments/",
    "check": "warning",
    "checks": "http://patchwork.dpdk.org/api/patches/63629/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 46785A04F1;\n\tSun,  8 Dec 2019 12:56:12 +0100 (CET)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 80B3A1BF73;\n\tSun,  8 Dec 2019 12:55:58 +0100 (CET)",
            "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 537401BF71\n for <dev@dpdk.org>; Sun,  8 Dec 2019 12:55:57 +0100 (CET)",
            "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id\n xB8Bqnm8007482; Sun, 8 Dec 2019 03:55:56 -0800",
            "from sc-exch03.marvell.com ([199.233.58.183])\n by mx0a-0016f401.pphosted.com with ESMTP id 2wrbawjj28-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Sun, 08 Dec 2019 03:55:56 -0800",
            "from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH03.marvell.com\n (10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Sun, 8 Dec\n 2019 03:55:55 -0800",
            "from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com\n (10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n Transport; Sun, 8 Dec 2019 03:55:55 -0800",
            "from ajoseph83.caveonetworks.com.com (unknown [10.29.45.60])\n by maili.marvell.com (Postfix) with ESMTP id 51C023F703F;\n Sun,  8 Dec 2019 03:55:50 -0800 (PST)"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0818;\n bh=pWvV4tQaASanfhRiAxAIE4UE/F99fGfl7d7CLmlxIuc=;\n b=mQznd/AugaoYusYid88ds26jnLox5ROjqVNDoQngG0zBKyFKxxiwj8WVCIgqeHCypNl+\n 3U+np1paxLA9mwU1LROUYYcWTvAGwpMoLwCDWgG0fVKLBeB9RKHUaOIxbaiyt1vAIwDP\n MUka221FVEVxTCQ2lbeaRjNsPoRFNMSnCqgUqoevRbMwv5u25Jj6vG0Wc8nQM4VQYUnW\n e8gXuCS+FvUlZf/wm7MyLa4uZkeihnnrqr1gvZ4tqQ9ysEkMcdLHGIgZbjvJrc4EqqK5\n 1t+OsvHKX8ORChjpdamx6ApJxTqyKX6bjvwW4/Jy69xmrbPQcNtelr/hvs16ih8B1327 3w==",
        "From": "Anoob Joseph <anoobj@marvell.com>",
        "To": "Akhil Goyal <akhil.goyal@nxp.com>, Declan Doherty\n <declan.doherty@intel.com>, Thomas Monjalon <thomas@monjalon.net>",
        "CC": "Anoob Joseph <anoobj@marvell.com>, Jerin Jacob <jerinj@marvell.com>,\n Narayana Prasad <pathreya@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Nithin Dabilpuram <ndabilpuram@marvell.com>,\n \"Pavan Nikhilesh\" <pbhagavatula@marvell.com>, Ankur Dwivedi\n <adwivedi@marvell.com>, Archana Muniganti <marchana@marvell.com>, Tejasree\n Kondoj <ktejasree@marvell.com>, Vamsi Attunuru <vattunuru@marvell.com>,\n \"Lukasz Bartosik\" <lbartosik@marvell.com>, <dev@dpdk.org>",
        "Date": "Sun, 8 Dec 2019 17:24:43 +0530",
        "Message-ID": "<1575806094-28391-5-git-send-email-anoobj@marvell.com>",
        "X-Mailer": "git-send-email 2.7.4",
        "In-Reply-To": "<1575806094-28391-1-git-send-email-anoobj@marvell.com>",
        "References": "<1575806094-28391-1-git-send-email-anoobj@marvell.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Content-Type": "text/plain",
        "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.95,18.0.572\n definitions=2019-12-08_03:2019-12-05,2019-12-08 signatures=0",
        "Subject": "[dpdk-dev] [PATCH 04/15] crypto/octeontx2: create eth security ctx",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Adding security ctx to the eth device.\n\nSigned-off-by: Ankur Dwivedi <adwivedi@marvell.com>\nSigned-off-by: Anoob Joseph <anoobj@marvell.com>\nSigned-off-by: Archana Muniganti <marchana@marvell.com>\nSigned-off-by: Tejasree Kondoj <ktejasree@marvell.com>\nSigned-off-by: Vamsi Attunuru <vattunuru@marvell.com>\n---\n drivers/common/octeontx2/otx2_common.c             |  2 ++\n drivers/common/octeontx2/otx2_common.h             | 10 +++++++\n .../octeontx2/rte_common_octeontx2_version.map     |  2 ++\n drivers/crypto/octeontx2/Makefile                  |  3 +-\n drivers/crypto/octeontx2/meson.build               |  4 ++-\n drivers/crypto/octeontx2/otx2_cryptodev.c          |  4 +++\n drivers/crypto/octeontx2/otx2_security.c           | 35 ++++++++++++++++++++++\n drivers/crypto/octeontx2/otx2_security.h           | 14 +++++++++\n drivers/net/octeontx2/otx2_ethdev.c                | 18 ++++++++++-\n 9 files changed, 89 insertions(+), 3 deletions(-)\n create mode 100644 drivers/crypto/octeontx2/otx2_security.c\n create mode 100644 drivers/crypto/octeontx2/otx2_security.h",
    "diff": "diff --git a/drivers/common/octeontx2/otx2_common.c b/drivers/common/octeontx2/otx2_common.c\nindex 116db0f..764f6cd 100644\n--- a/drivers/common/octeontx2/otx2_common.c\n+++ b/drivers/common/octeontx2/otx2_common.c\n@@ -11,6 +11,8 @@\n #include \"otx2_dev.h\"\n #include \"otx2_mbox.h\"\n \n+struct otx2_sec_eth_crypto_idev_ops otx2_sec_idev_ops;\n+\n /**\n  * @internal\n  * Set default NPA configuration.\ndiff --git a/drivers/common/octeontx2/otx2_common.h b/drivers/common/octeontx2/otx2_common.h\nindex d32e59a..a1cb434 100644\n--- a/drivers/common/octeontx2/otx2_common.h\n+++ b/drivers/common/octeontx2/otx2_common.h\n@@ -77,6 +77,16 @@ void otx2_npa_set_defaults(struct otx2_idev_cfg *idev);\n int otx2_npa_lf_active(void *dev);\n int otx2_npa_lf_obj_ref(void);\n \n+typedef int (*otx2_sec_eth_ctx_create_t)(struct rte_eth_dev *eth_dev);\n+typedef void (*otx2_sec_eth_ctx_destroy_t)(struct rte_eth_dev *eth_dev);\n+\n+struct otx2_sec_eth_crypto_idev_ops {\n+\totx2_sec_eth_ctx_create_t ctx_create;\n+\totx2_sec_eth_ctx_destroy_t ctx_destroy;\n+};\n+\n+extern struct otx2_sec_eth_crypto_idev_ops otx2_sec_idev_ops;\n+\n /* Log */\n extern int otx2_logtype_base;\n extern int otx2_logtype_mbox;\ndiff --git a/drivers/common/octeontx2/rte_common_octeontx2_version.map b/drivers/common/octeontx2/rte_common_octeontx2_version.map\nindex dac2283..d1dcb52 100644\n--- a/drivers/common/octeontx2/rte_common_octeontx2_version.map\n+++ b/drivers/common/octeontx2/rte_common_octeontx2_version.map\n@@ -32,5 +32,7 @@ DPDK_20.0 {\n \totx2_sso_pf_func_set;\n \totx2_unregister_irq;\n \n+\totx2_sec_idev_ops;\n+\n \tlocal: *;\n };\ndiff --git a/drivers/crypto/octeontx2/Makefile b/drivers/crypto/octeontx2/Makefile\nindex 3ba67ed..d2e9b9f 100644\n--- a/drivers/crypto/octeontx2/Makefile\n+++ b/drivers/crypto/octeontx2/Makefile\n@@ -11,7 +11,7 @@ LIB = librte_pmd_octeontx2_crypto.a\n CFLAGS += $(WERROR_FLAGS)\n \n LDLIBS += -lrte_eal -lrte_ethdev -lrte_mbuf -lrte_mempool -lrte_ring\n-LDLIBS += -lrte_cryptodev\n+LDLIBS += -lrte_cryptodev -lrte_security\n LDLIBS += -lrte_pci -lrte_bus_pci\n LDLIBS += -lrte_common_cpt -lrte_common_octeontx2\n \n@@ -38,6 +38,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO) += otx2_cryptodev_capabilities.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO) += otx2_cryptodev_hw_access.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO) += otx2_cryptodev_mbox.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO) += otx2_cryptodev_ops.c\n+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO) += otx2_security.c\n \n # export include files\n SYMLINK-y-include +=\ndiff --git a/drivers/crypto/octeontx2/meson.build b/drivers/crypto/octeontx2/meson.build\nindex 67deca3..f7b2937 100644\n--- a/drivers/crypto/octeontx2/meson.build\n+++ b/drivers/crypto/octeontx2/meson.build\n@@ -9,6 +9,7 @@ deps += ['bus_pci']\n deps += ['common_cpt']\n deps += ['common_octeontx2']\n deps += ['ethdev']\n+deps += ['security']\n name = 'octeontx2_crypto'\n \n allow_experimental_apis = true\n@@ -16,7 +17,8 @@ sources = files('otx2_cryptodev.c',\n \t\t'otx2_cryptodev_capabilities.c',\n \t\t'otx2_cryptodev_hw_access.c',\n \t\t'otx2_cryptodev_mbox.c',\n-\t\t'otx2_cryptodev_ops.c')\n+\t\t'otx2_cryptodev_ops.c',\n+\t\t'otx2_security.c')\n \n extra_flags = []\n # This integrated controller runs only on a arm64 machine, remove 32bit warnings\ndiff --git a/drivers/crypto/octeontx2/otx2_cryptodev.c b/drivers/crypto/octeontx2/otx2_cryptodev.c\nindex 7fd216b..86c1188 100644\n--- a/drivers/crypto/octeontx2/otx2_cryptodev.c\n+++ b/drivers/crypto/octeontx2/otx2_cryptodev.c\n@@ -17,6 +17,7 @@\n #include \"otx2_cryptodev_mbox.h\"\n #include \"otx2_cryptodev_ops.h\"\n #include \"otx2_dev.h\"\n+#include \"otx2_security.h\"\n \n /* CPT common headers */\n #include \"cpt_common.h\"\n@@ -154,4 +155,7 @@ RTE_INIT(otx2_cpt_init_log)\n \totx2_cpt_logtype = rte_log_register(\"pmd.crypto.octeontx2\");\n \tif (otx2_cpt_logtype >= 0)\n \t\trte_log_set_level(otx2_cpt_logtype, RTE_LOG_NOTICE);\n+\n+\totx2_sec_idev_ops.ctx_create = otx2_sec_eth_ctx_create;\n+\totx2_sec_idev_ops.ctx_destroy = otx2_sec_eth_ctx_destroy;\n }\ndiff --git a/drivers/crypto/octeontx2/otx2_security.c b/drivers/crypto/octeontx2/otx2_security.c\nnew file mode 100644\nindex 0000000..14394d2\n--- /dev/null\n+++ b/drivers/crypto/octeontx2/otx2_security.c\n@@ -0,0 +1,35 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright (C) 2019 Marvell International Ltd.\n+ */\n+\n+#include <rte_ethdev.h>\n+#include <rte_malloc.h>\n+#include <rte_security.h>\n+\n+#include \"otx2_security.h\"\n+\n+int\n+otx2_sec_eth_ctx_create(struct rte_eth_dev *eth_dev)\n+{\n+\tstruct rte_security_ctx *ctx;\n+\n+\tctx = rte_malloc(\"otx2_sec_eth_ctx\",\n+\t\t\t sizeof(struct rte_security_ctx), 0);\n+\tif (ctx == NULL)\n+\t\treturn -ENOMEM;\n+\n+\t/* Populate ctx */\n+\n+\tctx->device = eth_dev;\n+\tctx->sess_cnt = 0;\n+\n+\teth_dev->security_ctx = ctx;\n+\n+\treturn 0;\n+}\n+\n+void\n+otx2_sec_eth_ctx_destroy(struct rte_eth_dev *eth_dev)\n+{\n+\trte_free(eth_dev->security_ctx);\n+}\ndiff --git a/drivers/crypto/octeontx2/otx2_security.h b/drivers/crypto/octeontx2/otx2_security.h\nnew file mode 100644\nindex 0000000..6ebf73f\n--- /dev/null\n+++ b/drivers/crypto/octeontx2/otx2_security.h\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright (C) 2019 Marvell International Ltd.\n+ */\n+\n+#ifndef __OTX2_SECURITY_H__\n+#define __OTX2_SECURITY_H__\n+\n+#include <rte_ethdev.h>\n+\n+int otx2_sec_eth_ctx_create(struct rte_eth_dev *eth_dev);\n+\n+void otx2_sec_eth_ctx_destroy(struct rte_eth_dev *eth_dev);\n+\n+#endif /* __OTX2_SECURITY_H__ */\ndiff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c\nindex ed32927..3e19ac2 100644\n--- a/drivers/net/octeontx2/otx2_ethdev.c\n+++ b/drivers/net/octeontx2/otx2_ethdev.c\n@@ -2236,10 +2236,19 @@ otx2_eth_dev_init(struct rte_eth_dev *eth_dev)\n \t\tdev->hwcap |= OTX2_FIXUP_F_LIMIT_CQ_FULL;\n \t}\n \n+\t/* Create security ctx */\n+\tif (otx2_sec_idev_ops.ctx_create != NULL) {\n+\t\trc = otx2_sec_idev_ops.ctx_create(eth_dev);\n+\t\tif (rc)\n+\t\t\tgoto free_mac_addrs;\n+\t\tdev->tx_offload_capa |= DEV_TX_OFFLOAD_SECURITY;\n+\t\tdev->rx_offload_capa |= DEV_RX_OFFLOAD_SECURITY;\n+\t}\n+\n \t/* Initialize rte-flow */\n \trc = otx2_flow_init(dev);\n \tif (rc)\n-\t\tgoto free_mac_addrs;\n+\t\tgoto sec_ctx_destroy;\n \n \totx2_nix_mc_filter_init(dev);\n \n@@ -2250,6 +2259,9 @@ otx2_eth_dev_init(struct rte_eth_dev *eth_dev)\n \t\t     dev->rx_offload_capa, dev->tx_offload_capa);\n \treturn 0;\n \n+sec_ctx_destroy:\n+\tif (otx2_sec_idev_ops.ctx_destroy != NULL)\n+\t\totx2_sec_idev_ops.ctx_destroy(eth_dev);\n free_mac_addrs:\n \trte_free(eth_dev->data->mac_addrs);\n unregister_irq:\n@@ -2333,6 +2345,10 @@ otx2_eth_dev_uninit(struct rte_eth_dev *eth_dev, bool mbox_close)\n \tif (rc)\n \t\totx2_err(\"Failed to cleanup npa lf, rc=%d\", rc);\n \n+\t/* Destroy security ctx */\n+\tif (otx2_sec_idev_ops.ctx_destroy != NULL)\n+\t\totx2_sec_idev_ops.ctx_destroy(eth_dev);\n+\n \trte_free(eth_dev->data->mac_addrs);\n \teth_dev->data->mac_addrs = NULL;\n \tdev->drv_inited = false;\n",
    "prefixes": [
        "04/15"
    ]
}