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{
    "id": 6474,
    "url": "http://patchwork.dpdk.org/api/patches/6474/?format=api",
    "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/1437104817-13578-1-git-send-email-zhe.tao@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patchwork.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
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    },
    "msgid": "<1437104817-13578-1-git-send-email-zhe.tao@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1437104817-13578-1-git-send-email-zhe.tao@intel.com",
    "date": "2015-07-17T03:46:57",
    "name": "[dpdk-dev,v2] Fix the endian issue for the i40e read&write registers functions",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "0a3646bd81d36bd96f4bf62eb1b0a6c1c338eb85",
    "submitter": {
        "id": 276,
        "url": "http://patchwork.dpdk.org/api/people/276/?format=api",
        "name": "Zhe Tao",
        "email": "zhe.tao@intel.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/1437104817-13578-1-git-send-email-zhe.tao@intel.com/mbox/",
    "series": [],
    "comments": "http://patchwork.dpdk.org/api/patches/6474/comments/",
    "check": "pending",
    "checks": "http://patchwork.dpdk.org/api/patches/6474/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
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        ],
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.15,492,1432623600\"; d=\"scan'208\";a=\"749057818\"",
        "From": "Zhe Tao <zhe.tao@intel.com>",
        "To": "dev@dpdk.org",
        "Date": "Fri, 17 Jul 2015 11:46:57 +0800",
        "Message-Id": "<1437104817-13578-1-git-send-email-zhe.tao@intel.com>",
        "X-Mailer": "git-send-email 1.7.4.1",
        "In-Reply-To": "<1436870216-12926-1-git-send-email-zhe.tao@intel.com>",
        "References": "<1436870216-12926-1-git-send-email-zhe.tao@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v2] Fix the endian issue for the i40e read&write\n\tregisters functions",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "patches and discussions about DPDK <dev.dpdk.org>",
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        "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "When using the Power big endian CPU for i40e NIC,\nthe current i40e related registers operations will cause a problem,\nbecause the i40e registers are little endian which is inconsistent with\nbig endian CPU. Add the conversion for the inconsistency.\n \nSigned-off-by: Zhe Tao <zhe.tao@intel.com>\n---\nPATCH v2: Edit the comments make it more clear\n\nPATCH v1: Add the endian conversion for registers operations.\n\n drivers/net/i40e/base/i40e_osdep.h | 4 ++--\n 1 file changed, 2 insertions(+), 2 deletions(-)",
    "diff": "diff --git a/drivers/net/i40e/base/i40e_osdep.h b/drivers/net/i40e/base/i40e_osdep.h\nindex 3ce8057..70d2721 100644\n--- a/drivers/net/i40e/base/i40e_osdep.h\n+++ b/drivers/net/i40e/base/i40e_osdep.h\n@@ -122,10 +122,10 @@ do {                                                            \\\n \t((volatile uint32_t *)((char *)(a)->hw_addr + (reg)))\n static inline uint32_t i40e_read_addr(volatile void *addr)\n {\n-\treturn I40E_PCI_REG(addr);\n+\treturn rte_le_to_cpu_32(I40E_PCI_REG(addr));\n }\n #define I40E_PCI_REG_WRITE(reg, value) \\\n-\tdo {I40E_PCI_REG((reg)) = (value);} while(0)\n+\tdo { I40E_PCI_REG((reg)) = rte_cpu_to_le_32(value); } while (0)\n \n #define I40E_WRITE_FLUSH(a) I40E_READ_REG(a, I40E_GLGEN_STAT)\n #define I40EVF_WRITE_FLUSH(a) I40E_READ_REG(a, I40E_VFGEN_RSTAT)\n",
    "prefixes": [
        "dpdk-dev",
        "v2"
    ]
}