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GET /api/patches/65079/?format=api
{ "id": 65079, "url": "http://patchwork.dpdk.org/api/patches/65079/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/1579759262-189720-3-git-send-email-suanmingm@mellanox.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1579759262-189720-3-git-send-email-suanmingm@mellanox.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1579759262-189720-3-git-send-email-suanmingm@mellanox.com", "date": "2020-01-23T06:01:02", "name": "[2/2] net/mlx5: fix incorrect register usage in meter", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "ddb220e22d59b466fa1d5f53c5011b9ae0d86fc8", "submitter": { "id": 1358, "url": "http://patchwork.dpdk.org/api/people/1358/?format=api", "name": "Suanming Mou", "email": "suanmingm@mellanox.com" }, "delegate": { "id": 3268, "url": "http://patchwork.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/1579759262-189720-3-git-send-email-suanmingm@mellanox.com/mbox/", "series": [ { "id": 8273, "url": "http://patchwork.dpdk.org/api/series/8273/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=8273", "date": "2020-01-23T06:01:00", "name": "fix incorrect register usage in meter", "version": 1, "mbox": "http://patchwork.dpdk.org/series/8273/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/65079/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/65079/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id B974AA0538;\n\tThu, 23 Jan 2020 07:01:35 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id DAA23493D;\n\tThu, 23 Jan 2020 07:01:20 +0100 (CET)", "from git-send-mailer.rdmz.labs.mlnx (unknown [37.142.13.130])\n by dpdk.org (Postfix) with ESMTP id 5D54C343C;\n Thu, 23 Jan 2020 07:01:17 +0100 (CET)" ], "From": "Suanming Mou <suanmingm@mellanox.com>", "To": "Matan Azrad <matan@mellanox.com>, Shahaf Shuler <shahafs@mellanox.com>,\n Viacheslav Ovsiienko <viacheslavo@mellanox.com>", "Cc": "dev@dpdk.org,\n\tstable@dpdk.org", "Date": "Thu, 23 Jan 2020 08:01:02 +0200", "Message-Id": "<1579759262-189720-3-git-send-email-suanmingm@mellanox.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1579759262-189720-1-git-send-email-suanmingm@mellanox.com>", "References": "<1579759262-189720-1-git-send-email-suanmingm@mellanox.com>", "Subject": "[dpdk-dev] [PATCH 2/2] net/mlx5: fix incorrect register usage in\n\tmeter", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Flow with meter will split to three subflows, the prefix subflow with\nmeter action do the color, the meter subflow filter the packets, the\nsuffix subflow do all the left actions for packets pass the filter.\nBoth the color and the subflow match between prefix and suffix use the\nregister to store the tag.\n\nFor some of the NICs with meter color register share capability, it\nonly uses 8 LSB of the register for color, the left 24 MSB can be used\nfor flow id match between meter prefix subflow and suffix subflow.\n\nCurrently, one entire register is allocated for flow matching which\ncauses the NICs with limited registers don't have enough register for\nother matching.\n\nAdd the meter color share capability checking to fix lacking of\nregisters issue.\n\nFixes: 9ea9b049a960 (\"net/mlx5: split meter flow\")\nCc: stable@dpdk.org\n\nSigned-off-by: Suanming Mou <suanmingm@mellanox.com>\nAcked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>\n---\n drivers/net/mlx5/mlx5.c | 9 ++++++-\n drivers/net/mlx5/mlx5.h | 3 +++\n drivers/net/mlx5/mlx5_devx_cmds.c | 2 ++\n drivers/net/mlx5/mlx5_flow.c | 49 ++++++++++++++++++++++++---------------\n drivers/net/mlx5/mlx5_flow_dv.c | 4 ++--\n drivers/net/mlx5/mlx5_prm.h | 7 +++++-\n 6 files changed, 51 insertions(+), 23 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c\nindex 2c9f705..2049370 100644\n--- a/drivers/net/mlx5/mlx5.c\n+++ b/drivers/net/mlx5/mlx5.c\n@@ -2552,6 +2552,8 @@ struct mlx5_flow_id_pool *\n \t\t\t\tpriv->mtr_color_reg = ffs(reg_c_mask) - 1 +\n \t\t\t\t\t\t REG_C_0;\n \t\t\t\tpriv->mtr_en = 1;\n+\t\t\t\tpriv->mtr_reg_share =\n+\t\t\t\t config.hca_attr.qos.flow_meter_reg_share;\n \t\t\t\tDRV_LOG(DEBUG, \"The REG_C meter uses is %d\",\n \t\t\t\t\tpriv->mtr_color_reg);\n \t\t\t}\n@@ -2684,7 +2686,12 @@ struct mlx5_flow_id_pool *\n \t\terr = mlx5_alloc_shared_dr(priv);\n \t\tif (err)\n \t\t\tgoto error;\n-\t\tpriv->qrss_id_pool = mlx5_flow_id_pool_alloc(UINT32_MAX);\n+\t\t/*\n+\t\t * RSS id is shared with meter flow id. Meter flow id can only\n+\t\t * use the 24 MSB of the register.\n+\t\t */\n+\t\tpriv->qrss_id_pool = mlx5_flow_id_pool_alloc(UINT32_MAX >>\n+\t\t\t\t MLX5_MTR_COLOR_BITS);\n \t\tif (!priv->qrss_id_pool) {\n \t\t\tDRV_LOG(ERR, \"can't create flow id pool\");\n \t\t\terr = ENOMEM;\ndiff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex ac86c19..5818349 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -173,6 +173,8 @@ struct mlx5_devx_mkey_attr {\n struct mlx5_hca_qos_attr {\n \tuint32_t sup:1;\t/* Whether QOS is supported. */\n \tuint32_t srtcm_sup:1; /* Whether srTCM mode is supported. */\n+\tuint32_t flow_meter_reg_share:1;\n+\t/* Whether reg_c share is supported. */\n \tuint8_t log_max_flow_meter;\n \t/* Power of the maximum supported meters. */\n \tuint8_t flow_meter_reg_c_ids;\n@@ -732,6 +734,7 @@ struct mlx5_priv {\n \tunsigned int dr_shared:1; /* DV/DR data is shared. */\n \tunsigned int counter_fallback:1; /* Use counter fallback management. */\n \tunsigned int mtr_en:1; /* Whether support meter. */\n+\tunsigned int mtr_reg_share:1; /* Whether support meter REG_C share. */\n \tuint16_t domain_id; /* Switch domain identifier. */\n \tuint16_t vport_id; /* Associated VF vport index (if any). */\n \tuint32_t vport_meta_tag; /* Used for vport index match ove VF LAG. */\ndiff --git a/drivers/net/mlx5/mlx5_devx_cmds.c b/drivers/net/mlx5/mlx5_devx_cmds.c\nindex 9985d30..282d501 100644\n--- a/drivers/net/mlx5/mlx5_devx_cmds.c\n+++ b/drivers/net/mlx5/mlx5_devx_cmds.c\n@@ -362,6 +362,8 @@ struct mlx5_devx_obj *\n \t\t\t\tMLX5_GET(qos_cap, hcattr, log_max_flow_meter);\n \t\tattr->qos.flow_meter_reg_c_ids =\n \t\t\tMLX5_GET(qos_cap, hcattr, flow_meter_reg_id);\n+\t\tattr->qos.flow_meter_reg_share =\n+\t\t\tMLX5_GET(qos_cap, hcattr, flow_meter_reg_share);\n \t}\n \tif (!attr->eth_net_offloads)\n \t\treturn 0;\ndiff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c\nindex 970123b..3ca5ddb 100644\n--- a/drivers/net/mlx5/mlx5_flow.c\n+++ b/drivers/net/mlx5/mlx5_flow.c\n@@ -350,6 +350,7 @@ enum modify_reg\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n \tstruct mlx5_dev_config *config = &priv->config;\n \tenum modify_reg start_reg;\n+\tbool skip_mtr_reg = false;\n \n \tswitch (feature) {\n \tcase MLX5_HAIRPIN_RX:\n@@ -388,29 +389,36 @@ enum modify_reg\n \t\t\treturn REG_C_0;\n \t\t}\n \t\tbreak;\n-\tcase MLX5_COPY_MARK:\n \tcase MLX5_MTR_SFX:\n \t\t/*\n-\t\t * Metadata COPY_MARK register using is in meter suffix sub\n-\t\t * flow while with meter. It's safe to share the same register.\n+\t\t * If meter color and flow match share one register, flow match\n+\t\t * should use the meter color register for match.\n \t\t */\n-\t\treturn priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;\n+\t\tif (priv->mtr_reg_share)\n+\t\t\treturn priv->mtr_color_reg;\n+\t\telse\n+\t\t\treturn priv->mtr_color_reg != REG_C_2 ? REG_C_2 :\n+\t\t\t REG_C_3;\n \tcase MLX5_MTR_COLOR:\n \t\tRTE_ASSERT(priv->mtr_color_reg != REG_NONE);\n \t\treturn priv->mtr_color_reg;\n+\tcase MLX5_COPY_MARK:\n+\t\t/*\n+\t\t * Metadata COPY_MARK register using is in meter suffix sub\n+\t\t * flow while with meter. It's safe to share the same register.\n+\t\t */\n+\t\treturn priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;\n \tcase MLX5_APP_TAG:\n \t\t/*\n-\t\t * If meter is enable, it will engage two registers for color\n+\t\t * If meter is enable, it will engage the register for color\n \t\t * match and flow match. If meter color match is not using the\n \t\t * REG_C_2, need to skip the REG_C_x be used by meter color\n \t\t * match.\n \t\t * If meter is disable, free to use all available registers.\n \t\t */\n-\t\tif (priv->mtr_color_reg != REG_NONE)\n-\t\t\tstart_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_3 :\n-\t\t\t\t REG_C_4;\n-\t\telse\n-\t\t\tstart_reg = REG_C_2;\n+\t\tstart_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :\n+\t\t\t (priv->mtr_reg_share ? REG_C_3 : REG_C_4);\n+\t\tskip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);\n \t\tif (id > (REG_C_7 - start_reg))\n \t\t\treturn rte_flow_error_set(error, EINVAL,\n \t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\n@@ -425,12 +433,12 @@ enum modify_reg\n \t\t * If the available index REG_C_y >= REG_C_x, skip the\n \t\t * color register.\n \t\t */\n-\t\tif (start_reg == REG_C_3 && config->flow_mreg_c\n-\t\t [id + REG_C_3 - REG_C_0] >= priv->mtr_color_reg) {\n-\t\t\tif (config->flow_mreg_c[id + 1 + REG_C_3 - REG_C_0] !=\n-\t\t\t REG_NONE)\n+\t\tif (skip_mtr_reg && config->flow_mreg_c\n+\t\t [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {\n+\t\t\tif (config->flow_mreg_c\n+\t\t\t [id + 1 + start_reg - REG_C_0] != REG_NONE)\n \t\t\t\treturn config->flow_mreg_c\n-\t\t\t\t\t\t[id + 1 + REG_C_3 - REG_C_0];\n+\t\t\t\t\t [id + 1 + start_reg - REG_C_0];\n \t\t\treturn rte_flow_error_set(error, ENOTSUP,\n \t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\n \t\t\t\t\t\t NULL, \"unsupported tag id\");\n@@ -3556,7 +3564,7 @@ uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,\n \t * Get the id from the qrss_pool to make qrss share the id with meter.\n \t */\n \ttag_id = flow_qrss_get_id(dev);\n-\tset_tag->data = rte_cpu_to_be_32(tag_id);\n+\tset_tag->data = tag_id << MLX5_MTR_COLOR_BITS;\n \ttag_action->conf = set_tag;\n \treturn tag_id;\n }\n@@ -3994,13 +4002,14 @@ uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,\n \t\tactions_n = flow_check_meter_action(actions, &mtr);\n \tif (mtr) {\n \t\tstruct mlx5_rte_flow_item_tag *tag_spec;\n+\t\tstruct mlx5_rte_flow_item_tag *tag_mask;\n \t\t/* The five prefix actions: meter, decap, encap, tag, end. */\n \t\tact_size = sizeof(struct rte_flow_action) * (actions_n + 5) +\n \t\t\t sizeof(struct rte_flow_action_set_tag);\n \t\t/* tag, end. */\n #define METER_SUFFIX_ITEM 3\n \t\titem_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +\n-\t\t\t sizeof(struct mlx5_rte_flow_item_tag);\n+\t\t\t sizeof(struct mlx5_rte_flow_item_tag) * 2;\n \t\tsfx_actions = rte_zmalloc(__func__, (act_size + item_size), 0);\n \t\tif (!sfx_actions)\n \t\t\treturn rte_flow_error_set(error, ENOMEM,\n@@ -4027,13 +4036,15 @@ uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,\n \t\t\t act_size);\n \t\ttag_spec = (struct mlx5_rte_flow_item_tag *)(sfx_items +\n \t\t\t METER_SUFFIX_ITEM);\n-\t\ttag_spec->data = rte_cpu_to_be_32(dev_flow->mtr_flow_id);\n+\t\ttag_spec->data = dev_flow->mtr_flow_id << MLX5_MTR_COLOR_BITS;\n \t\ttag_spec->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0,\n \t\t\t\t\t\t error);\n+\t\ttag_mask = tag_spec + 1;\n+\t\ttag_mask->data = 0xffffff00;\n \t\tsfx_items->type = MLX5_RTE_FLOW_ITEM_TYPE_TAG;\n \t\tsfx_items->spec = tag_spec;\n \t\tsfx_items->last = NULL;\n-\t\tsfx_items->mask = NULL;\n+\t\tsfx_items->mask = tag_mask;\n \t\tsfx_items++;\n \t\tsfx_port_id_item = find_port_id_item(items);\n \t\tif (sfx_port_id_item) {\ndiff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c\nindex 5a1b426..64397c9 100644\n--- a/drivers/net/mlx5/mlx5_flow_dv.c\n+++ b/drivers/net/mlx5/mlx5_flow_dv.c\n@@ -8304,7 +8304,7 @@ struct field_modify_info modify_tcp[] = {\n \tdv_attr.match_criteria_enable =\n \t\t\t\t1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;\n \tflow_dv_match_meta_reg(mask.buf, value.buf, color_reg_c_idx,\n-\t\t\t rte_col_2_mlx5_col(RTE_COLORS), UINT32_MAX);\n+\t\t\t rte_col_2_mlx5_col(RTE_COLORS), UINT8_MAX);\n \tdtb->color_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,\n \t\t\t\t\t\t\t &dv_attr,\n \t\t\t\t\t\t\t dtb->tbl->obj);\n@@ -8498,7 +8498,7 @@ struct field_modify_info modify_tcp[] = {\n \t\tint j = 0;\n \n \t\tflow_dv_match_meta_reg(matcher.buf, value.buf, mtr_reg_c,\n-\t\t\t\t rte_col_2_mlx5_col(i), UINT32_MAX);\n+\t\t\t\t rte_col_2_mlx5_col(i), UINT8_MAX);\n \t\tif (mtb->count_actns[i])\n \t\t\tactions[j++] = mtb->count_actns[i];\n \t\tif (fm->params.action[i] == MTR_POLICER_ACTION_DROP)\ndiff --git a/drivers/net/mlx5/mlx5_prm.h b/drivers/net/mlx5/mlx5_prm.h\nindex 6ad214b..8a67025 100644\n--- a/drivers/net/mlx5/mlx5_prm.h\n+++ b/drivers/net/mlx5/mlx5_prm.h\n@@ -1200,7 +1200,9 @@ struct mlx5_ifc_qos_cap_bits {\n \tu8 reserved_at_8[0x8];\n \tu8 log_max_flow_meter[0x8];\n \tu8 flow_meter_reg_id[0x8];\n-\tu8 reserved_at_25[0x20];\n+\tu8 reserved_at_25[0x8];\n+\tu8 flow_meter_reg_share[0x1];\n+\tu8 reserved_at_2e[0x17];\n \tu8 packet_pacing_max_rate[0x20];\n \tu8 packet_pacing_min_rate[0x20];\n \tu8 reserved_at_80[0x10];\n@@ -1822,6 +1824,9 @@ enum {\n #define MLX5_SRTCM_CIR_MAX (8 * (1ULL << 30) * 0xFF)\n #define MLX5_SRTCM_EBS_MAX 0\n \n+/* The bits meter color use. */\n+#define MLX5_MTR_COLOR_BITS 8\n+\n /**\n * Convert a user mark to flow mark.\n *\n", "prefixes": [ "2/2" ] }