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GET /api/patches/66655/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 66655,
    "url": "http://patchwork.dpdk.org/api/patches/66655/?format=api",
    "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20200313180751.2068-1-arkadiuszx.kusztal@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patchwork.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20200313180751.2068-1-arkadiuszx.kusztal@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20200313180751.2068-1-arkadiuszx.kusztal@intel.com",
    "date": "2020-03-13T18:07:50",
    "name": "[1/2] crypto/qat: add aes-gcm J0 handling",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "471e04e8dc263c77b124fad1d5223a68986ccf54",
    "submitter": {
        "id": 452,
        "url": "http://patchwork.dpdk.org/api/people/452/?format=api",
        "name": "Arkadiusz Kusztal",
        "email": "arkadiuszx.kusztal@intel.com"
    },
    "delegate": {
        "id": 6690,
        "url": "http://patchwork.dpdk.org/api/users/6690/?format=api",
        "username": "akhil",
        "first_name": "akhil",
        "last_name": "goyal",
        "email": "gakhil@marvell.com"
    },
    "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20200313180751.2068-1-arkadiuszx.kusztal@intel.com/mbox/",
    "series": [
        {
            "id": 8908,
            "url": "http://patchwork.dpdk.org/api/series/8908/?format=api",
            "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=8908",
            "date": "2020-03-13T18:07:50",
            "name": "[1/2] crypto/qat: add aes-gcm J0 handling",
            "version": 1,
            "mbox": "http://patchwork.dpdk.org/series/8908/mbox/"
        }
    ],
    "comments": "http://patchwork.dpdk.org/api/patches/66655/comments/",
    "check": "success",
    "checks": "http://patchwork.dpdk.org/api/patches/66655/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 831BCA0576;\n\tFri, 13 Mar 2020 19:07:59 +0100 (CET)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id D864B2BE3;\n\tFri, 13 Mar 2020 19:07:58 +0100 (CET)",
            "from mga11.intel.com (mga11.intel.com [192.55.52.93])\n by dpdk.org (Postfix) with ESMTP id BFEEE1AFF\n for <dev@dpdk.org>; Fri, 13 Mar 2020 19:07:56 +0100 (CET)",
            "from fmsmga002.fm.intel.com ([10.253.24.26])\n by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n 13 Mar 2020 11:07:55 -0700",
            "from akusztax-mobl.ger.corp.intel.com ([10.104.121.22])\n by fmsmga002.fm.intel.com with ESMTP; 13 Mar 2020 11:07:53 -0700"
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.70,549,1574150400\"; d=\"scan'208\";a=\"278317292\"",
        "From": "Arek Kusztal <arkadiuszx.kusztal@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "akhil.goyal@nxp.com, fiona.trahe@intel.com,\n Arek Kusztal <arkadiuszx.kusztal@intel.com>",
        "Date": "Fri, 13 Mar 2020 19:07:50 +0100",
        "Message-Id": "<20200313180751.2068-1-arkadiuszx.kusztal@intel.com>",
        "X-Mailer": "git-send-email 2.19.1.windows.1",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Subject": "[dpdk-dev] [PATCH 1/2] crypto/qat: add aes-gcm J0 handling",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "This patch adds J0 capability to Intel QuickAssist Technology driver\n\nSigned-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>\n---\n drivers/crypto/qat/qat_sym_capabilities.h |  8 ++++----\n drivers/crypto/qat/qat_sym_session.c      | 11 ++++++++---\n drivers/crypto/qat/qat_sym_session.h      |  5 +++++\n 3 files changed, 17 insertions(+), 7 deletions(-)",
    "diff": "diff --git a/drivers/crypto/qat/qat_sym_capabilities.h b/drivers/crypto/qat/qat_sym_capabilities.h\nindex 028a56c..36be80a 100644\n--- a/drivers/crypto/qat/qat_sym_capabilities.h\n+++ b/drivers/crypto/qat/qat_sym_capabilities.h\n@@ -227,9 +227,9 @@\n \t\t\t\t\t.increment = 1\t\t\t\\\n \t\t\t\t},\t\t\t\t\t\\\n \t\t\t\t.iv_size = {\t\t\t\t\\\n-\t\t\t\t\t.min = 12,\t\t\t\\\n+\t\t\t\t\t.min = 0,\t\t\t\\\n \t\t\t\t\t.max = 12,\t\t\t\\\n-\t\t\t\t\t.increment = 0\t\t\t\\\n+\t\t\t\t\t.increment = 12\t\t\t\\\n \t\t\t\t},\t\t\t\t\t\\\n \t\t\t}, }\t\t\t\t\t\t\\\n \t\t}, }\t\t\t\t\t\t\t\\\n@@ -252,9 +252,9 @@\n \t\t\t\t\t.increment = 4\t\t\t\\\n \t\t\t\t},\t\t\t\t\t\\\n \t\t\t\t.iv_size = {\t\t\t\t\\\n-\t\t\t\t\t.min = 12,\t\t\t\\\n+\t\t\t\t\t.min = 0,\t\t\t\\\n \t\t\t\t\t.max = 12,\t\t\t\\\n-\t\t\t\t\t.increment = 0\t\t\t\\\n+\t\t\t\t\t.increment = 12\t\t\t\\\n \t\t\t\t}\t\t\t\t\t\\\n \t\t\t}, }\t\t\t\t\t\t\\\n \t\t}, }\t\t\t\t\t\t\t\\\ndiff --git a/drivers/crypto/qat/qat_sym_session.c b/drivers/crypto/qat/qat_sym_session.c\nindex 4359f2f..b7ca846 100644\n--- a/drivers/crypto/qat/qat_sym_session.c\n+++ b/drivers/crypto/qat/qat_sym_session.c\n@@ -653,6 +653,9 @@ qat_sym_session_configure_auth(struct rte_cryptodev *dev,\n \tuint8_t key_length = auth_xform->key.length;\n \tsession->aes_cmac = 0;\n \n+\tsession->auth_iv.offset = auth_xform->iv.offset;\n+\tsession->auth_iv.length = auth_xform->iv.length;\n+\n \tswitch (auth_xform->algo) {\n \tcase RTE_CRYPTO_AUTH_SHA1_HMAC:\n \t\tsession->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA1;\n@@ -684,6 +687,8 @@ qat_sym_session_configure_auth(struct rte_cryptodev *dev,\n \t\t}\n \t\tsession->qat_mode = ICP_QAT_HW_CIPHER_CTR_MODE;\n \t\tsession->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_GALOIS_128;\n+\t\tif (session->auth_iv.length == 0)\n+\t\t\tsession->auth_iv.length = AES_GCM_J0_LEN;\n \n \t\tbreak;\n \tcase RTE_CRYPTO_AUTH_SNOW3G_UIA2:\n@@ -723,9 +728,6 @@ qat_sym_session_configure_auth(struct rte_cryptodev *dev,\n \t\treturn -EINVAL;\n \t}\n \n-\tsession->auth_iv.offset = auth_xform->iv.offset;\n-\tsession->auth_iv.length = auth_xform->iv.length;\n-\n \tif (auth_xform->algo == RTE_CRYPTO_AUTH_AES_GMAC) {\n \t\tif (auth_xform->op == RTE_CRYPTO_AUTH_OP_GENERATE) {\n \t\t\tsession->qat_cmd = ICP_QAT_FW_LA_CMD_CIPHER_HASH;\n@@ -808,6 +810,9 @@ qat_sym_session_configure_aead(struct rte_cryptodev *dev,\n \t\t}\n \t\tsession->qat_mode = ICP_QAT_HW_CIPHER_CTR_MODE;\n \t\tsession->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_GALOIS_128;\n+\t\tif (session->cipher_iv.length == 0)\n+\t\t\tsession->cipher_iv.length = AES_GCM_J0_LEN;\n+\n \t\tbreak;\n \tcase RTE_CRYPTO_AEAD_AES_CCM:\n \t\tif (qat_sym_validate_aes_key(aead_xform->key.length,\ndiff --git a/drivers/crypto/qat/qat_sym_session.h b/drivers/crypto/qat/qat_sym_session.h\nindex 98985d6..5a01c81 100644\n--- a/drivers/crypto/qat/qat_sym_session.h\n+++ b/drivers/crypto/qat/qat_sym_session.h\n@@ -20,6 +20,11 @@\n \n #define KASUMI_F8_KEY_MODIFIER_4_BYTES   0x55555555\n \n+/*\n+ * AES-GCM J0 length\n+ */\n+#define AES_GCM_J0_LEN 16\n+\n /* 3DES key sizes */\n #define QAT_3DES_KEY_SZ_OPT1 24 /* Keys are independent */\n #define QAT_3DES_KEY_SZ_OPT2 16 /* K3=K1 */\n",
    "prefixes": [
        "1/2"
    ]
}