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GET /api/patches/68480/?format=api
{ "id": 68480, "url": "http://patchwork.dpdk.org/api/patches/68480/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/1586932797-99533-11-git-send-email-suanmingm@mellanox.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1586932797-99533-11-git-send-email-suanmingm@mellanox.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1586932797-99533-11-git-send-email-suanmingm@mellanox.com", "date": "2020-04-15T06:39:57", "name": "[10/10] net/mlx5: reorganize rte flow structure", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "8b760efec37ab102cf49ca71e81ed79ccc3c1a4a", "submitter": { "id": 1358, "url": "http://patchwork.dpdk.org/api/people/1358/?format=api", "name": "Suanming Mou", "email": "suanmingm@mellanox.com" }, "delegate": { "id": 3268, "url": "http://patchwork.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/1586932797-99533-11-git-send-email-suanmingm@mellanox.com/mbox/", "series": [ { "id": 9383, "url": "http://patchwork.dpdk.org/api/series/9383/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=9383", "date": "2020-04-15T06:39:47", "name": "net/mlx5: optimize flow structure", "version": 1, "mbox": "http://patchwork.dpdk.org/series/9383/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/68480/comments/", "check": "fail", "checks": "http://patchwork.dpdk.org/api/patches/68480/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 2EBC1A0577;\n\tWed, 15 Apr 2020 08:41:50 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 130B01D515;\n\tWed, 15 Apr 2020 08:40:26 +0200 (CEST)", "from git-send-mailer.rdmz.labs.mlnx (unknown [37.142.13.130])\n by dpdk.org (Postfix) with ESMTP id 724D61D451\n for <dev@dpdk.org>; Wed, 15 Apr 2020 08:40:23 +0200 (CEST)" ], "From": "Suanming Mou <suanmingm@mellanox.com>", "To": "Matan Azrad <matan@mellanox.com>, Shahaf Shuler <shahafs@mellanox.com>,\n Viacheslav Ovsiienko <viacheslavo@mellanox.com>", "Cc": "wentaoc@mellanox.com,\n\trasland@mellanox.com,\n\tdev@dpdk.org", "Date": "Wed, 15 Apr 2020 14:39:57 +0800", "Message-Id": "<1586932797-99533-11-git-send-email-suanmingm@mellanox.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1586932797-99533-1-git-send-email-suanmingm@mellanox.com>", "References": "<1586932797-99533-1-git-send-email-suanmingm@mellanox.com>", "Subject": "[dpdk-dev] [PATCH 10/10] net/mlx5: reorganize rte flow structure", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Currently, the rte flow structure is not fully aligned and has some\nbits wasted. The members can be optimized and reorganized to save\nmemory.\n\n1. The drv_type uses only limited bits, change the type to 2 bits what\nit needs.\n\n2. Align the hairpin_flow_id, drv_type, fdir, copy_applied to 32 bits.\nAs hairpin never uses the full 32 bits.\n\n3. The RSS queue number type is 16 bits, combine it with the 16 bits\nmeter id has a better organize for the struct.\n\n4. __rte_packed helps tight up the structure memory layout.\n\nThe optimization totally helps save 20 bytes for the structure.\n\nSigned-off-by: Suanming Mou <suanmingm@mellanox.com>\n---\n drivers/net/mlx5/mlx5.c | 3 ++-\n drivers/net/mlx5/mlx5_flow.h | 19 +++++++++++--------\n 2 files changed, 13 insertions(+), 9 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c\nindex 767fd9c..8f4843e 100644\n--- a/drivers/net/mlx5/mlx5.c\n+++ b/drivers/net/mlx5/mlx5.c\n@@ -764,7 +764,8 @@ struct mlx5_flow_id_pool *\n \t\t\tgoto error;\n \t\t}\n \t}\n-\tsh->flow_id_pool = mlx5_flow_id_pool_alloc(UINT32_MAX);\n+\tsh->flow_id_pool = mlx5_flow_id_pool_alloc\n+\t\t\t\t\t((1 << HAIRPIN_FLOW_ID_BITS) - 1);\n \tif (!sh->flow_id_pool) {\n \t\tDRV_LOG(ERR, \"can't create flow id pool\");\n \t\terr = ENOMEM;\ndiff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h\nindex 911007b..0d32896 100644\n--- a/drivers/net/mlx5/mlx5_flow.h\n+++ b/drivers/net/mlx5/mlx5_flow.h\n@@ -760,22 +760,25 @@ struct mlx5_fdir_flow {\n \tstruct rte_flow *flow; /* Pointer to flow. */\n };\n \n+#define HAIRPIN_FLOW_ID_BITS 28\n+\n /* Flow structure. */\n struct rte_flow {\n \tTAILQ_ENTRY(rte_flow) next; /**< Pointer to the next flow structure. */\n-\tenum mlx5_flow_drv_type drv_type; /**< Driver type. */\n-\tstruct mlx5_flow_rss_queue rss; /**< RSS queue context. */\n-\tuint32_t counter; /**< Holds flow counter. */\n-\tuint32_t mreg_copy;\n-\t/**< Index to metadata register copy table resource. */\n-\tuint16_t meter; /**< Holds flow meter id. */\n \tuint32_t dev_handles;\n \t/**< Device flow handles that are part of the flow. */\n+\tuint32_t drv_type:2; /**< Driver type. */\n \tuint32_t fdir:1; /**< Identifier of associated FDIR if any. */\n-\tuint32_t hairpin_flow_id; /**< The flow id used for hairpin. */\n+\tuint32_t hairpin_flow_id:HAIRPIN_FLOW_ID_BITS;\n+\t/**< The flow id used for hairpin. */\n \tuint32_t copy_applied:1; /**< The MARK copy Flow os applied. */\n+\tuint32_t mreg_copy;\n+\t/**< Index to metadata register copy table resource. */\n+\tuint32_t counter; /**< Holds flow counter. */\n+\tuint16_t meter; /**< Holds flow meter id. */\n+\tstruct mlx5_flow_rss_queue rss; /**< RSS queue context. */\n \tuint32_t idx; /**< Index to the rte flow allocated from indexed pool. */\n-};\n+} __rte_packed;\n \n typedef int (*mlx5_flow_validate_t)(struct rte_eth_dev *dev,\n \t\t\t\t const struct rte_flow_attr *attr,\n", "prefixes": [ "10/10" ] }