Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/689/?format=api
{ "id": 689, "url": "http://patchwork.dpdk.org/api/patches/689/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/1412156945-6549-3-git-send-email-pablo.de.lara.guarch@intel.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1412156945-6549-3-git-send-email-pablo.de.lara.guarch@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1412156945-6549-3-git-send-email-pablo.de.lara.guarch@intel.com", "date": "2014-10-01T09:49:04", "name": "[dpdk-dev,v3,2/3] pmd: Modified dev_info structure to include default RX/TX configuration", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "4b322a71d1af3fd8ec91a51bcc5fec73d4d2ba97", "submitter": { "id": 9, "url": "http://patchwork.dpdk.org/api/people/9/?format=api", "name": "De Lara Guarch, Pablo", "email": "pablo.de.lara.guarch@intel.com" }, "delegate": null, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/1412156945-6549-3-git-send-email-pablo.de.lara.guarch@intel.com/mbox/", "series": [], "comments": "http://patchwork.dpdk.org/api/patches/689/comments/", "check": "pending", "checks": "http://patchwork.dpdk.org/api/patches/689/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 4FB037E27;\n\tWed, 1 Oct 2014 11:42:40 +0200 (CEST)", "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n\tby dpdk.org (Postfix) with ESMTP id C5A5C6A94\n\tfor <dev@dpdk.org>; Wed, 1 Oct 2014 11:42:36 +0200 (CEST)", "from orsmga001.jf.intel.com ([10.7.209.18])\n\tby orsmga102.jf.intel.com with ESMTP; 01 Oct 2014 02:43:02 -0700", "from irvmail001.ir.intel.com ([163.33.26.43])\n\tby orsmga001.jf.intel.com with ESMTP; 01 Oct 2014 02:49:18 -0700", "from sivswdev02.ir.intel.com (sivswdev02.ir.intel.com\n\t[10.237.217.46])\n\tby irvmail001.ir.intel.com (8.14.3/8.13.6/MailSET/Hub) with ESMTP id\n\ts919nIlW021815; Wed, 1 Oct 2014 10:49:18 +0100", "from sivswdev02.ir.intel.com (localhost [127.0.0.1])\n\tby sivswdev02.ir.intel.com with ESMTP id s919nHnU006695;\n\tWed, 1 Oct 2014 10:49:17 +0100", "(from pdelarax@localhost)\n\tby sivswdev02.ir.intel.com with id s919nHkB006691;\n\tWed, 1 Oct 2014 10:49:17 +0100" ], "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.04,631,1406617200\"; d=\"scan'208\";a=\"581773609\"", "From": "Pablo de Lara <pablo.de.lara.guarch@intel.com>", "To": "dev@dpdk.org", "Date": "Wed, 1 Oct 2014 10:49:04 +0100", "Message-Id": "<1412156945-6549-3-git-send-email-pablo.de.lara.guarch@intel.com>", "X-Mailer": "git-send-email 1.7.4.1", "In-Reply-To": "<1412156945-6549-1-git-send-email-pablo.de.lara.guarch@intel.com>", "References": "<1412150458-26213-1-git-send-email-pablo.de.lara.guarch@intel.com>\n\t<1412156945-6549-1-git-send-email-pablo.de.lara.guarch@intel.com>", "Subject": "[dpdk-dev] [PATCH v3 2/3] pmd: Modified dev_info structure to\n\tinclude default RX/TX configuration", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Many sample apps use duplicated code to set rte_eth_txconf and rte_eth_rxconf\nstructures. This patch allows the user to get a default optimal RX/TX configuration\nthrough rte_eth_dev_info get, and still any parameters may be tweaked as wished,\nbefore setting up queues.\n\nBesides, if a NULL pointer is passed to rte_eth_rx_queue_setup or\nrte_eth_tx_queue_setup, these functions get internally the default RX/TX\nconfiguration for the user.\n\nSigned-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>\n---\n lib/librte_ether/rte_ethdev.c | 11 ++++++++++\n lib/librte_ether/rte_ethdev.h | 6 +++++\n lib/librte_pmd_e1000/igb_ethdev.c | 32 ++++++++++++++++++++++++++++++-\n lib/librte_pmd_i40e/i40e_ethdev.c | 33 ++++++++++++++++++++++++++++++++\n lib/librte_pmd_ixgbe/ixgbe_ethdev.c | 36 +++++++++++++++++++++++++++++++++++\n 5 files changed, 117 insertions(+), 1 deletions(-)", "diff": "diff --git a/lib/librte_ether/rte_ethdev.c b/lib/librte_ether/rte_ethdev.c\nindex 3c09a23..ad4b973 100644\n--- a/lib/librte_ether/rte_ethdev.c\n+++ b/lib/librte_ether/rte_ethdev.c\n@@ -980,6 +980,9 @@ rte_eth_rx_queue_setup(uint8_t port_id, uint16_t rx_queue_id,\n \t\treturn (-EINVAL);\n \t}\n \n+\tif (rx_conf == NULL)\n+\t\trx_conf = &dev_info.default_rxconf;\n+\n \tret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,\n \t\t\t\t\t socket_id, rx_conf, mp);\n \tif (!ret) {\n@@ -997,6 +1000,7 @@ rte_eth_tx_queue_setup(uint8_t port_id, uint16_t tx_queue_id,\n \t\t const struct rte_eth_txconf *tx_conf)\n {\n \tstruct rte_eth_dev *dev;\n+\tstruct rte_eth_dev_info dev_info;\n \n \t/* This function is only safe when called from the primary process\n \t * in a multi-process setup*/\n@@ -1018,7 +1022,14 @@ rte_eth_tx_queue_setup(uint8_t port_id, uint16_t tx_queue_id,\n \t\treturn -EBUSY;\n \t}\n \n+\tFUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);\n \tFUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);\n+\n+\t(*dev->dev_ops->dev_infos_get)(dev, &dev_info);\n+\n+\tif (tx_conf == NULL)\n+\t\ttx_conf = &dev_info.default_txconf;\n+\n \treturn (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,\n \t\t\t\t\t socket_id, tx_conf);\n }\ndiff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h\nindex 50df654..1dff97e 100644\n--- a/lib/librte_ether/rte_ethdev.h\n+++ b/lib/librte_ether/rte_ethdev.h\n@@ -906,6 +906,8 @@ struct rte_eth_dev_info {\n \tuint16_t max_vmdq_pools; /**< Maximum number of VMDq pools. */\n \tuint32_t rx_offload_capa; /**< Device RX offload capabilities. */\n \tuint32_t tx_offload_capa; /**< Device TX offload capabilities. */\n+\tstruct rte_eth_rxconf default_rxconf; /**< Default RX configuration */\n+\tstruct rte_eth_txconf default_txconf; /**< Default TX configuration */\n };\n \n struct rte_eth_dev;\n@@ -1693,6 +1695,8 @@ extern int rte_eth_dev_configure(uint8_t port_id,\n * the DMA memory allocated for the receive descriptors of the ring.\n * @param rx_conf\n * The pointer to the configuration data to be used for the receive queue.\n+ * NULL value is allowed, in which case default RX configuration\n+ * will be used.\n * The *rx_conf* structure contains an *rx_thresh* structure with the values\n * of the Prefetch, Host, and Write-Back threshold registers of the receive\n * ring.\n@@ -1730,6 +1734,8 @@ extern int rte_eth_rx_queue_setup(uint8_t port_id, uint16_t rx_queue_id,\n * the DMA memory allocated for the transmit descriptors of the ring.\n * @param tx_conf\n * The pointer to the configuration data to be used for the transmit queue.\n+ * NULL value is allowed, in which case default RX configuration\n+ * will be used.\n * The *tx_conf* structure contains the following data:\n * - The *tx_thresh* structure with the values of the Prefetch, Host, and\n * Write-Back threshold registers of the transmit ring.\ndiff --git a/lib/librte_pmd_e1000/igb_ethdev.c b/lib/librte_pmd_e1000/igb_ethdev.c\nindex 3187d92..4bf75f5 100644\n--- a/lib/librte_pmd_e1000/igb_ethdev.c\n+++ b/lib/librte_pmd_e1000/igb_ethdev.c\n@@ -57,6 +57,18 @@\n #include \"e1000/e1000_api.h\"\n #include \"e1000_ethdev.h\"\n \n+/**\n+ * Default values for port configuration\n+ */\n+#define IGB_DEFAULT_RX_FREE_THRESH 32\n+#define IGB_DEFAULT_RX_PTHRESH 8\n+#define IGB_DEFAULT_RX_HTHRESH 8\n+#define IGB_DEFAULT_RX_WTHRESH 0\n+\n+#define IGB_DEFAULT_TX_PTHRESH 32\n+#define IGB_DEFAULT_TX_HTHRESH 0\n+#define IGB_DEFAULT_TX_WTHRESH 0\n+\n static int eth_igb_configure(struct rte_eth_dev *dev);\n static int eth_igb_start(struct rte_eth_dev *dev);\n static void eth_igb_stop(struct rte_eth_dev *dev);\n@@ -165,7 +177,6 @@ static int eth_igb_remove_5tuple_filter(struct rte_eth_dev *dev,\n static int eth_igb_get_5tuple_filter(struct rte_eth_dev *dev,\n \t\t\tuint16_t index,\n \t\t\tstruct rte_5tuple_filter *filter, uint16_t *rx_queue);\n-\n /*\n * Define VF Stats MACRO for Non \"cleared on read\" register\n */\n@@ -1331,6 +1342,25 @@ eth_igb_infos_get(struct rte_eth_dev *dev,\n \t\tdev_info->max_tx_queues = 0;\n \t\tdev_info->max_vmdq_pools = 0;\n \t}\n+\n+\tdev_info->default_rxconf = (struct rte_eth_rxconf) {\n+\t\t.rx_thresh = {\n+\t\t\t.pthresh = IGB_DEFAULT_RX_PTHRESH,\n+\t\t\t.hthresh = IGB_DEFAULT_RX_HTHRESH,\n+\t\t\t.wthresh = IGB_DEFAULT_RX_WTHRESH,\n+\t\t},\n+\t\t.rx_free_thresh = IGB_DEFAULT_RX_FREE_THRESH,\n+\t\t.rx_drop_en = 0,\n+\t};\n+\n+\tdev_info->default_txconf = (struct rte_eth_txconf) {\n+\t\t.tx_thresh = {\n+\t\t\t.pthresh = IGB_DEFAULT_TX_PTHRESH,\n+\t\t\t.hthresh = IGB_DEFAULT_TX_HTHRESH,\n+\t\t\t.wthresh = IGB_DEFAULT_TX_WTHRESH,\n+\t\t},\n+\t\t.txq_flags = 0,\n+\t};\n }\n \n /* return 0 means link status changed, -1 means not changed */\ndiff --git a/lib/librte_pmd_i40e/i40e_ethdev.c b/lib/librte_pmd_i40e/i40e_ethdev.c\nindex 9ed31b5..72faf95 100644\n--- a/lib/librte_pmd_i40e/i40e_ethdev.c\n+++ b/lib/librte_pmd_i40e/i40e_ethdev.c\n@@ -58,6 +58,17 @@\n #include \"i40e_rxtx.h\"\n #include \"i40e_pf.h\"\n \n+#define I40E_DEFAULT_RX_FREE_THRESH 32\n+#define I40E_DEFAULT_RX_PTHRESH 8\n+#define I40E_DEFAULT_RX_HTHRESH 8\n+#define I40E_DEFAULT_RX_WTHRESH 0\n+\n+#define I40E_DEFAULT_TX_FREE_THRESH 32\n+#define I40E_DEFAULT_TX_PTHRESH 32\n+#define I40E_DEFAULT_TX_HTHRESH 0\n+#define I40E_DEFAULT_TX_WTHRESH 0\n+#define I40E_DEFAULT_TX_RSBIT_THRESH 32\n+\n /* Maximun number of MAC addresses */\n #define I40E_NUM_MACADDR_MAX 64\n #define I40E_CLEAR_PXE_WAIT_MS 200\n@@ -1231,6 +1242,28 @@ i40e_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)\n \t\tDEV_TX_OFFLOAD_UDP_CKSUM |\n \t\tDEV_TX_OFFLOAD_TCP_CKSUM |\n \t\tDEV_TX_OFFLOAD_SCTP_CKSUM;\n+\n+\tdev_info->default_rxconf = (struct rte_eth_rxconf) {\n+\t\t.rx_thresh = {\n+\t\t\t.pthresh = I40E_DEFAULT_RX_PTHRESH,\n+\t\t\t.hthresh = I40E_DEFAULT_RX_HTHRESH,\n+\t\t\t.wthresh = I40E_DEFAULT_RX_WTHRESH,\n+\t\t},\n+\t\t.rx_free_thresh = I40E_DEFAULT_RX_FREE_THRESH,\n+\t\t.rx_drop_en = 0,\n+\t};\n+\n+\tdev_info->default_txconf = (struct rte_eth_txconf) {\n+\t\t.tx_thresh = {\n+\t\t\t.pthresh = I40E_DEFAULT_TX_PTHRESH,\n+\t\t\t.hthresh = I40E_DEFAULT_TX_HTHRESH,\n+\t\t\t.wthresh = I40E_DEFAULT_TX_WTHRESH,\n+\t\t},\n+\t\t.tx_free_thresh = I40E_DEFAULT_TX_FREE_THRESH,\n+\t\t.tx_rs_thresh = I40E_DEFAULT_TX_RSBIT_THRESH,\n+\t\t.txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS | ETH_TXQ_FLAGS_NOOFFLOADS,\n+\t};\n+\n }\n \n static int\ndiff --git a/lib/librte_pmd_ixgbe/ixgbe_ethdev.c b/lib/librte_pmd_ixgbe/ixgbe_ethdev.c\nindex 59122a1..3b1c156 100644\n--- a/lib/librte_pmd_ixgbe/ixgbe_ethdev.c\n+++ b/lib/librte_pmd_ixgbe/ixgbe_ethdev.c\n@@ -92,6 +92,20 @@\n #define IXGBE_MMW_SIZE_DEFAULT 0x4\n #define IXGBE_MMW_SIZE_JUMBO_FRAME 0x14\n \n+/**\n+ * Default values for RX/TX configuration\n+ */\n+#define IXGBE_DEFAULT_RX_FREE_THRESH 32\n+#define IXGBE_DEFAULT_RX_PTHRESH 8\n+#define IXGBE_DEFAULT_RX_HTHRESH 8\n+#define IXGBE_DEFAULT_RX_WTHRESH 0\n+\n+#define IXGBE_DEFAULT_TX_FREE_THRESH 32\n+#define IXGBE_DEFAULT_TX_PTHRESH 32\n+#define IXGBE_DEFAULT_TX_HTHRESH 0\n+#define IXGBE_DEFAULT_TX_WTHRESH 0\n+#define IXGBE_DEFAULT_TX_RSBIT_THRESH 32\n+\n #define IXGBEVF_PMD_NAME \"rte_ixgbevf_pmd\" /* PMD name */\n \n #define IXGBE_QUEUE_STAT_COUNTERS (sizeof(hw_stats->qprc) / sizeof(hw_stats->qprc[0]))\n@@ -1948,6 +1962,28 @@ ixgbe_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)\n \t\tDEV_TX_OFFLOAD_UDP_CKSUM |\n \t\tDEV_TX_OFFLOAD_TCP_CKSUM |\n \t\tDEV_TX_OFFLOAD_SCTP_CKSUM;\n+\n+\tdev_info->default_rxconf = (struct rte_eth_rxconf) {\n+\t\t\t.rx_thresh = {\n+\t\t\t\t.pthresh = IXGBE_DEFAULT_RX_PTHRESH,\n+\t\t\t\t.hthresh = IXGBE_DEFAULT_RX_HTHRESH,\n+\t\t\t\t.wthresh = IXGBE_DEFAULT_RX_WTHRESH,\n+\t\t\t},\n+\t\t\t.rx_free_thresh = IXGBE_DEFAULT_RX_FREE_THRESH,\n+\t\t\t.rx_drop_en = 0,\n+\t};\n+\n+\n+\t dev_info->default_txconf = (struct rte_eth_txconf) {\n+\t\t\t.tx_thresh = {\n+\t\t\t\t.pthresh = IXGBE_DEFAULT_TX_PTHRESH,\n+\t\t\t\t.hthresh = IXGBE_DEFAULT_TX_HTHRESH,\n+\t\t\t\t.wthresh = IXGBE_DEFAULT_TX_WTHRESH,\n+\t\t\t},\n+\t\t\t.tx_free_thresh = IXGBE_DEFAULT_TX_FREE_THRESH,\n+\t\t\t.tx_rs_thresh = IXGBE_DEFAULT_TX_RSBIT_THRESH,\n+\t\t\t.txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS | ETH_TXQ_FLAGS_NOOFFLOADS,\n+\t};\n }\n \n /* return 0 means link status changed, -1 means not changed */\n", "prefixes": [ "dpdk-dev", "v3", "2/3" ] }