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GET /api/patches/69219/?format=api
{ "id": 69219, "url": "http://patchwork.dpdk.org/api/patches/69219/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20200424032159.992-2-joyce.kong@arm.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200424032159.992-2-joyce.kong@arm.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200424032159.992-2-joyce.kong@arm.com", "date": "2020-04-24T03:21:54", "name": "[v9,1/6] lib/eal: implement the family of common bit operation APIs", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "e3b7084bd3034795a46ce987dfb8d1facb1c3de7", "submitter": { "id": 970, "url": "http://patchwork.dpdk.org/api/people/970/?format=api", "name": "Joyce Kong", "email": "joyce.kong@arm.com" }, "delegate": { "id": 24651, "url": "http://patchwork.dpdk.org/api/users/24651/?format=api", "username": "dmarchand", "first_name": "David", "last_name": "Marchand", "email": "david.marchand@redhat.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20200424032159.992-2-joyce.kong@arm.com/mbox/", "series": [ { "id": 9606, "url": "http://patchwork.dpdk.org/api/series/9606/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=9606", "date": "2020-04-24T03:21:53", "name": "implement common bit operation APIs", "version": 9, "mbox": "http://patchwork.dpdk.org/series/9606/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/69219/comments/", "check": "fail", "checks": "http://patchwork.dpdk.org/api/patches/69219/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id BC01DA00C4;\n\tFri, 24 Apr 2020 05:22:41 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 998FB1C06C;\n\tFri, 24 Apr 2020 05:22:41 +0200 (CEST)", "from foss.arm.com (foss.arm.com [217.140.110.172])\n by dpdk.org (Postfix) with ESMTP id 6E8501BFE2\n for <dev@dpdk.org>; Fri, 24 Apr 2020 05:22:40 +0200 (CEST)", "from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14])\n by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E88D431B;\n Thu, 23 Apr 2020 20:22:39 -0700 (PDT)", "from net-arm-thunderx2-03.shanghai.arm.com\n (net-arm-thunderx2-03.shanghai.arm.com [10.169.41.185])\n by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id AAADA3F68F;\n Thu, 23 Apr 2020 20:22:34 -0700 (PDT)" ], "From": "Joyce Kong <joyce.kong@arm.com>", "To": "thomas@monjalon.net, stephen@networkplumber.org,\n david.marchand@redhat.com,\n mb@smartsharesystems.com, jerinj@marvell.com, bruce.richardson@intel.com,\n ravi1.kumar@amd.com, rmody@marvell.com, shshaikh@marvell.com,\n xuanziyang2@huawei.com, cloud.wangxiaoyun@huawei.com,\n zhouguoyang@huawei.com, honnappa.nagarahalli@arm.com, gavin.hu@arm.com,\n phil.yang@arm.com", "Cc": "nd@arm.com,\n\tdev@dpdk.org", "Date": "Fri, 24 Apr 2020 11:21:54 +0800", "Message-Id": "<20200424032159.992-2-joyce.kong@arm.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": [ "<20200424032159.992-1-joyce.kong@arm.com>", "<1571125801-45773-1-git-send-email-joyce.kong@arm.com>" ], "References": [ "<20200424032159.992-1-joyce.kong@arm.com>", "<1571125801-45773-1-git-send-email-joyce.kong@arm.com>" ], "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v9 1/6] lib/eal: implement the family of common\n\tbit operation APIs", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Bitwise operation APIs are defined and used in a lot of PMDs,\nwhich caused a huge code duplication. To reduce duplication,\nthis patch consolidates them into a common API family.\n\nSigned-off-by: Joyce Kong <joyce.kong@arm.com>\nReviewed-by: Gavin Hu <gavin.hu@arm.com>\nReviewed-by: Phil Yang <phil.yang@arm.com>\nAcked-by: Morten Brørup <mb@smartsharesystems.com>\n---\n MAINTAINERS | 4 +\n doc/api/doxy-api-index.md | 7 +-\n lib/librte_eal/include/meson.build | 1 +\n lib/librte_eal/include/rte_bitops.h | 258 ++++++++++++++++++++++++++++\n 4 files changed, 267 insertions(+), 3 deletions(-)\n create mode 100644 lib/librte_eal/include/rte_bitops.h", "diff": "diff --git a/MAINTAINERS b/MAINTAINERS\nindex 1bf00d7e5..c5c255994 100644\n--- a/MAINTAINERS\n+++ b/MAINTAINERS\n@@ -241,6 +241,10 @@ M: Cristian Dumitrescu <cristian.dumitrescu@intel.com>\n F: lib/librte_eal/include/rte_bitmap.h\n F: app/test/test_bitmap.c\n \n+Bitops\n+M: Joyce Kong <joyce.kong@arm.com>\n+F: lib/librte_eal/include/rte_bitops.h\n+\n MCSlock - EXPERIMENTAL\n M: Phil Yang <phil.yang@arm.com>\n F: lib/librte_eal/include/generic/rte_mcslock.h\ndiff --git a/doc/api/doxy-api-index.md b/doc/api/doxy-api-index.md\nindex dff496be0..52e2be31d 100644\n--- a/doc/api/doxy-api-index.md\n+++ b/doc/api/doxy-api-index.md\n@@ -133,12 +133,12 @@ The public API headers are grouped by topics:\n [BPF] (@ref rte_bpf.h)\n \n - **containers**:\n+ [bitmap] (@ref rte_bitmap.h),\n [mbuf] (@ref rte_mbuf.h),\n [mbuf pool ops] (@ref rte_mbuf_pool_ops.h),\n [ring] (@ref rte_ring.h),\n [stack] (@ref rte_stack.h),\n- [tailq] (@ref rte_tailq.h),\n- [bitmap] (@ref rte_bitmap.h)\n+ [tailq] (@ref rte_tailq.h)\n \n - **packet framework**:\n * [port] (@ref rte_port.h):\n@@ -165,7 +165,8 @@ The public API headers are grouped by topics:\n [random] (@ref rte_random.h),\n [config file] (@ref rte_cfgfile.h),\n [key/value args] (@ref rte_kvargs.h),\n- [string] (@ref rte_string_fns.h)\n+ [string] (@ref rte_string_fns.h),\n+ [bitops] (@ref rte_bitops.h)\n \n - **debug**:\n [jobstats] (@ref rte_jobstats.h),\ndiff --git a/lib/librte_eal/include/meson.build b/lib/librte_eal/include/meson.build\nindex 6fd427494..3afb50a5b 100644\n--- a/lib/librte_eal/include/meson.build\n+++ b/lib/librte_eal/include/meson.build\n@@ -6,6 +6,7 @@ includes += include_directories('.')\n headers += files(\n \t'rte_alarm.h',\n \t'rte_bitmap.h',\n+\t'rte_bitops.h',\n \t'rte_branch_prediction.h',\n \t'rte_bus.h',\n \t'rte_class.h',\ndiff --git a/lib/librte_eal/include/rte_bitops.h b/lib/librte_eal/include/rte_bitops.h\nnew file mode 100644\nindex 000000000..4374f28e7\n--- /dev/null\n+++ b/lib/librte_eal/include/rte_bitops.h\n@@ -0,0 +1,258 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2020 Arm Limited\n+ */\n+\n+#ifndef _RTE_BITOPS_H_\n+#define _RTE_BITOPS_H_\n+\n+/**\n+ * @file\n+ * Bit Operations\n+ *\n+ * This file defines a family of APIs for bit operations\n+ * without enforcing memory ordering.\n+ */\n+\n+#include <stdint.h>\n+#include <rte_debug.h>\n+#include <rte_compat.h>\n+\n+/*---------------------------- 32 bit operations ----------------------------*/\n+\n+/**\n+ * @warning\n+ * @b EXPERIMENTAL: this API may change, or be removed, without prior notice\n+ *\n+ * Get the target bit from a 32-bit value without memory ordering.\n+ *\n+ * @param nr\n+ * The target bit to get.\n+ * @param addr\n+ * The address holding the bit.\n+ * @return\n+ * The target bit.\n+ */\n+__rte_experimental\n+static inline uint32_t\n+rte_get_bit32_relaxed(unsigned int nr, volatile uint32_t *addr)\n+{\n+\tRTE_ASSERT(nr < 32);\n+\n+\tuint32_t mask = UINT32_C(1) << nr;\n+\treturn (*addr) & mask;\n+}\n+\n+/**\n+ * @warning\n+ * @b EXPERIMENTAL: this API may change, or be removed, without prior notice\n+ *\n+ * Set the target bit in a 32-bit value to 1 without memory ordering.\n+ *\n+ * @param nr\n+ * The target bit to set.\n+ * @param addr\n+ * The address holding the bit.\n+ */\n+__rte_experimental\n+static inline void\n+rte_set_bit32_relaxed(unsigned int nr, volatile uint32_t *addr)\n+{\n+\tRTE_ASSERT(nr < 32);\n+\n+\tuint32_t mask = UINT32_C(1) << nr;\n+\t*addr = (*addr) | mask;\n+}\n+\n+/**\n+ * @warning\n+ * @b EXPERIMENTAL: this API may change, or be removed, without prior notice\n+ *\n+ * Clear the target bit in a 32-bit value to 0 without memory ordering.\n+ *\n+ * @param nr\n+ * The target bit to clear.\n+ * @param addr\n+ * The address holding the bit.\n+ */\n+__rte_experimental\n+static inline void\n+rte_clear_bit32_relaxed(unsigned int nr, volatile uint32_t *addr)\n+{\n+\tRTE_ASSERT(nr < 32);\n+\n+\tuint32_t mask = UINT32_C(1) << nr;\n+\t*addr = (*addr) & (~mask);\n+}\n+\n+/**\n+ * @warning\n+ * @b EXPERIMENTAL: this API may change, or be removed, without prior notice\n+ *\n+ * Return the original bit from a 32-bit value, then set it to 1 without\n+ * memory ordering.\n+ *\n+ * @param nr\n+ * The target bit to get and set.\n+ * @param addr\n+ * The address holding the bit.\n+ * @return\n+ * The original bit.\n+ */\n+__rte_experimental\n+static inline uint32_t\n+rte_test_and_set_bit32_relaxed(unsigned int nr, volatile uint32_t *addr)\n+{\n+\tRTE_ASSERT(nr < 32);\n+\n+\tuint32_t mask = UINT32_C(1) << nr;\n+\tuint32_t val = *addr;\n+\t*addr = val | mask;\n+\treturn val & mask;\n+}\n+\n+/**\n+ * @warning\n+ * @b EXPERIMENTAL: this API may change, or be removed, without prior notice\n+ *\n+ * Return the original bit from a 32-bit value, then clear it to 0 without\n+ * memory ordering.\n+ *\n+ * @param nr\n+ * The target bit to get and clear.\n+ * @param addr\n+ * The address holding the bit.\n+ * @return\n+ * The original bit.\n+ */\n+__rte_experimental\n+static inline uint32_t\n+rte_test_and_clear_bit32_relaxed(unsigned int nr, volatile uint32_t *addr)\n+{\n+\tRTE_ASSERT(nr < 32);\n+\n+\tuint32_t mask = UINT32_C(1) << nr;\n+\tuint32_t val = *addr;\n+\t*addr = val & (~mask);\n+\treturn val & mask;\n+}\n+\n+/*---------------------------- 64 bit operations ----------------------------*/\n+\n+/**\n+ * @warning\n+ * @b EXPERIMENTAL: this API may change, or be removed, without prior notice\n+ *\n+ * Get the target bit from a 64-bit value without memory ordering.\n+ *\n+ * @param nr\n+ * The target bit to get.\n+ * @param addr\n+ * The address holding the bit.\n+ * @return\n+ * The target bit.\n+ */\n+__rte_experimental\n+static inline uint64_t\n+rte_get_bit64_relaxed(unsigned int nr, volatile uint64_t *addr)\n+{\n+\tRTE_ASSERT(nr < 64);\n+\n+\tuint64_t mask = UINT64_C(1) << nr;\n+\treturn (*addr) & mask;\n+}\n+\n+/**\n+ * @warning\n+ * @b EXPERIMENTAL: this API may change, or be removed, without prior notice\n+ *\n+ * Set the target bit in a 64-bit value to 1 without memory ordering.\n+ *\n+ * @param nr\n+ * The target bit to set.\n+ * @param addr\n+ * The address holding the bit.\n+ */\n+__rte_experimental\n+static inline void\n+rte_set_bit64_relaxed(unsigned int nr, volatile uint64_t *addr)\n+{\n+\tRTE_ASSERT(nr < 64);\n+\n+\tuint64_t mask = UINT64_C(1) << nr;\n+\t(*addr) = (*addr) | mask;\n+}\n+\n+/**\n+ * @warning\n+ * @b EXPERIMENTAL: this API may change, or be removed, without prior notice\n+ *\n+ * Clear the target bit in a 64-bit value to 0 without memory ordering.\n+ *\n+ * @param nr\n+ * The target bit to clear.\n+ * @param addr\n+ * The address holding the bit.\n+ */\n+__rte_experimental\n+static inline void\n+rte_clear_bit64_relaxed(unsigned int nr, volatile uint64_t *addr)\n+{\n+\tRTE_ASSERT(nr < 64);\n+\n+\tuint64_t mask = UINT64_C(1) << nr;\n+\t*addr = (*addr) & (~mask);\n+}\n+\n+/**\n+ * @warning\n+ * @b EXPERIMENTAL: this API may change, or be removed, without prior notice\n+ *\n+ * Return the original bit from a 64-bit value, then set it to 1 without\n+ * memory ordering.\n+ *\n+ * @param nr\n+ * The target bit to get and set.\n+ * @param addr\n+ * The address holding the bit.\n+ * @return\n+ * The original bit.\n+ */\n+__rte_experimental\n+static inline uint64_t\n+rte_test_and_set_bit64_relaxed(unsigned int nr, volatile uint64_t *addr)\n+{\n+\tRTE_ASSERT(nr < 64);\n+\n+\tuint64_t mask = UINT64_C(1) << nr;\n+\tuint64_t val = *addr;\n+\t*addr = val | mask;\n+\treturn val;\n+}\n+\n+/**\n+ * @warning\n+ * @b EXPERIMENTAL: this API may change, or be removed, without prior notice\n+ *\n+ * Return the original bit from a 64-bit value, then clear it to 0 without\n+ * memory ordering.\n+ *\n+ * @param nr\n+ * The target bit to get and clear.\n+ * @param addr\n+ * The address holding the bit.\n+ * @return\n+ * The original bit.\n+ */\n+__rte_experimental\n+static inline uint64_t\n+rte_test_and_clear_bit64_relaxed(unsigned int nr, volatile uint64_t *addr)\n+{\n+\tRTE_ASSERT(nr < 64);\n+\n+\tuint64_t mask = UINT64_C(1) << nr;\n+\tuint64_t val = *addr;\n+\t*addr = val & (~mask);\n+\treturn val & mask;\n+}\n+\n+#endif /* _RTE_BITOPS_H_ */\n", "prefixes": [ "v9", "1/6" ] }