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GET /api/patches/73751/?format=api
{ "id": 73751, "url": "http://patchwork.dpdk.org/api/patches/73751/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/a55cbb5ae404f9453f38e6f2389a82873451506b.1594389240.git.vladimir.medvedkin@intel.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<a55cbb5ae404f9453f38e6f2389a82873451506b.1594389240.git.vladimir.medvedkin@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/a55cbb5ae404f9453f38e6f2389a82873451506b.1594389240.git.vladimir.medvedkin@intel.com", "date": "2020-07-10T14:46:36", "name": "[v5,1/8] eal/x86: introduce AVX 512-bit type", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "a86b4f7b1f3eb838e2137f2cc7e5334a830a0ada", "submitter": { "id": 1216, "url": "http://patchwork.dpdk.org/api/people/1216/?format=api", "name": "Vladimir Medvedkin", "email": "vladimir.medvedkin@intel.com" }, "delegate": { "id": 1, "url": "http://patchwork.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/a55cbb5ae404f9453f38e6f2389a82873451506b.1594389240.git.vladimir.medvedkin@intel.com/mbox/", "series": [ { "id": 10953, "url": "http://patchwork.dpdk.org/api/series/10953/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=10953", "date": "2020-07-10T14:46:35", "name": "fib: implement AVX512 vector lookup", "version": 5, "mbox": "http://patchwork.dpdk.org/series/10953/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/73751/comments/", "check": "fail", "checks": "http://patchwork.dpdk.org/api/patches/73751/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id CF615A052A;\n\tFri, 10 Jul 2020 16:46:58 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 65E7D1DE8E;\n\tFri, 10 Jul 2020 16:46:52 +0200 (CEST)", "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n by dpdk.org (Postfix) with ESMTP id D1FB01DAFB\n for <dev@dpdk.org>; Fri, 10 Jul 2020 16:46:48 +0200 (CEST)", "from orsmga001.jf.intel.com ([10.7.209.18])\n by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 10 Jul 2020 07:46:47 -0700", "from silpixa00400322.ir.intel.com ([10.237.214.86])\n by orsmga001.jf.intel.com with ESMTP; 10 Jul 2020 07:46:46 -0700" ], "IronPort-SDR": [ "\n NreuC95OuveRSJgGSGtP29OqpG+VDqbTFB0B3cZGL+If0DF3m1ZHPBs9CBeLtZyFav4gBFU9LK\n yELvBa82PusA==", "\n Mzf/x/TB7D7O0HypDOTfPhpOfjGSCFGq/JiSmVDzPf2xNy3tI6hFbrACQ6SUjLu6t+XzBB3DLG\n ouHRtDQRrmMQ==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9678\"; a=\"166299000\"", "E=Sophos;i=\"5.75,336,1589266800\"; d=\"scan'208\";a=\"166299000\"", "E=Sophos;i=\"5.75,336,1589266800\"; d=\"scan'208\";a=\"358856596\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Vladimir Medvedkin <vladimir.medvedkin@intel.com>", "To": "dev@dpdk.org", "Cc": "konstantin.ananyev@intel.com,\n\tbruce.richardson@intel.com", "Date": "Fri, 10 Jul 2020 15:46:36 +0100", "Message-Id": "\n <a55cbb5ae404f9453f38e6f2389a82873451506b.1594389240.git.vladimir.medvedkin@intel.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": [ "<cover.1594389240.git.vladimir.medvedkin@intel.com>", "<cover.1594389240.git.vladimir.medvedkin@intel.com>" ], "References": [ "<cover.1594389240.git.vladimir.medvedkin@intel.com>", "<cover.1594238609.git.vladimir.medvedkin@intel.com>\n <cover.1594389240.git.vladimir.medvedkin@intel.com>" ], "Subject": "[dpdk-dev] [PATCH v5 1/8] eal/x86: introduce AVX 512-bit type", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "New data type to manipulate 512 bit AVX values.\n\nSigned-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>\n---\n lib/librte_eal/x86/include/rte_vect.h | 19 +++++++++++++++++++\n 1 file changed, 19 insertions(+)", "diff": "diff --git a/lib/librte_eal/x86/include/rte_vect.h b/lib/librte_eal/x86/include/rte_vect.h\nindex df5a60762..1b2af7138 100644\n--- a/lib/librte_eal/x86/include/rte_vect.h\n+++ b/lib/librte_eal/x86/include/rte_vect.h\n@@ -13,6 +13,7 @@\n \n #include <stdint.h>\n #include <rte_config.h>\n+#include <rte_common.h>\n #include \"generic/rte_vect.h\"\n \n #if (defined(__ICC) || \\\n@@ -90,6 +91,24 @@ __extension__ ({ \\\n })\n #endif /* (defined(__ICC) && __ICC < 1210) */\n \n+#ifdef __AVX512F__\n+\n+#define\tRTE_X86_ZMM_SIZE\t(sizeof(__m512i))\n+#define\tRTE_X86_ZMM_MASK\t(ZMM_SIZE - 1)\n+\n+typedef union __rte_x86_zmm {\n+\t__m512i\t z;\n+\tymm_t y[RTE_X86_ZMM_SIZE / sizeof(ymm_t)];\n+\txmm_t x[RTE_X86_ZMM_SIZE / sizeof(xmm_t)];\n+\tuint8_t u8[RTE_X86_ZMM_SIZE / sizeof(uint8_t)];\n+\tuint16_t u16[RTE_X86_ZMM_SIZE / sizeof(uint16_t)];\n+\tuint32_t u32[RTE_X86_ZMM_SIZE / sizeof(uint32_t)];\n+\tuint64_t u64[RTE_X86_ZMM_SIZE / sizeof(uint64_t)];\n+\tdouble pd[RTE_X86_ZMM_SIZE / sizeof(double)];\n+} __rte_aligned(RTE_X86_ZMM_SIZE) __rte_x86_zmm_t;\n+\n+#endif /* __AVX512F__ */\n+\n #ifdef __cplusplus\n }\n #endif\n", "prefixes": [ "v5", "1/8" ] }