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GET /api/patches/73944/?format=api
{ "id": 73944, "url": "http://patchwork.dpdk.org/api/patches/73944/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20200713222321.2118-2-chenmin.sun@intel.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200713222321.2118-2-chenmin.sun@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200713222321.2118-2-chenmin.sun@intel.com", "date": "2020-07-13T22:23:20", "name": "[V3,1/2] net/i40e: i40e FDIR update rate optimization data structures", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "220567ce9ccb4cf04dd6c9316b68aa42fcc385de", "submitter": { "id": 1212, "url": "http://patchwork.dpdk.org/api/people/1212/?format=api", "name": "Chenmin Sun", "email": "chenmin.sun@intel.com" }, "delegate": { "id": 1540, "url": "http://patchwork.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20200713222321.2118-2-chenmin.sun@intel.com/mbox/", "series": [ { "id": 10996, "url": "http://patchwork.dpdk.org/api/series/10996/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=10996", "date": "2020-07-13T22:23:19", "name": "i40e FDIR update rate optimization", "version": 3, "mbox": "http://patchwork.dpdk.org/series/10996/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/73944/comments/", "check": "fail", "checks": "http://patchwork.dpdk.org/api/patches/73944/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 133F9A0540;\n\tMon, 13 Jul 2020 15:28:08 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id C6F2F1D69B;\n\tMon, 13 Jul 2020 15:28:07 +0200 (CEST)", "from mga06.intel.com (mga06.intel.com [134.134.136.31])\n by dpdk.org (Postfix) with ESMTP id 02C421D603\n for <dev@dpdk.org>; Mon, 13 Jul 2020 15:28:06 +0200 (CEST)", "from orsmga005.jf.intel.com ([10.7.209.41])\n by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 13 Jul 2020 06:28:05 -0700", "from npg-dpdk-vpp-scm-1.sh.intel.com ([10.67.118.226])\n by orsmga005.jf.intel.com with ESMTP; 13 Jul 2020 06:28:03 -0700" ], "IronPort-SDR": [ "\n HJ4oz8WlEl1v9FP4VK7EaOF+D4CSfBeUhHaugCfrNxTjneUlBNoPIbGsrJQtG1fBRVuXqpPTp8\n TIQQHM25lXgw==", "\n 8+WQ2VIAvZWq3/SIUOOrA6gUS38ytZSF+wjE5YrZ+HOCy2s7+raTnTIqOiyJy8FcxsasiW4yJ9\n 4TKg5Gkxob5A==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9680\"; a=\"210145230\"", "E=Sophos;i=\"5.75,347,1589266800\"; d=\"scan'208\";a=\"210145230\"", "E=Sophos;i=\"5.75,347,1589266800\"; d=\"scan'208\";a=\"459293468\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "chenmin.sun@intel.com", "To": "qi.z.zhang@intel.com, beilei.xing@intel.com, jingjing.wu@intel.com,\n haiyue.wang@intel.com", "Cc": "dev@dpdk.org,\n\tchenmin.sun@intel.com", "Date": "Tue, 14 Jul 2020 06:23:20 +0800", "Message-Id": "<20200713222321.2118-2-chenmin.sun@intel.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20200713222321.2118-1-chenmin.sun@intel.com>", "References": "<20200709143932.35806-1-chenmin.sun@intel.com>\n <20200713222321.2118-1-chenmin.sun@intel.com>", "Subject": "[dpdk-dev] [PATCH V3 1/2] net/i40e: i40e FDIR update rate\n\toptimization data structures", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Chenmin Sun <chenmin.sun@intel.com>\n\nThis patch introduces the new data structures for i40e fdir\nupdate rate optimization.\n\nSigned-off-by: Chenmin Sun <chenmin.sun@intel.com>\n---\n drivers/net/i40e/i40e_ethdev.h | 72 ++++++++++++++++++++++++++++------\n 1 file changed, 61 insertions(+), 11 deletions(-)", "diff": "diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h\nindex 31ca05de9..8baa67233 100644\n--- a/drivers/net/i40e/i40e_ethdev.h\n+++ b/drivers/net/i40e/i40e_ethdev.h\n@@ -264,6 +264,15 @@ enum i40e_flxpld_layer_idx {\n #define I40E_DEFAULT_DCB_APP_NUM 1\n #define I40E_DEFAULT_DCB_APP_PRIO 3\n \n+/*\n+ * Struct to store flow created.\n+ */\n+struct rte_flow {\n+\tTAILQ_ENTRY(rte_flow) node;\n+\tenum rte_filter_type filter_type;\n+\tvoid *rule;\n+};\n+\n /**\n * The overhead from MTU to max frame size.\n * Considering QinQ packet, the VLAN tag needs to be counted twice.\n@@ -674,17 +683,37 @@ struct i40e_fdir_filter {\n \tstruct i40e_fdir_filter_conf fdir;\n };\n \n+/* fdir memory pool entry */\n+struct i40e_fdir_entry {\n+\tstruct rte_flow flow;\n+\tuint32_t idx;\n+};\n+\n+/* pre-allocated fdir memory pool */\n+struct i40e_fdir_flow_pool {\n+\t/* a bitmap to manage the fdir pool */\n+\tstruct rte_bitmap *b;\n+\t/* the size the pool is pf->fdir->fdir_space_size */\n+\tstruct i40e_fdir_entry *pool;\n+};\n+\n+#define FLOW_TO_FLOW_BITMAP(f) \\\n+\tcontainer_of((f), struct i40e_fdir_entry, flow)\n+\n TAILQ_HEAD(i40e_fdir_filter_list, i40e_fdir_filter);\n /*\n * A structure used to define fields of a FDIR related info.\n */\n struct i40e_fdir_info {\n+#define PRG_PKT_CNT\t128\n+\n \tstruct i40e_vsi *fdir_vsi; /* pointer to fdir VSI structure */\n \tuint16_t match_counter_index; /* Statistic counter index used for fdir*/\n \tstruct i40e_tx_queue *txq;\n \tstruct i40e_rx_queue *rxq;\n \tvoid *prg_pkt; /* memory for fdir program packet */\n \tuint64_t dma_addr; /* physic address of packet memory*/\n+\n \t/* input set bits for each pctype */\n \tuint64_t input_set[I40E_FILTER_PCTYPE_MAX];\n \t/*\n@@ -697,6 +726,36 @@ struct i40e_fdir_info {\n \tstruct i40e_fdir_filter_list fdir_list;\n \tstruct i40e_fdir_filter **hash_map;\n \tstruct rte_hash *hash_table;\n+\t/* An array to store the inserted rules input */\n+\tstruct i40e_fdir_filter *fdir_filter_array;\n+\n+\t/*\n+\t * Priority ordering at filter invalidation(destroying a flow) between\n+\t * \"best effort\" space and \"guaranteed\" space.\n+\t *\n+\t * 0 = At filter invalidation, the hardware first tries to increment the\n+\t * \"best effort\" space. The \"guaranteed\" space is incremented only when\n+\t * the global \"best effort\" space is at it max value or the \"best effort\"\n+\t * space of the PF is at its max value.\n+\t * 1 = At filter invalidation, the hardware first tries to increment its\n+\t * \"guaranteed\" space. The \"best effort\" space is incremented only when\n+\t * it is already at its max value.\n+\t */\n+\tuint32_t fdir_invalprio;\n+\t/* the total size of the fdir, this number is the sum of the guaranteed +\n+\t * shared space\n+\t */\n+\tuint32_t fdir_space_size;\n+\t/* the actual number of the fdir rules in hardware, initialized as 0 */\n+\tuint32_t fdir_actual_cnt;\n+\t/* the guaranteed space of the fdir */\n+\tuint32_t fdir_guarantee_free_space;\n+\t/* the available guaranteed space, initialized as the\n+\t * fdir_guarantee_free_space and dynamically maintained\n+\t */\n+\tuint32_t fdir_guarantee_available_space;\n+\t/* the pre-allocated pool of the rte_flow */\n+\tstruct i40e_fdir_flow_pool fdir_flow_pool;\n \n \t/* Mark if flex pit and mask is set */\n \tbool flex_pit_flag[I40E_MAX_FLXPLD_LAYER];\n@@ -894,15 +953,6 @@ struct i40e_mirror_rule {\n \n TAILQ_HEAD(i40e_mirror_rule_list, i40e_mirror_rule);\n \n-/*\n- * Struct to store flow created.\n- */\n-struct rte_flow {\n-\tTAILQ_ENTRY(rte_flow) node;\n-\tenum rte_filter_type filter_type;\n-\tvoid *rule;\n-};\n-\n TAILQ_HEAD(i40e_flow_list, rte_flow);\n \n /* Struct to store Traffic Manager shaper profile. */\n@@ -1335,8 +1385,8 @@ int i40e_add_del_fdir_filter(struct rte_eth_dev *dev,\n \t\t\t const struct rte_eth_fdir_filter *filter,\n \t\t\t bool add);\n int i40e_flow_add_del_fdir_filter(struct rte_eth_dev *dev,\n-\t\t\t\t const struct i40e_fdir_filter_conf *filter,\n-\t\t\t\t bool add);\n+\t\t\t const struct i40e_fdir_filter_conf *filter,\n+\t\t\t bool add);\n int i40e_dev_tunnel_filter_set(struct i40e_pf *pf,\n \t\t\t struct rte_eth_tunnel_filter_conf *tunnel_filter,\n \t\t\t uint8_t add);\n", "prefixes": [ "V3", "1/2" ] }