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GET /api/patches/74006/?format=api
{ "id": 74006, "url": "http://patchwork.dpdk.org/api/patches/74006/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20200714142102.30606-3-ophirmu@mellanox.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200714142102.30606-3-ophirmu@mellanox.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200714142102.30606-3-ophirmu@mellanox.com", "date": "2020-07-14T14:20:56", "name": "[v1,2/8] net/mlx5: replace Linux specific calls with rte API", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "56a41ac590b5879f045194bb5e6567fcd5e462c6", "submitter": { "id": 793, "url": "http://patchwork.dpdk.org/api/people/793/?format=api", "name": "Ophir Munk", "email": "ophirmu@mellanox.com" }, "delegate": { "id": 3268, "url": "http://patchwork.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20200714142102.30606-3-ophirmu@mellanox.com/mbox/", "series": [ { "id": 11020, "url": "http://patchwork.dpdk.org/api/series/11020/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=11020", "date": "2020-07-14T14:20:54", "name": "mlx5 PMD multi OS support - part #3", "version": 1, "mbox": "http://patchwork.dpdk.org/series/11020/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/74006/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/74006/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", 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b=i7fHjDrSCMh0dwViYMD4YEAqrPoefUXtPk+rdWtK4UVCUjq+GuanJwlCRpdbpb6DelZrX1PgJgh9FayihsKqZGC9C29Tjh25HVSAV+cABdcr3hSJoR48KUWn5g8G72DzuZtZnC9okYrYVpgvmkzCbpDuac/J45XJKXwVxaECTDc=", "Authentication-Results": "dpdk.org; dkim=none (message not signed)\n header.d=none;dpdk.org; dmarc=none action=none header.from=mellanox.com;", "From": "Ophir Munk <ophirmu@mellanox.com>", "To": "dev@dpdk.org", "Cc": "Raslan Darawsheh <rasland@mellanox.com>,\n Ophir Munk <ophirmu@mellanox.com>,\n Matan Azrad <matan@mellanox.com>", "Date": "Tue, 14 Jul 2020 14:20:56 +0000", "Message-Id": "<20200714142102.30606-3-ophirmu@mellanox.com>", "X-Mailer": [ "git-send-email 2.8.4", "git-send-email 2.8.4" ], "In-Reply-To": "<20200714142102.30606-1-ophirmu@mellanox.com>", "References": "<20200714142102.30606-1-ophirmu@mellanox.com>", "Content-Type": "text/plain", "X-ClientProxiedBy": "AM3PR05CA0100.eurprd05.prod.outlook.com\n (2603:10a6:207:1::26) To AM0PR05MB4209.eurprd05.prod.outlook.com\n (2603:10a6:208:61::22)", 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TKkONIrTPOHRlNG/jc4sJGclUqe1DyWradKH//TSkobrC0iYdu6guW2/dW0I51+a66vbhMP56thn1BiVovJaN6IBYr5adF4ZW0wB7tofEALuzcfdJt79wO6mwx2k9XihIe7tzJzicN56jkmidkXwqgqbylBGUpe7tNKueN8H4NIK3yIj7sVR9Sz+rRJwEJBOA381FaBykFkjdxiIWMzloXxgFKNOa4kx3ppp4mc6oWWymmdTmLjj6kzgmrtPd921lnR14jNzPd3VjuMRzKHSTFHV9HArdkSgfM4PScc4MMlTZdnYJEZOKsXpECz2O2+L6epU3TThoaWtla5OmvYIdNgI0pstIVvCb+ulRHonz812XM4+i7mgMNVC37TL/G7eIbnHYZ6LQPvi9tKf1HAmRGLhWneeCAZb+l7zhsNRinMkvsVBFXptPCUlFgmKrvUQkN4jomdJS5vrTKByukxDUwt5ReVlu79KrVWUB4mvSXmRkUTq7x1pNKFc9BAQmvts", "X-OriginatorOrg": "Mellanox.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 3cd431df-b717-4ff7-88b6-08d828012854", "X-MS-Exchange-CrossTenant-AuthSource": "AM0PR05MB4209.eurprd05.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "14 Jul 2020 14:21:11.1760 (UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "a652971c-7d2e-4d9b-a6a4-d149256f461b", "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED", "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n UNc76Aj/q8ZBjX8Op2X2MpyfOW65+rX3loZ9Xw2owB1n9NK2N48/P8vSJ80Us3EGMpmUZ1fgg8FYlQVaa49r7w==", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "AM0PR05MB4625", "Subject": "[dpdk-dev] [PATCH v1 2/8] net/mlx5: replace Linux specific calls\n\twith rte API", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The following Linux calls are replaced by their matching rte APIs.\n\nmmap ==> rte_mem_map()\nmunmap == >rte_mem_unmap()\nsysconf(_SC_PAGESIZE) ==> rte_mem_page_size()\n\nSigned-off-by: Ophir Munk <ophirmu@mellanox.com>\nAcked-by: Matan Azrad <matan@mellanox.com>\n---\n drivers/common/mlx5/mlx5_devx_cmds.c | 8 +++++++-\n drivers/common/mlx5/mlx5_prm.h | 2 +-\n drivers/net/mlx5/linux/mlx5_os.c | 11 ++++++++---\n drivers/net/mlx5/linux/mlx5_verbs.c | 1 -\n drivers/net/mlx5/mlx5_flow_dv.c | 9 ++++++++-\n drivers/net/mlx5/mlx5_rxq.c | 9 ++++++++-\n drivers/net/mlx5/mlx5_txq.c | 29 +++++++++++++++++++++--------\n 7 files changed, 53 insertions(+), 16 deletions(-)", "diff": "diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c b/drivers/common/mlx5/mlx5_devx_cmds.c\nindex 2179a83..795e85f 100644\n--- a/drivers/common/mlx5/mlx5_devx_cmds.c\n+++ b/drivers/common/mlx5/mlx5_devx_cmds.c\n@@ -5,6 +5,7 @@\n \n #include <rte_errno.h>\n #include <rte_malloc.h>\n+#include <rte_eal_paging.h>\n \n #include \"mlx5_prm.h\"\n #include \"mlx5_devx_cmds.h\"\n@@ -158,7 +159,12 @@ mlx5_devx_cmd_mkey_create(void *ctx,\n \t\treturn NULL;\n \t}\n \tmemset(in, 0, in_size_dw * 4);\n-\tpgsize = sysconf(_SC_PAGESIZE);\n+\tpgsize = rte_mem_page_size();\n+\tif (pgsize == (size_t)-1) {\n+\t\tDRV_LOG(ERR, \"Failed to get page size\");\n+\t\trte_errno = ENOMEM;\n+\t\treturn NULL;\n+\t}\n \tMLX5_SET(create_mkey_in, in, opcode, MLX5_CMD_OP_CREATE_MKEY);\n \tmkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);\n \tif (klm_num > 0) {\ndiff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h\nindex c63795f..1b7b4c7 100644\n--- a/drivers/common/mlx5/mlx5_prm.h\n+++ b/drivers/common/mlx5/mlx5_prm.h\n@@ -253,7 +253,7 @@\n #define MLX5_MAX_LOG_RQ_SEGS 5u\n \n /* The alignment needed for WQ buffer. */\n-#define MLX5_WQE_BUF_ALIGNMENT sysconf(_SC_PAGESIZE)\n+#define MLX5_WQE_BUF_ALIGNMENT rte_mem_page_size()\n \n /* Completion mode. */\n enum mlx5_completion_mode {\ndiff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c\nindex 2dc57b2..e5f024a 100644\n--- a/drivers/net/mlx5/linux/mlx5_os.c\n+++ b/drivers/net/mlx5/linux/mlx5_os.c\n@@ -10,7 +10,6 @@\n #include <stdlib.h>\n #include <errno.h>\n #include <net/if.h>\n-#include <sys/mman.h>\n #include <linux/rtnetlink.h>\n #include <linux/sockios.h>\n #include <linux/ethtool.h>\n@@ -37,6 +36,7 @@\n #include <rte_spinlock.h>\n #include <rte_string_fns.h>\n #include <rte_alarm.h>\n+#include <rte_eal_paging.h>\n \n #include <mlx5_glue.h>\n #include <mlx5_devx_cmds.h>\n@@ -133,7 +133,7 @@ mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)\n * Verbs callback to allocate a memory. This function should allocate the space\n * according to the size provided residing inside a huge page.\n * Please note that all allocation must respect the alignment from libmlx5\n- * (i.e. currently sysconf(_SC_PAGESIZE)).\n+ * (i.e. currently rte_mem_page_size()).\n *\n * @param[in] size\n * The size in bytes of the memory to allocate.\n@@ -148,8 +148,13 @@ mlx5_alloc_verbs_buf(size_t size, void *data)\n {\n \tstruct mlx5_priv *priv = data;\n \tvoid *ret;\n-\tsize_t alignment = sysconf(_SC_PAGESIZE);\n \tunsigned int socket = SOCKET_ID_ANY;\n+\tsize_t alignment = rte_mem_page_size();\n+\tif (alignment == (size_t)-1) {\n+\t\tDRV_LOG(ERR, \"Failed to get mem page size\");\n+\t\trte_errno = ENOMEM;\n+\t\treturn NULL;\n+\t}\n \n \tif (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {\n \t\tconst struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;\ndiff --git a/drivers/net/mlx5/linux/mlx5_verbs.c b/drivers/net/mlx5/linux/mlx5_verbs.c\nindex 6b59fa1..5ac6982 100644\n--- a/drivers/net/mlx5/linux/mlx5_verbs.c\n+++ b/drivers/net/mlx5/linux/mlx5_verbs.c\n@@ -7,7 +7,6 @@\n #include <string.h>\n #include <stdint.h>\n #include <unistd.h>\n-#include <sys/mman.h>\n #include <inttypes.h>\n \n /* Verbs header. */\ndiff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c\nindex 8b5b683..7ce30e0 100644\n--- a/drivers/net/mlx5/mlx5_flow_dv.c\n+++ b/drivers/net/mlx5/mlx5_flow_dv.c\n@@ -29,6 +29,7 @@\n #include <rte_gre.h>\n #include <rte_vxlan.h>\n #include <rte_gtp.h>\n+#include <rte_eal_paging.h>\n \n #include <mlx5_devx_cmds.h>\n #include <mlx5_prm.h>\n@@ -4175,7 +4176,13 @@ flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)\n \t\t\tMLX5_COUNTERS_PER_POOL +\n \t\t\tsizeof(struct mlx5_counter_stats_raw)) * raws_n +\n \t\t\tsizeof(struct mlx5_counter_stats_mem_mng);\n-\tuint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));\n+\tsize_t pgsize = rte_mem_page_size();\n+\tif (pgsize == (size_t)-1) {\n+\t\tDRV_LOG(ERR, \"Failed to get mem page size\");\n+\t\trte_errno = ENOMEM;\n+\t\treturn NULL;\n+\t}\n+\tuint8_t *mem = rte_calloc(__func__, 1, size, pgsize);\n \tint i;\n \n \tif (!mem) {\ndiff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c\nindex b436f06..637b131 100644\n--- a/drivers/net/mlx5/mlx5_rxq.c\n+++ b/drivers/net/mlx5/mlx5_rxq.c\n@@ -28,6 +28,7 @@\n #include <rte_interrupts.h>\n #include <rte_debug.h>\n #include <rte_io.h>\n+#include <rte_eal_paging.h>\n \n #include <mlx5_glue.h>\n #include <mlx5_devx_cmds.h>\n@@ -1230,7 +1231,13 @@ mlx5_devx_rq_new(struct rte_eth_dev *dev, uint16_t idx, uint32_t cqn)\n \t/* Calculate and allocate WQ memory space. */\n \twqe_size = 1 << log_wqe_size; /* round up power of two.*/\n \twq_size = wqe_n * wqe_size;\n-\tbuf = rte_calloc_socket(__func__, 1, wq_size, MLX5_WQE_BUF_ALIGNMENT,\n+\tsize_t alignment = MLX5_WQE_BUF_ALIGNMENT;\n+\tif (alignment == (size_t)-1) {\n+\t\tDRV_LOG(ERR, \"Failed to get mem page size\");\n+\t\trte_errno = ENOMEM;\n+\t\treturn NULL;\n+\t}\n+\tbuf = rte_calloc_socket(__func__, 1, wq_size, alignment,\n \t\t\t\trxq_ctrl->socket);\n \tif (!buf)\n \t\treturn NULL;\ndiff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c\nindex 35b3ade..a9bf42d 100644\n--- a/drivers/net/mlx5/mlx5_txq.c\n+++ b/drivers/net/mlx5/mlx5_txq.c\n@@ -8,7 +8,6 @@\n #include <string.h>\n #include <stdint.h>\n #include <unistd.h>\n-#include <sys/mman.h>\n #include <inttypes.h>\n \n /* Verbs header. */\n@@ -26,6 +25,7 @@\n #include <rte_malloc.h>\n #include <rte_ethdev_driver.h>\n #include <rte_common.h>\n+#include <rte_eal_paging.h>\n \n #include <mlx5_glue.h>\n #include <mlx5_devx_cmds.h>\n@@ -340,10 +340,14 @@ txq_uar_init(struct mlx5_txq_ctrl *txq_ctrl)\n {\n \tstruct mlx5_priv *priv = txq_ctrl->priv;\n \tstruct mlx5_proc_priv *ppriv = MLX5_PROC_PRIV(PORT_ID(priv));\n-\tconst size_t page_size = sysconf(_SC_PAGESIZE);\n #ifndef RTE_ARCH_64\n \tunsigned int lock_idx;\n #endif\n+\tconst size_t page_size = rte_mem_page_size();\n+\tif (page_size == (size_t)-1) {\n+\t\tDRV_LOG(ERR, \"Failed to get mem page size\");\n+\t\trte_errno = ENOMEM;\n+\t}\n \n \tif (txq_ctrl->type != MLX5_TXQ_TYPE_STANDARD)\n \t\treturn;\n@@ -382,7 +386,12 @@ txq_uar_init_secondary(struct mlx5_txq_ctrl *txq_ctrl, int fd)\n \tvoid *addr;\n \tuintptr_t uar_va;\n \tuintptr_t offset;\n-\tconst size_t page_size = sysconf(_SC_PAGESIZE);\n+\tconst size_t page_size = rte_mem_page_size();\n+\tif (page_size == (size_t)-1) {\n+\t\tDRV_LOG(ERR, \"Failed to get mem page size\");\n+\t\trte_errno = ENOMEM;\n+\t\treturn -rte_errno;\n+\t}\n \n \tif (txq_ctrl->type != MLX5_TXQ_TYPE_STANDARD)\n \t\treturn 0;\n@@ -393,9 +402,9 @@ txq_uar_init_secondary(struct mlx5_txq_ctrl *txq_ctrl, int fd)\n \t */\n \tuar_va = (uintptr_t)txq_ctrl->bf_reg;\n \toffset = uar_va & (page_size - 1); /* Offset in page. */\n-\taddr = mmap(NULL, page_size, PROT_WRITE, MAP_SHARED, fd,\n-\t\t\ttxq_ctrl->uar_mmap_offset);\n-\tif (addr == MAP_FAILED) {\n+\taddr = rte_mem_map(NULL, page_size, RTE_PROT_WRITE, RTE_MAP_SHARED,\n+\t\t\t fd, txq_ctrl->uar_mmap_offset);\n+\tif (!addr) {\n \t\tDRV_LOG(ERR,\n \t\t\t\"port %u mmap failed for BF reg of txq %u\",\n \t\t\ttxq->port_id, txq->idx);\n@@ -418,13 +427,17 @@ static void\n txq_uar_uninit_secondary(struct mlx5_txq_ctrl *txq_ctrl)\n {\n \tstruct mlx5_proc_priv *ppriv = MLX5_PROC_PRIV(PORT_ID(txq_ctrl->priv));\n-\tconst size_t page_size = sysconf(_SC_PAGESIZE);\n \tvoid *addr;\n+\tconst size_t page_size = rte_mem_page_size();\n+\tif (page_size == (size_t)-1) {\n+\t\tDRV_LOG(ERR, \"Failed to get mem page size\");\n+\t\trte_errno = ENOMEM;\n+\t}\n \n \tif (txq_ctrl->type != MLX5_TXQ_TYPE_STANDARD)\n \t\treturn;\n \taddr = ppriv->uar_table[txq_ctrl->txq.idx];\n-\tmunmap(RTE_PTR_ALIGN_FLOOR(addr, page_size), page_size);\n+\trte_mem_unmap(RTE_PTR_ALIGN_FLOOR(addr, page_size), page_size);\n }\n \n /**\n", "prefixes": [ "v1", "2/8" ] }