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GET /api/patches/74079/?format=api
{ "id": 74079, "url": "http://patchwork.dpdk.org/api/patches/74079/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20200715092703.17936-10-ktejasree@marvell.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200715092703.17936-10-ktejasree@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200715092703.17936-10-ktejasree@marvell.com", "date": "2020-07-15T09:27:03", "name": "[v2,9/9] crypto/octeontx2: add cryptodev sec dequeue routine", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "6d1d7dc45f1bdd6810c10e9aba9a7c8bd270a7bb", "submitter": { "id": 1789, "url": "http://patchwork.dpdk.org/api/people/1789/?format=api", "name": "Tejasree Kondoj", "email": "ktejasree@marvell.com" }, "delegate": { "id": 6690, "url": "http://patchwork.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20200715092703.17936-10-ktejasree@marvell.com/mbox/", "series": [ { "id": 11041, "url": "http://patchwork.dpdk.org/api/series/11041/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=11041", "date": "2020-07-15T09:26:54", "name": "add OCTEON TX2 lookaside IPsec support", "version": 2, "mbox": "http://patchwork.dpdk.org/series/11041/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/74079/comments/", "check": "warning", "checks": "http://patchwork.dpdk.org/api/patches/74079/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id D6B6AA0540;\n\tWed, 15 Jul 2020 10:35:21 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 913201C139;\n\tWed, 15 Jul 2020 10:34:30 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 756BF1C10C\n for <dev@dpdk.org>; Wed, 15 Jul 2020 10:34:29 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id\n 06F8Ukeo015028; Wed, 15 Jul 2020 01:34:28 -0700", "from sc-exch04.marvell.com ([199.233.58.184])\n by mx0a-0016f401.pphosted.com with ESMTP id 327asngprv-2\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Wed, 15 Jul 2020 01:34:28 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by SC-EXCH04.marvell.com\n (10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Wed, 15 Jul 2020 01:34:27 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Wed, 15 Jul 2020 01:34:26 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Wed, 15 Jul 2020 01:34:26 -0700", "from hyd1554T5810.caveonetworks.com.com (unknown [10.29.57.11])\n by maili.marvell.com (Postfix) with ESMTP id EE2973F703F;\n Wed, 15 Jul 2020 01:34:23 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0818;\n bh=mAgVIk244Sb/1DLDzhQR+LnU4UExcLJhB/TZAZEZ5lo=;\n b=PsFtcLXMTD6FubW86AvvLxdt4hdmXJjbL7AoW6TwPpzDtP9EX0CvWDBhJIwoOvI/gmHO\n zbaweEf5X017G9CJ6/axDPYJwFyhxtq1zlIsTv3tdUt+BLLMtKCWYpqA7PvmxMQhvkIL\n 8PhHQTqahKtbiPNRqsDcbBnDMuiVTxSwAlD/8yFHr6qKAmbutyl6qnqPv1t5UqM2jKUJ\n gOa8ZuUqXNW4K0aUkbsCyoTfUfeLZ72+4O9vF7Iugt/VsZMZl+P1E+iiyRxgF4ae81wo\n fd6ZIIWNFgWR0Bh4u5w/2ZO5quDiBABg5HJvLquhgAxaep/mXdEfjSuanUKGD+bKrjqx nQ==", "From": "Tejasree Kondoj <ktejasree@marvell.com>", "To": "Akhil Goyal <akhil.goyal@nxp.com>, Radu Nicolau <radu.nicolau@intel.com>", "CC": "Vamsi Attunuru <vattunuru@marvell.com>, Narayana Prasad\n <pathreya@marvell.com>, Anoob Joseph <anoobj@marvell.com>, Tejasree Kondoj\n <ktejasree@marvell.com>, <dev@dpdk.org>", "Date": "Wed, 15 Jul 2020 14:57:03 +0530", "Message-ID": "<20200715092703.17936-10-ktejasree@marvell.com>", "X-Mailer": "git-send-email 2.27.0", "In-Reply-To": "<20200715092703.17936-1-ktejasree@marvell.com>", "References": "<20200715092703.17936-1-ktejasree@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687\n definitions=2020-07-15_06:2020-07-15,\n 2020-07-15 signatures=0", "Subject": "[dpdk-dev] [PATCH v2 9/9] crypto/octeontx2: add cryptodev sec\n\tdequeue routine", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Vamsi Attunuru <vattunuru@marvell.com>\n\nThis patch adds lookaside IPsec dequeue routine.\n\nSigned-off-by: Vamsi Attunuru <vattunuru@marvell.com>\nSigned-off-by: Tejasree Kondoj <ktejasree@marvell.com>\n---\n doc/guides/cryptodevs/octeontx2.rst | 19 ++++++++++\n doc/guides/rel_notes/release_20_08.rst | 5 +++\n drivers/crypto/octeontx2/otx2_cryptodev_ops.c | 37 +++++++++++++++++++\n drivers/crypto/octeontx2/otx2_ipsec_po.h | 30 +++++++++++++++\n 4 files changed, 91 insertions(+)", "diff": "diff --git a/doc/guides/cryptodevs/octeontx2.rst b/doc/guides/cryptodevs/octeontx2.rst\nindex 085d669e49..5d111e46c3 100644\n--- a/doc/guides/cryptodevs/octeontx2.rst\n+++ b/doc/guides/cryptodevs/octeontx2.rst\n@@ -158,3 +158,22 @@ application:\n \n ./test\n RTE>>cryptodev_octeontx2_asym_autotest\n+\n+\n+Lookaside IPsec Support\n+-----------------------\n+\n+The OCTEON TX2 SoC can accelerate IPsec traffic in lookaside protocol mode,\n+with its **cryptographic accelerator (CPT)**. ``OCTEON TX2 crypto PMD`` implements\n+this as an ``RTE_SECURITY_ACTION_TYPE_LOOKASIDE_PROTOCOL`` offload.\n+\n+Refer to :doc:`../prog_guide/rte_security` for more details on protocol offloads.\n+\n+\n+Features supported\n+~~~~~~~~~~~~~~~~~~\n+\n+* IPv4\n+* ESP\n+* Tunnel mode\n+* AES-128/192/256-GCM\ndiff --git a/doc/guides/rel_notes/release_20_08.rst b/doc/guides/rel_notes/release_20_08.rst\nindex f19b748728..2d57adc283 100644\n--- a/doc/guides/rel_notes/release_20_08.rst\n+++ b/doc/guides/rel_notes/release_20_08.rst\n@@ -225,6 +225,11 @@ New Features\n See the :doc:`../sample_app_ug/l2_forward_real_virtual` for more\n details of this parameter usage.\n \n+* **Added lookaside IPsec support to OCTEON TX2 crypto PMD.**\n+\n+ Added lookaside IPsec support to OCTEON TX2 crypto PMD. With this feature,\n+ applications will be able to offload lookaside IPsec to the hardware.\n+\n \n Removed Items\n -------------\ndiff --git a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c\nindex 6a2753eb22..9d51b17ddd 100644\n--- a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c\n+++ b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c\n@@ -835,11 +835,48 @@ otx2_cpt_asym_post_process(struct rte_crypto_op *cop,\n \t}\n }\n \n+static void\n+otx2_cpt_sec_post_process(struct rte_crypto_op *cop, uintptr_t *rsp)\n+{\n+\tstruct cpt_request_info *req = (struct cpt_request_info *)rsp[2];\n+\tvq_cmd_word0_t *word0 = (vq_cmd_word0_t *)&req->ist.ei0;\n+\tstruct rte_crypto_sym_op *sym_op = cop->sym;\n+\tstruct rte_mbuf *m = sym_op->m_src;\n+\tstruct rte_ipv4_hdr *ip;\n+\tuint16_t m_len;\n+\tint mdata_len;\n+\tchar *data;\n+\n+\tmdata_len = (int)rsp[3];\n+\trte_pktmbuf_trim(m, mdata_len);\n+\n+\tif ((word0->s.opcode & 0xff) == OTX2_IPSEC_PO_PROCESS_IPSEC_INB) {\n+\t\tdata = rte_pktmbuf_mtod(m, char *);\n+\t\tip = (struct rte_ipv4_hdr *)(data + OTX2_IPSEC_PO_INB_RPTR_HDR);\n+\n+\t\tm_len = rte_be_to_cpu_16(ip->total_length);\n+\n+\t\tm->data_len = m_len;\n+\t\tm->pkt_len = m_len;\n+\t\tm->data_off += OTX2_IPSEC_PO_INB_RPTR_HDR;\n+\t}\n+}\n+\n static inline void\n otx2_cpt_dequeue_post_process(struct otx2_cpt_qp *qp, struct rte_crypto_op *cop,\n \t\t\t uintptr_t *rsp, uint8_t cc)\n {\n \tif (cop->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {\n+\t\tif (cop->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {\n+\t\t\tif (likely(cc == OTX2_IPSEC_PO_CC_SUCCESS)) {\n+\t\t\t\totx2_cpt_sec_post_process(cop, rsp);\n+\t\t\t\tcop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;\n+\t\t\t} else\n+\t\t\t\tcop->status = RTE_CRYPTO_OP_STATUS_ERROR;\n+\n+\t\t\treturn;\n+\t\t}\n+\n \t\tif (likely(cc == NO_ERR)) {\n \t\t\t/* Verify authentication data if required */\n \t\t\tif (unlikely(rsp[2]))\ndiff --git a/drivers/crypto/octeontx2/otx2_ipsec_po.h b/drivers/crypto/octeontx2/otx2_ipsec_po.h\nindex 5acda79749..bafc5c7653 100644\n--- a/drivers/crypto/octeontx2/otx2_ipsec_po.h\n+++ b/drivers/crypto/octeontx2/otx2_ipsec_po.h\n@@ -22,10 +22,40 @@\n #define OTX2_IPSEC_PO_PROCESS_IPSEC_OUTB 0x23\n #define OTX2_IPSEC_PO_PROCESS_IPSEC_INB 0x24\n \n+#define OTX2_IPSEC_PO_INB_RPTR_HDR 0x8\n+\n enum otx2_ipsec_po_comp_e {\n \tOTX2_IPSEC_PO_CC_SUCCESS = 0x00,\n \tOTX2_IPSEC_PO_CC_AUTH_UNSUPPORTED = 0xB0,\n \tOTX2_IPSEC_PO_CC_ENCRYPT_UNSUPPORTED = 0xB1,\n+\tOTX2_IPSEC_PO_CC_IP_VERSION = 0xB2,\n+\tOTX2_IPSEC_PO_CC_PROTOCOL = 0xB3,\n+\tOTX2_IPSEC_PO_CC_CTX_INVALID = 0xB4,\n+\tOTX2_IPSEC_PO_CC_CTX_DIR_MISMATCH = 0xB5,\n+\tOTX2_IPSEC_PO_CC_IP_PAYLOAD_TYPE = 0xB6,\n+\tOTX2_IPSEC_PO_CC_CTX_FLAG_MISMATCH = 0xB7,\n+\tOTX2_IPSEC_PO_CC_GRE_HDR_MISMATCH = 0xB8,\n+\tOTX2_IPSEC_PO_CC_GRE_PROTOCOL = 0xB9,\n+\tOTX2_IPSEC_PO_CC_CUSTOM_HDR_LEN = 0xBA,\n+\tOTX2_IPSEC_PO_CC_ENC_TYPE_CTR_GCM = 0xBB,\n+\tOTX2_IPSEC_PO_CC_IPCOMP_CONF = 0xBC,\n+\tOTX2_IPSEC_PO_CC_FREG_SIZE_CONF = 0xBD,\n+\tOTX2_IPSEC_PO_CC_SPI_MISMATCH = 0xBE,\n+\tOTX2_IPSEC_PO_CC_CHECKSUM = 0xBF,\n+\tOTX2_IPSEC_PO_CC_IPCOMP_PKT_DETECTED = 0xC0,\n+\tOTX2_IPSEC_PO_CC_TFC_PADDING_WITH_PREFRAG = 0xC1,\n+\tOTX2_IPSEC_PO_CC_DSIV_INCORRECT_PARAM = 0xC2,\n+\tOTX2_IPSEC_PO_CC_AUTH_MISMATCH = 0xC3,\n+\tOTX2_IPSEC_PO_CC_PADDING = 0xC4,\n+\tOTX2_IPSEC_PO_CC_DUMMY_PADDING = 0xC5,\n+\tOTX2_IPSEC_PO_CC_IPV6_EXT_HDRS_TOO_BIG = 0xC6,\n+\tOTX2_IPSEC_PO_CC_IPV6_HOP_BY_HOP = 0xC7,\n+\tOTX2_IPSEC_PO_CC_IPV6_RH_LENGTH = 0xC8,\n+\tOTX2_IPSEC_PO_CC_IPV6_OUTB_RH_COPY_ADDR = 0xC9,\n+\tOTX2_IPSEC_PO_CC_IPV6_DEC_RH_SEGS_LEFT = 0xCA,\n+\tOTX2_IPSEC_PO_CC_IPV6_HDR_INVALID = 0xCB,\n+\tOTX2_IPSEC_PO_CC_IPV6_SELECTOR_MATCH = 0xCC,\n+\tOTX2_IPSEC_PO_CC_IPV6_UDP_PAYLOAD_CSUM_MISMATCH = 0xCE,\n };\n \n enum {\n", "prefixes": [ "v2", "9/9" ] }