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GET /api/patches/78141/?format=api
{ "id": 78141, "url": "http://patchwork.dpdk.org/api/patches/78141/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/1600668838-31498-3-git-send-email-humin29@huawei.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1600668838-31498-3-git-send-email-humin29@huawei.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1600668838-31498-3-git-send-email-humin29@huawei.com", "date": "2020-09-21T06:13:57", "name": "[V9,2/3] net/hns3: support FEC", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "c920fa88acdb299edcd38ae778b20750b1f0a263", "submitter": { "id": 1944, "url": "http://patchwork.dpdk.org/api/people/1944/?format=api", "name": "humin (Q)", "email": "humin29@huawei.com" }, "delegate": { "id": 319, "url": "http://patchwork.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/1600668838-31498-3-git-send-email-humin29@huawei.com/mbox/", "series": [ { "id": 12369, "url": "http://patchwork.dpdk.org/api/series/12369/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=12369", "date": "2020-09-21T06:13:56", "name": "add FEC support", "version": 9, "mbox": "http://patchwork.dpdk.org/series/12369/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/78141/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/78141/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id A9009A04B7;\n\tMon, 21 Sep 2020 08:16:47 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 164FF1C0DB;\n\tMon, 21 Sep 2020 08:16:38 +0200 (CEST)", "from huawei.com (szxga07-in.huawei.com [45.249.212.35])\n by dpdk.org (Postfix) with ESMTP id 7EF551D93F\n for <dev@dpdk.org>; Mon, 21 Sep 2020 08:16:34 +0200 (CEST)", "from DGGEMS405-HUB.china.huawei.com (unknown [172.30.72.60])\n by Forcepoint Email with ESMTP id C82EF9E986400E489458;\n Mon, 21 Sep 2020 14:16:32 +0800 (CST)", "from localhost.localdomain (10.69.192.56) by\n DGGEMS405-HUB.china.huawei.com (10.3.19.205) with Microsoft SMTP Server id\n 14.3.487.0; Mon, 21 Sep 2020 14:16:24 +0800" ], "From": "\"Min Hu (Connor)\" <humin29@huawei.com>", "To": "<dev@dpdk.org>", "CC": "<konstantin.ananyev@intel.com>, <thomas@monjalon.net>,\n <arybchenko@solarflare.com>, <ferruh.yigit@intel.com>, <linuxarm@huawei.com>", "Date": "Mon, 21 Sep 2020 14:13:57 +0800", "Message-ID": "<1600668838-31498-3-git-send-email-humin29@huawei.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1600668838-31498-1-git-send-email-humin29@huawei.com>", "References": "<1599534347-20430-1-git-send-email-humin29@huawei.com>\n <1600668838-31498-1-git-send-email-humin29@huawei.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[10.69.192.56]", "X-CFilter-Loop": "Reflected", "Subject": "[dpdk-dev] [PATCH V9 2/3] net/hns3: support FEC", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Forward error correction (FEC) is a bit error correction mode.\nIt adds error correction information to data packets at the\ntransmit end, and uses the error correction information to correct\nthe bit errors generated during data packet transmission at the\nreceive end. This improves signal quality but also brings a delay\nto signals. This function can be enabled or disabled as required.\n\nThis patch adds FEC support for ethdev.Introduce ethdev\noperations which support query and config FEC information in\nhardware.\n\nSigned-off-by: Min Hu (Connor) <humin29@huawei.com>\nReviewed-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>\nReviewed-by: Chengwen Feng <fengchengwen@huawei.com>\nReviewed-by: Chengchang Tang <tangchengchang@huawei.com>\n---\nv7->v8:\nFEC mode order defined in hns3 hardware is inconsistend with\nthat defined in the ethdev library. So the sequence needs\nto be converted.\n\n---\nv5->v6:\nfixed code styles according to DPDK coding style.\nadded _eth prefix.\n\n---\nv4->v5:\nData type for fec_cap is changed from uint8_t\nto uint32_t for possible future expansion.\n\n---\nv2->v3:\nadjust the return value of function.\n\n---\n drivers/net/hns3/hns3_cmd.h | 19 ++++-\n drivers/net/hns3/hns3_ethdev.c | 183 +++++++++++++++++++++++++++++++++++++++++\n drivers/net/hns3/hns3_ethdev.h | 1 +\n 3 files changed, 202 insertions(+), 1 deletion(-)", "diff": "diff --git a/drivers/net/hns3/hns3_cmd.h b/drivers/net/hns3/hns3_cmd.h\nindex d70f42e..8b80353 100644\n--- a/drivers/net/hns3/hns3_cmd.h\n+++ b/drivers/net/hns3/hns3_cmd.h\n@@ -99,6 +99,7 @@ enum hns3_opcode_type {\n \tHNS3_OPC_CONFIG_MAX_FRM_SIZE = 0x0308,\n \tHNS3_OPC_CONFIG_SPEED_DUP = 0x0309,\n \tHNS3_MAC_COMMON_INT_EN = 0x030E,\n+\tHNS3_OPC_CONFIG_FEC_MODE = 0x031A,\n \n \t/* PFC/Pause commands */\n \tHNS3_OPC_CFG_MAC_PAUSE_EN = 0x0701,\n@@ -653,9 +654,25 @@ struct hns3_config_auto_neg_cmd {\n \tuint8_t rsv[20];\n };\n \n+#define HNS3_MAC_CFG_FEC_AUTO_EN_B\t0\n+#define HNS3_MAC_CFG_FEC_MODE_S\t\t1\n+#define HNS3_MAC_CFG_FEC_MODE_M\tGENMASK(3, 1)\n+#define HNS3_MAC_FEC_OFF\t\t0\n+#define HNS3_MAC_FEC_BASER\t\t1\n+#define HNS3_MAC_FEC_RS\t\t\t2\n+\n struct hns3_sfp_speed_cmd {\n \tuint32_t sfp_speed;\n-\tuint32_t rsv[5];\n+\tuint8_t query_type; /* 0: sfp speed, 1: active fec */\n+\tuint8_t active_fec; /* current FEC mode */\n+\tuint16_t rsv1;\n+\tuint32_t rsv2[4];\n+};\n+\n+/* Configure FEC mode, opcode:0x031A */\n+struct hns3_config_fec_cmd {\n+\tuint8_t fec_mode;\n+\tuint8_t rsv[23];\n };\n \n #define HNS3_MAC_MGR_MASK_VLAN_B\t\tBIT(0)\ndiff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c\nindex 81e7730..3fc2525 100644\n--- a/drivers/net/hns3/hns3_ethdev.c\n+++ b/drivers/net/hns3/hns3_ethdev.c\n@@ -60,6 +60,11 @@\n #define HNS3_RESET_WAIT_MS\t100\n #define HNS3_RESET_WAIT_CNT\t200\n \n+/* FEC mode order defined in HNS3 hardware */\n+#define HNS3_HW_FEC_MODE_NOFEC 0\n+#define HNS3_HW_FEC_MODE_BASER 1\n+#define HNS3_HW_FEC_MODE_RS 2\n+\n enum hns3_evt_cause {\n \tHNS3_VECTOR0_EVENT_RST,\n \tHNS3_VECTOR0_EVENT_MBX,\n@@ -78,6 +83,8 @@ static int hns3_add_mc_addr(struct hns3_hw *hw,\n \t\t\t struct rte_ether_addr *mac_addr);\n static int hns3_remove_mc_addr(struct hns3_hw *hw,\n \t\t\t struct rte_ether_addr *mac_addr);\n+static int hns3_restore_fec(struct hns3_hw *hw);\n+static int hns3_query_dev_fec_info(struct rte_eth_dev *dev);\n \n static void\n hns3_pf_disable_irq0(struct hns3_hw *hw)\n@@ -2819,6 +2826,13 @@ hns3_get_capability(struct hns3_hw *hw)\n \t device_id == HNS3_DEV_ID_200G_RDMA)\n \t\thns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_DCB_B, 1);\n \n+\tret = hns3_query_dev_fec_info(eth_dev);\n+\tif (ret) {\n+\t\tPMD_INIT_LOG(ERR,\n+\t\t\t \"failed to query FEC information, ret = %d\", ret);\n+\t\treturn ret;\n+\t}\n+\n \t/* Get PCI revision id */\n \tret = rte_pci_read_config(pci_dev, &revision, HNS3_PCI_REVISION_ID_LEN,\n \t\t\t\t HNS3_PCI_REVISION_ID);\n@@ -5311,6 +5325,10 @@ hns3_restore_conf(struct hns3_adapter *hns)\n \tif (ret)\n \t\tgoto err_promisc;\n \n+\tret = hns3_restore_fec(hw);\n+\tif (ret)\n+\t\tgoto err_promisc;\n+\n \tif (hns->hw.adapter_state == HNS3_NIC_STARTED) {\n \t\tret = hns3_do_start(hns, false);\n \t\tif (ret)\n@@ -5389,6 +5407,168 @@ hns3_reset_service(void *param)\n \t\thns3_msix_process(hns, reset_level);\n }\n \n+static int\n+hns3_fec_get_capability(struct rte_eth_dev *dev, uint32_t *fec_cap)\n+{\n+\tstruct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tstruct hns3_mac *mac = &hw->mac;\n+\tuint32_t mode;\n+\n+\tswitch (mac->link_speed) {\n+\tcase ETH_SPEED_NUM_10G:\n+\tcase ETH_SPEED_NUM_40G:\n+\t\tmode = RTE_ETH_FEC_CAPA_NOFEC | RTE_ETH_FEC_CAPA_BASER |\n+\t\t\tRTE_ETH_FEC_CAPA_AUTO;\n+\t\tbreak;\n+\tcase ETH_SPEED_NUM_25G:\n+\tcase ETH_SPEED_NUM_50G:\n+\t\tmode = RTE_ETH_FEC_CAPA_NOFEC | RTE_ETH_FEC_CAPA_BASER |\n+\t\t\tRTE_ETH_FEC_CAPA_RS | RTE_ETH_FEC_CAPA_AUTO;\n+\t\tbreak;\n+\tcase ETH_SPEED_NUM_100G:\n+\tcase ETH_SPEED_NUM_200G:\n+\t\tmode = RTE_ETH_FEC_CAPA_NOFEC | RTE_ETH_FEC_CAPA_RS |\n+\t\t\tRTE_ETH_FEC_CAPA_AUTO;\n+\t\tbreak;\n+\tdefault:\n+\t\tmode = 0;\n+\t\tbreak;\n+\t}\n+\n+\t*fec_cap = mode;\n+\treturn 0;\n+}\n+\n+static int\n+hns3_fec_get(struct rte_eth_dev *dev, enum rte_eth_fec_mode *mode)\n+{\n+#define QUERY_ACTIVE_SPEED\t1\n+\tstruct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tstruct hns3_sfp_speed_cmd *resp;\n+\tenum rte_eth_fec_mode tmp_mode;\n+\tstruct hns3_cmd_desc desc;\n+\tint ret;\n+\n+\thns3_cmd_setup_basic_desc(&desc, HNS3_OPC_SFP_GET_SPEED, true);\n+\tresp = (struct hns3_sfp_speed_cmd *)desc.data;\n+\tresp->query_type = QUERY_ACTIVE_SPEED;\n+\n+\tret = hns3_cmd_send(hw, &desc, 1);\n+\tif (ret == -EOPNOTSUPP) {\n+\t\thns3_err(hw, \"IMP do not support get FEC, ret = %d\", ret);\n+\t\treturn ret;\n+\t} else if (ret) {\n+\t\thns3_err(hw, \"get FEC failed, ret = %d\", ret);\n+\t\treturn ret;\n+\t}\n+\n+\t/*\n+\t * FEC mode order defined in hns3 hardware is inconsistend with\n+\t * that defined in the ethdev library. So the sequence needs\n+\t * to be converted.\n+\t */\n+\tswitch (resp->active_fec) {\n+\tcase HNS3_HW_FEC_MODE_NOFEC:\n+\t\ttmp_mode = RTE_ETH_FEC_NOFEC;\n+\t\tbreak;\n+\tcase HNS3_HW_FEC_MODE_BASER:\n+\t\ttmp_mode = RTE_ETH_FEC_BASER;\n+\t\tbreak;\n+\tcase HNS3_HW_FEC_MODE_RS:\n+\t\ttmp_mode = RTE_ETH_FEC_RS;\n+\t\tbreak;\n+\tdefault:\n+\t\ttmp_mode = RTE_ETH_FEC_NOFEC;\n+\t\tbreak;\n+\t}\n+\n+\t*mode = tmp_mode;\n+\treturn 0;\n+}\n+\n+static int\n+hns3_set_fec_hw(struct hns3_hw *hw, enum rte_eth_fec_mode mode)\n+{\n+\tstruct hns3_config_fec_cmd *req;\n+\tstruct hns3_cmd_desc desc;\n+\tint ret;\n+\n+\thns3_cmd_setup_basic_desc(&desc, HNS3_OPC_CONFIG_FEC_MODE, false);\n+\n+\treq = (struct hns3_config_fec_cmd *)desc.data;\n+\tswitch (mode) {\n+\tcase RTE_ETH_FEC_NOFEC:\n+\t\thns3_set_field(req->fec_mode, HNS3_MAC_CFG_FEC_MODE_M,\n+\t\t\t\tHNS3_MAC_CFG_FEC_MODE_S, HNS3_MAC_FEC_OFF);\n+\t\tbreak;\n+\tcase RTE_ETH_FEC_BASER:\n+\t\thns3_set_field(req->fec_mode, HNS3_MAC_CFG_FEC_MODE_M,\n+\t\t\t\tHNS3_MAC_CFG_FEC_MODE_S, HNS3_MAC_FEC_BASER);\n+\t\tbreak;\n+\tcase RTE_ETH_FEC_RS:\n+\t\thns3_set_field(req->fec_mode, HNS3_MAC_CFG_FEC_MODE_M,\n+\t\t\t\tHNS3_MAC_CFG_FEC_MODE_S, HNS3_MAC_FEC_RS);\n+\t\tbreak;\n+\tcase RTE_ETH_FEC_AUTO:\n+\t\thns3_set_bit(req->fec_mode, HNS3_MAC_CFG_FEC_AUTO_EN_B, 1);\n+\t\tbreak;\n+\tdefault:\n+\t\treturn 0;\n+\t}\n+\tret = hns3_cmd_send(hw, &desc, 1);\n+\tif (ret)\n+\t\thns3_err(hw, \"set fec mode failed, ret = %d\", ret);\n+\n+\treturn ret;\n+}\n+\n+static int\n+hns3_fec_set(struct rte_eth_dev *dev, enum rte_eth_fec_mode mode)\n+{\n+\tstruct hns3_adapter *hns = dev->data->dev_private;\n+\tstruct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(hns);\n+\tstruct hns3_pf *pf = &hns->pf;\n+\tint ret;\n+\n+\tret = hns3_set_fec_hw(hw, mode);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\tpf->fec_mode = mode;\n+\treturn 0;\n+}\n+\n+static int\n+hns3_restore_fec(struct hns3_hw *hw)\n+{\n+\tstruct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);\n+\tstruct hns3_pf *pf = &hns->pf;\n+\tenum rte_eth_fec_mode mode = pf->fec_mode;\n+\tint ret;\n+\n+\tret = hns3_set_fec_hw(hw, mode);\n+\tif (ret)\n+\t\thns3_err(hw, \"restore fec mode(%d) failed, ret = %d\",\n+\t\t\t mode, ret);\n+\n+\treturn ret;\n+}\n+\n+static int\n+hns3_query_dev_fec_info(struct rte_eth_dev *dev)\n+{\n+\tstruct hns3_adapter *hns = dev->data->dev_private;\n+\tstruct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(hns);\n+\tstruct hns3_pf *pf = &hns->pf;\n+\tint ret;\n+\n+\tret = hns3_fec_get(dev, &pf->fec_mode);\n+\tif (ret)\n+\t\thns3_err(hw, \"query device FEC info failed, ret = %d\", ret);\n+\n+\treturn ret;\n+}\n+\n static const struct eth_dev_ops hns3_eth_dev_ops = {\n \t.dev_start = hns3_dev_start,\n \t.dev_stop = hns3_dev_stop,\n@@ -5434,6 +5614,9 @@ static const struct eth_dev_ops hns3_eth_dev_ops = {\n \t.get_reg = hns3_get_regs,\n \t.get_dcb_info = hns3_get_dcb_info,\n \t.dev_supported_ptypes_get = hns3_dev_supported_ptypes_get,\n+\t.fec_get_capability = hns3_fec_get_capability,\n+\t.fec_get = hns3_fec_get,\n+\t.fec_set = hns3_fec_set,\n };\n \n static const struct hns3_reset_ops hns3_reset_ops = {\ndiff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h\nindex 0e665e5..2435668 100644\n--- a/drivers/net/hns3/hns3_ethdev.h\n+++ b/drivers/net/hns3/hns3_ethdev.h\n@@ -510,6 +510,7 @@ struct hns3_pf {\n \tstruct hns3_err_msix_intr_stats abn_int_stats;\n \n \tbool support_sfp_query;\n+\tenum rte_eth_fec_mode fec_mode; /* current FEC mode for ethdev */\n \n \tstruct hns3_vtag_cfg vtag_config;\n \tLIST_HEAD(vlan_tbl, hns3_user_vlan_table) vlan_list;\n", "prefixes": [ "V9", "2/3" ] }