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GET /api/patches/79512/?format=api
{ "id": 79512, "url": "http://patchwork.dpdk.org/api/patches/79512/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20201002000711.41511-2-honnappa.nagarahalli@arm.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20201002000711.41511-2-honnappa.nagarahalli@arm.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20201002000711.41511-2-honnappa.nagarahalli@arm.com", "date": "2020-10-02T00:07:11", "name": "[2/2] lib/ethdev: fix memory ordering for call back functions", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "cbc84707ebb5a37297bd029f768d3939e83055ec", "submitter": { "id": 1045, "url": "http://patchwork.dpdk.org/api/people/1045/?format=api", "name": "Honnappa Nagarahalli", "email": "honnappa.nagarahalli@arm.com" }, "delegate": { "id": 319, "url": "http://patchwork.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20201002000711.41511-2-honnappa.nagarahalli@arm.com/mbox/", "series": [ { "id": 12658, "url": "http://patchwork.dpdk.org/api/series/12658/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=12658", "date": "2020-10-02T00:07:10", "name": "[1/2] lib/ethdev: replace full barrier with relaxed barrier", "version": 1, "mbox": "http://patchwork.dpdk.org/series/12658/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/79512/comments/", "check": "warning", "checks": "http://patchwork.dpdk.org/api/patches/79512/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 87389A04BA;\n\tFri, 2 Oct 2020 02:07:56 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id C7C041D66E;\n\tFri, 2 Oct 2020 02:07:44 +0200 (CEST)", "from foss.arm.com (foss.arm.com [217.140.110.172])\n by dpdk.org (Postfix) with ESMTP id 0E6E11D65E;\n Fri, 2 Oct 2020 02:07:42 +0200 (CEST)", "from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14])\n by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 787E91063;\n Thu, 1 Oct 2020 17:07:40 -0700 (PDT)", "from qc2400f-1.austin.arm.com (qc2400f-1.austin.arm.com\n [10.118.12.27])\n by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 63A5B3F6CF;\n Thu, 1 Oct 2020 17:07:40 -0700 (PDT)" ], "From": "Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>", "To": "dev@dpdk.org, honnappa.nagarahalli@arm.com, phil.yang@arm.com,\n thomas@monjalon.net, arybchenko@solarflare.com, ferruh.yigit@intel.com", "Cc": "abhinandan.gujjar@intel.com, nd@arm.com, bruce.richardson@intel.com,\n john.mcnamara@intel.com, reshma.pattan@intel.com, stable@dpdk.org", "Date": "Thu, 1 Oct 2020 19:07:11 -0500", "Message-Id": "<20201002000711.41511-2-honnappa.nagarahalli@arm.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20201002000711.41511-1-honnappa.nagarahalli@arm.com>", "References": "<20201002000711.41511-1-honnappa.nagarahalli@arm.com>", "Subject": "[dpdk-dev] [PATCH 2/2] lib/ethdev: fix memory ordering for call\n\tback functions", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Call back functions are registered on the control plane. They\nare accessed from the data plane. Hence, correct memory orderings\nshould be used to avoid race conditions.\n\nFixes: 4dc294158cac (\"ethdev: support optional Rx and Tx callbacks\")\nFixes: c8231c63ddcb (\"ethdev: insert Rx callback as head of list\")\nCc: bruce.richardson@intel.com\nCc: john.mcnamara@intel.com\nCc: reshma.pattan@intel.com\nCc: stable@dpdk.org\n\nSigned-off-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>\nReviewed-by: Ola Liljedahl <ola.liljedahl@arm.com>\n---\n lib/librte_ethdev/rte_ethdev.c | 28 +++++++++++++++++++++------\n lib/librte_ethdev/rte_ethdev.h | 35 ++++++++++++++++++++++++++--------\n 2 files changed, 49 insertions(+), 14 deletions(-)", "diff": "diff --git a/lib/librte_ethdev/rte_ethdev.c b/lib/librte_ethdev/rte_ethdev.c\nindex 59a41c07f..d89fcdc77 100644\n--- a/lib/librte_ethdev/rte_ethdev.c\n+++ b/lib/librte_ethdev/rte_ethdev.c\n@@ -4486,12 +4486,20 @@ rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,\n \t\trte_eth_devices[port_id].post_rx_burst_cbs[queue_id];\n \n \tif (!tail) {\n-\t\trte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;\n+\t\t/* Stores to cb->fn and cb->param should complete before\n+\t\t * cb is visible to data plane.\n+\t\t */\n+\t\t__atomic_store_n(\n+\t\t\t&rte_eth_devices[port_id].post_rx_burst_cbs[queue_id],\n+\t\t\tcb, __ATOMIC_RELEASE);\n \n \t} else {\n \t\twhile (tail->next)\n \t\t\ttail = tail->next;\n-\t\ttail->next = cb;\n+\t\t/* Stores to cb->fn and cb->param should complete before\n+\t\t * cb is visible to data plane.\n+\t\t */\n+\t\t__atomic_store_n(&tail->next, cb, __ATOMIC_RELEASE);\n \t}\n \trte_spinlock_unlock(&rte_eth_rx_cb_lock);\n \n@@ -4576,12 +4584,20 @@ rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,\n \t\trte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];\n \n \tif (!tail) {\n-\t\trte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;\n+\t\t/* Stores to cb->fn and cb->param should complete before\n+\t\t * cb is visible to data plane.\n+\t\t */\n+\t\t__atomic_store_n(\n+\t\t\t&rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id],\n+\t\t\tcb, __ATOMIC_RELEASE);\n \n \t} else {\n \t\twhile (tail->next)\n \t\t\ttail = tail->next;\n-\t\ttail->next = cb;\n+\t\t/* Stores to cb->fn and cb->param should complete before\n+\t\t * cb is visible to data plane.\n+\t\t */\n+\t\t__atomic_store_n(&tail->next, cb, __ATOMIC_RELEASE);\n \t}\n \trte_spinlock_unlock(&rte_eth_tx_cb_lock);\n \n@@ -4612,7 +4628,7 @@ rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,\n \t\tcb = *prev_cb;\n \t\tif (cb == user_cb) {\n \t\t\t/* Remove the user cb from the callback list. */\n-\t\t\t*prev_cb = cb->next;\n+\t\t\t__atomic_store_n(prev_cb, cb->next, __ATOMIC_RELAXED);\n \t\t\tret = 0;\n \t\t\tbreak;\n \t\t}\n@@ -4646,7 +4662,7 @@ rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,\n \t\tcb = *prev_cb;\n \t\tif (cb == user_cb) {\n \t\t\t/* Remove the user cb from the callback list. */\n-\t\t\t*prev_cb = cb->next;\n+\t\t\t__atomic_store_n(prev_cb, cb->next, __ATOMIC_RELAXED);\n \t\t\tret = 0;\n \t\t\tbreak;\n \t\t}\ndiff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h\nindex 70295d7ab..d810e3e38 100644\n--- a/lib/librte_ethdev/rte_ethdev.h\n+++ b/lib/librte_ethdev/rte_ethdev.h\n@@ -3734,7 +3734,8 @@ struct rte_eth_rxtx_callback;\n * The callback function\n * @param user_param\n * A generic pointer parameter which will be passed to each invocation of the\n- * callback function on this port and queue.\n+ * callback function on this port and queue. Inter-thread synchronization\n+ * of any user data changes is the responsibility of the user.\n *\n * @return\n * NULL on error.\n@@ -3763,7 +3764,8 @@ rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,\n * The callback function\n * @param user_param\n * A generic pointer parameter which will be passed to each invocation of the\n- * callback function on this port and queue.\n+ * callback function on this port and queue. Inter-thread synchronization\n+ * of any user data changes is the responsibility of the user.\n *\n * @return\n * NULL on error.\n@@ -3791,7 +3793,8 @@ rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,\n * The callback function\n * @param user_param\n * A generic pointer parameter which will be passed to each invocation of the\n- * callback function on this port and queue.\n+ * callback function on this port and queue. Inter-thread synchronization\n+ * of any user data changes is the responsibility of the user.\n *\n * @return\n * NULL on error.\n@@ -3816,7 +3819,9 @@ rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,\n * on that queue.\n *\n * - After a short delay - where the delay is sufficient to allow any\n- * in-flight callbacks to complete.\n+ * in-flight callbacks to complete. Alternately, the RCU mechanism can be\n+ * used to detect when data plane threads have ceased referencing the\n+ * callback memory.\n *\n * @param port_id\n * The port identifier of the Ethernet device.\n@@ -3849,7 +3854,9 @@ int rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,\n * on that queue.\n *\n * - After a short delay - where the delay is sufficient to allow any\n- * in-flight callbacks to complete.\n+ * in-flight callbacks to complete. Alternately, the RCU mechanism can be\n+ * used to detect when data plane threads have ceased referencing the\n+ * callback memory.\n *\n * @param port_id\n * The port identifier of the Ethernet device.\n@@ -4510,10 +4517,16 @@ rte_eth_rx_burst(uint16_t port_id, uint16_t queue_id,\n \t\t\t\t rx_pkts, nb_pkts);\n \n #ifdef RTE_ETHDEV_RXTX_CALLBACKS\n-\tif (unlikely(dev->post_rx_burst_cbs[queue_id] != NULL)) {\n-\t\tstruct rte_eth_rxtx_callback *cb =\n-\t\t\t\tdev->post_rx_burst_cbs[queue_id];\n+\t/* __ATOMIC_RELEASE memory order was used when the\n+\t * call back was inserted into the list.\n+\t * Since there is a clear dependency between loading\n+\t * cb and cb->fn/cb->next, __ATOMIC_ACQUIRE memory order is\n+\t * not required.\n+\t */\n+\tstruct rte_eth_rxtx_callback *cb =\n+\t\t\tdev->post_rx_burst_cbs[queue_id];\n \n+\tif (unlikely(cb != NULL)) {\n \t\tdo {\n \t\t\tnb_rx = cb->fn.rx(port_id, queue_id, rx_pkts, nb_rx,\n \t\t\t\t\t\tnb_pkts, cb->param);\n@@ -4775,6 +4788,12 @@ rte_eth_tx_burst(uint16_t port_id, uint16_t queue_id,\n #endif\n \n #ifdef RTE_ETHDEV_RXTX_CALLBACKS\n+\t/* __ATOMIC_RELEASE memory order was used when the\n+\t * call back was inserted into the list.\n+\t * Since there is a clear dependency between loading\n+\t * cb and cb->fn/cb->next, __ATOMIC_ACQUIRE memory order is\n+\t * not required.\n+\t */\n \tstruct rte_eth_rxtx_callback *cb = dev->pre_tx_burst_cbs[queue_id];\n \n \tif (unlikely(cb != NULL)) {\n", "prefixes": [ "2/2" ] }