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GET /api/patches/80012/?format=api
{ "id": 80012, "url": "http://patchwork.dpdk.org/api/patches/80012/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20201008095133.123014-12-bruce.richardson@intel.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20201008095133.123014-12-bruce.richardson@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20201008095133.123014-12-bruce.richardson@intel.com", "date": "2020-10-08T09:51:19", "name": "[v6,11/25] raw/ioat: add skeleton for VFIO/UIO based DSA device", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "f19c20566e6278334c83dc4d4346c599c1ca434b", "submitter": { "id": 20, "url": "http://patchwork.dpdk.org/api/people/20/?format=api", "name": "Bruce Richardson", "email": "bruce.richardson@intel.com" }, "delegate": { "id": 1, "url": "http://patchwork.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20201008095133.123014-12-bruce.richardson@intel.com/mbox/", "series": [ { "id": 12773, "url": "http://patchwork.dpdk.org/api/series/12773/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=12773", "date": "2020-10-08T09:51:08", "name": "raw/ioat: enhancements and new hardware support", "version": 6, "mbox": "http://patchwork.dpdk.org/series/12773/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/80012/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/80012/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id D0CB6A04BC;\n\tThu, 8 Oct 2020 11:55:30 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 662821BED3;\n\tThu, 8 Oct 2020 11:52:06 +0200 (CEST)", "from mga02.intel.com (mga02.intel.com [134.134.136.20])\n by dpdk.org (Postfix) with ESMTP id 798351BD67\n for <dev@dpdk.org>; Thu, 8 Oct 2020 11:52:02 +0200 (CEST)", "from orsmga008.jf.intel.com ([10.7.209.65])\n by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 08 Oct 2020 02:52:02 -0700", "from silpixa00399126.ir.intel.com ([10.237.222.4])\n by orsmga008.jf.intel.com with ESMTP; 08 Oct 2020 02:52:00 -0700" ], "IronPort-SDR": [ "\n R/RnV69DkiMCDn3SBVzzmUq9V3X6ogUFUseUVALIyY1zXb0TmELzIap5wLw5IE2/eMyGZ8iKHL\n wda0aWjzGO+A==", "\n 4kvz5WEe7a8PNgs2MkAC3+If7xIF4OrDZKx959DzzmzrcHd4qH4MH7xuQr8PI18ms6MtGtW1ip\n D+8Z6VBhaAMA==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9767\"; a=\"152226379\"", "E=Sophos;i=\"5.77,350,1596524400\"; d=\"scan'208\";a=\"152226379\"", "E=Sophos;i=\"5.77,350,1596524400\"; d=\"scan'208\";a=\"344686676\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Bruce Richardson <bruce.richardson@intel.com>", "To": "dev@dpdk.org", "Cc": "patrick.fu@intel.com, thomas@monjalon.net,\n Bruce Richardson <bruce.richardson@intel.com>,\n Kevin Laatz <kevin.laatz@intel.com>, Radu Nicolau <radu.nicolau@intel.com>", "Date": "Thu, 8 Oct 2020 10:51:19 +0100", "Message-Id": "<20201008095133.123014-12-bruce.richardson@intel.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20201008095133.123014-1-bruce.richardson@intel.com>", "References": "<20200721095140.719297-1-bruce.richardson@intel.com>\n <20201008095133.123014-1-bruce.richardson@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v6 11/25] raw/ioat: add skeleton for VFIO/UIO\n\tbased DSA device", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add in the basic probe/remove skeleton code for DSA devices which are bound\ndirectly to vfio or uio driver. The kernel module for supporting these uses\nthe \"idxd\" name, so that name is used as function and file prefix to avoid\nconflict with existing \"ioat\" prefixed functions.\n\nSince we are adding new files to the driver and there will be common\ndefinitions shared between the various files, we create a new internal\nheader file ioat_private.h to hold common macros and function prototypes.\n\nSigned-off-by: Bruce Richardson <bruce.richardson@intel.com>\nReviewed-by: Kevin Laatz <kevin.laatz@intel.com>\nAcked-by: Radu Nicolau <radu.nicolau@intel.com>\n---\n doc/guides/rawdevs/ioat.rst | 69 ++++++++++-----------------------\n drivers/raw/ioat/idxd_pci.c | 56 ++++++++++++++++++++++++++\n drivers/raw/ioat/ioat_private.h | 27 +++++++++++++\n drivers/raw/ioat/ioat_rawdev.c | 9 +----\n drivers/raw/ioat/meson.build | 6 ++-\n 5 files changed, 108 insertions(+), 59 deletions(-)\n create mode 100644 drivers/raw/ioat/idxd_pci.c\n create mode 100644 drivers/raw/ioat/ioat_private.h", "diff": "diff --git a/doc/guides/rawdevs/ioat.rst b/doc/guides/rawdevs/ioat.rst\nindex 71bca0b28..b898f98d5 100644\n--- a/doc/guides/rawdevs/ioat.rst\n+++ b/doc/guides/rawdevs/ioat.rst\n@@ -3,10 +3,12 @@\n \n .. include:: <isonum.txt>\n \n-IOAT Rawdev Driver for Intel\\ |reg| QuickData Technology\n-======================================================================\n+IOAT Rawdev Driver\n+===================\n \n The ``ioat`` rawdev driver provides a poll-mode driver (PMD) for Intel\\ |reg|\n+Data Streaming Accelerator `(Intel DSA)\n+<https://01.org/blogs/2019/introducing-intel-data-streaming-accelerator>`_ and for Intel\\ |reg|\n QuickData Technology, part of Intel\\ |reg| I/O Acceleration Technology\n `(Intel I/OAT)\n <https://www.intel.com/content/www/us/en/wireless-network/accel-technology.html>`_.\n@@ -17,61 +19,30 @@ be done by software, freeing up CPU cycles for other tasks.\n Hardware Requirements\n ----------------------\n \n-On Linux, the presence of an Intel\\ |reg| QuickData Technology hardware can\n-be detected by checking the output of the ``lspci`` command, where the\n-hardware will be often listed as \"Crystal Beach DMA\" or \"CBDMA\". For\n-example, on a system with Intel\\ |reg| Xeon\\ |reg| CPU E5-2699 v4 @2.20GHz,\n-lspci shows:\n-\n-.. code-block:: console\n-\n- # lspci | grep DMA\n- 00:04.0 System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Crystal Beach DMA Channel 0 (rev 01)\n- 00:04.1 System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Crystal Beach DMA Channel 1 (rev 01)\n- 00:04.2 System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Crystal Beach DMA Channel 2 (rev 01)\n- 00:04.3 System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Crystal Beach DMA Channel 3 (rev 01)\n- 00:04.4 System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Crystal Beach DMA Channel 4 (rev 01)\n- 00:04.5 System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Crystal Beach DMA Channel 5 (rev 01)\n- 00:04.6 System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Crystal Beach DMA Channel 6 (rev 01)\n- 00:04.7 System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Crystal Beach DMA Channel 7 (rev 01)\n-\n-On a system with Intel\\ |reg| Xeon\\ |reg| Gold 6154 CPU @ 3.00GHz, lspci\n-shows:\n-\n-.. code-block:: console\n-\n- # lspci | grep DMA\n- 00:04.0 System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)\n- 00:04.1 System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)\n- 00:04.2 System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)\n- 00:04.3 System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)\n- 00:04.4 System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)\n- 00:04.5 System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)\n- 00:04.6 System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)\n- 00:04.7 System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)\n-\n+The ``dpdk-devbind.py`` script, included with DPDK,\n+can be used to show the presence of supported hardware.\n+Running ``dpdk-devbind.py --status-dev misc`` will show all the miscellaneous,\n+or rawdev-based devices on the system.\n+For Intel\\ |reg| QuickData Technology devices, the hardware will be often listed as \"Crystal Beach DMA\",\n+or \"CBDMA\".\n+For Intel\\ |reg| DSA devices, they are currently (at time of writing) appearing as devices with type \"0b25\",\n+due to the absence of pci-id database entries for them at this point.\n \n Compilation\n ------------\n \n-For builds done with ``make``, the driver compilation is enabled by the\n-``CONFIG_RTE_LIBRTE_PMD_IOAT_RAWDEV`` build configuration option. This is\n-enabled by default in builds for x86 platforms, and disabled in other\n-configurations.\n-\n-For builds using ``meson`` and ``ninja``, the driver will be built when the\n-target platform is x86-based.\n+For builds using ``meson`` and ``ninja``, the driver will be built when the target platform is x86-based.\n+No additional compilation steps are necessary.\n \n Device Setup\n -------------\n \n-The Intel\\ |reg| QuickData Technology HW devices will need to be bound to a\n-user-space IO driver for use. The script ``dpdk-devbind.py`` script\n-included with DPDK can be used to view the state of the devices and to bind\n-them to a suitable DPDK-supported kernel driver. When querying the status\n-of the devices, they will appear under the category of \"Misc (rawdev)\n-devices\", i.e. the command ``dpdk-devbind.py --status-dev misc`` can be\n-used to see the state of those devices alone.\n+The HW devices to be used will need to be bound to a user-space IO driver for use.\n+The ``dpdk-devbind.py`` script can be used to view the state of the devices\n+and to bind them to a suitable DPDK-supported kernel driver, such as ``vfio-pci``.\n+For example::\n+\n+\t$ dpdk-devbind.py -b vfio-pci 00:04.0 00:04.1\n \n Device Probing and Initialization\n ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\ndiff --git a/drivers/raw/ioat/idxd_pci.c b/drivers/raw/ioat/idxd_pci.c\nnew file mode 100644\nindex 000000000..1a30e9c31\n--- /dev/null\n+++ b/drivers/raw/ioat/idxd_pci.c\n@@ -0,0 +1,56 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2020 Intel Corporation\n+ */\n+\n+#include <rte_bus_pci.h>\n+\n+#include \"ioat_private.h\"\n+\n+#define IDXD_VENDOR_ID\t\t0x8086\n+#define IDXD_DEVICE_ID_SPR\t0x0B25\n+\n+#define IDXD_PMD_RAWDEV_NAME_PCI rawdev_idxd_pci\n+\n+const struct rte_pci_id pci_id_idxd_map[] = {\n+\t{ RTE_PCI_DEVICE(IDXD_VENDOR_ID, IDXD_DEVICE_ID_SPR) },\n+\t{ .vendor_id = 0, /* sentinel */ },\n+};\n+\n+static int\n+idxd_rawdev_probe_pci(struct rte_pci_driver *drv, struct rte_pci_device *dev)\n+{\n+\tint ret = 0;\n+\tchar name[PCI_PRI_STR_SIZE];\n+\n+\trte_pci_device_name(&dev->addr, name, sizeof(name));\n+\tIOAT_PMD_INFO(\"Init %s on NUMA node %d\", name, dev->device.numa_node);\n+\tdev->device.driver = &drv->driver;\n+\n+\treturn ret;\n+}\n+\n+static int\n+idxd_rawdev_remove_pci(struct rte_pci_device *dev)\n+{\n+\tchar name[PCI_PRI_STR_SIZE];\n+\tint ret = 0;\n+\n+\trte_pci_device_name(&dev->addr, name, sizeof(name));\n+\n+\tIOAT_PMD_INFO(\"Closing %s on NUMA node %d\",\n+\t\t\tname, dev->device.numa_node);\n+\n+\treturn ret;\n+}\n+\n+struct rte_pci_driver idxd_pmd_drv_pci = {\n+\t.id_table = pci_id_idxd_map,\n+\t.drv_flags = RTE_PCI_DRV_NEED_MAPPING,\n+\t.probe = idxd_rawdev_probe_pci,\n+\t.remove = idxd_rawdev_remove_pci,\n+};\n+\n+RTE_PMD_REGISTER_PCI(IDXD_PMD_RAWDEV_NAME_PCI, idxd_pmd_drv_pci);\n+RTE_PMD_REGISTER_PCI_TABLE(IDXD_PMD_RAWDEV_NAME_PCI, pci_id_idxd_map);\n+RTE_PMD_REGISTER_KMOD_DEP(IDXD_PMD_RAWDEV_NAME_PCI,\n+\t\t\t \"* igb_uio | uio_pci_generic | vfio-pci\");\ndiff --git a/drivers/raw/ioat/ioat_private.h b/drivers/raw/ioat/ioat_private.h\nnew file mode 100644\nindex 000000000..d87d4d055\n--- /dev/null\n+++ b/drivers/raw/ioat/ioat_private.h\n@@ -0,0 +1,27 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2020 Intel Corporation\n+ */\n+\n+#ifndef _IOAT_PRIVATE_H_\n+#define _IOAT_PRIVATE_H_\n+\n+/**\n+ * @file idxd_private.h\n+ *\n+ * Private data structures for the idxd/DSA part of ioat device driver\n+ *\n+ * @warning\n+ * @b EXPERIMENTAL: these structures and APIs may change without prior notice\n+ */\n+\n+extern int ioat_pmd_logtype;\n+\n+#define IOAT_PMD_LOG(level, fmt, args...) rte_log(RTE_LOG_ ## level, \\\n+\t\tioat_pmd_logtype, \"%s(): \" fmt \"\\n\", __func__, ##args)\n+\n+#define IOAT_PMD_DEBUG(fmt, args...) IOAT_PMD_LOG(DEBUG, fmt, ## args)\n+#define IOAT_PMD_INFO(fmt, args...) IOAT_PMD_LOG(INFO, fmt, ## args)\n+#define IOAT_PMD_ERR(fmt, args...) IOAT_PMD_LOG(ERR, fmt, ## args)\n+#define IOAT_PMD_WARN(fmt, args...) IOAT_PMD_LOG(WARNING, fmt, ## args)\n+\n+#endif /* _IOAT_PRIVATE_H_ */\ndiff --git a/drivers/raw/ioat/ioat_rawdev.c b/drivers/raw/ioat/ioat_rawdev.c\nindex aa59b731f..1fe32278d 100644\n--- a/drivers/raw/ioat/ioat_rawdev.c\n+++ b/drivers/raw/ioat/ioat_rawdev.c\n@@ -10,6 +10,7 @@\n \n #include \"rte_ioat_rawdev.h\"\n #include \"ioat_spec.h\"\n+#include \"ioat_private.h\"\n \n static struct rte_pci_driver ioat_pmd_drv;\n \n@@ -29,14 +30,6 @@ static struct rte_pci_driver ioat_pmd_drv;\n \n RTE_LOG_REGISTER(ioat_pmd_logtype, rawdev.ioat, INFO);\n \n-#define IOAT_PMD_LOG(level, fmt, args...) rte_log(RTE_LOG_ ## level, \\\n-\tioat_pmd_logtype, \"%s(): \" fmt \"\\n\", __func__, ##args)\n-\n-#define IOAT_PMD_DEBUG(fmt, args...) IOAT_PMD_LOG(DEBUG, fmt, ## args)\n-#define IOAT_PMD_INFO(fmt, args...) IOAT_PMD_LOG(INFO, fmt, ## args)\n-#define IOAT_PMD_ERR(fmt, args...) IOAT_PMD_LOG(ERR, fmt, ## args)\n-#define IOAT_PMD_WARN(fmt, args...) IOAT_PMD_LOG(WARNING, fmt, ## args)\n-\n #define DESC_SZ sizeof(struct rte_ioat_generic_hw_desc)\n #define COMPLETION_SZ sizeof(__m128i)\n \ndiff --git a/drivers/raw/ioat/meson.build b/drivers/raw/ioat/meson.build\nindex 06636f8a9..3529635e9 100644\n--- a/drivers/raw/ioat/meson.build\n+++ b/drivers/raw/ioat/meson.build\n@@ -3,8 +3,10 @@\n \n build = dpdk_conf.has('RTE_ARCH_X86')\n reason = 'only supported on x86'\n-sources = files('ioat_rawdev.c',\n-\t\t'ioat_rawdev_test.c')\n+sources = files(\n+\t'idxd_pci.c',\n+\t'ioat_rawdev.c',\n+\t'ioat_rawdev_test.c')\n deps += ['rawdev', 'bus_pci', 'mbuf']\n \n install_headers('rte_ioat_rawdev.h',\n", "prefixes": [ "v6", "11/25" ] }