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GET /api/patches/80741/?format=api
{ "id": 80741, "url": "http://patchwork.dpdk.org/api/patches/80741/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/efeaf2e7e5577eaf1879749b638ced8eaa21a5c1.1602682206.git.anatoly.burakov@intel.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<efeaf2e7e5577eaf1879749b638ced8eaa21a5c1.1602682206.git.anatoly.burakov@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/efeaf2e7e5577eaf1879749b638ced8eaa21a5c1.1602682206.git.anatoly.burakov@intel.com", "date": "2020-10-14T13:30:18", "name": "[v6,05/10] power: add PMD power management API and callback", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "9e31cf01e066306f66782d38ea86756c46ea88f9", "submitter": { "id": 4, "url": "http://patchwork.dpdk.org/api/people/4/?format=api", "name": "Burakov, Anatoly", "email": "anatoly.burakov@intel.com" }, "delegate": { "id": 1, "url": "http://patchwork.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/efeaf2e7e5577eaf1879749b638ced8eaa21a5c1.1602682206.git.anatoly.burakov@intel.com/mbox/", "series": [ { "id": 12959, "url": "http://patchwork.dpdk.org/api/series/12959/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=12959", "date": "2020-10-14T13:30:14", "name": "[v6,01/10] eal: add new x86 cpuid support for WAITPKG", "version": 6, "mbox": "http://patchwork.dpdk.org/series/12959/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/80741/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/80741/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id BCE21A04B7;\n\tWed, 14 Oct 2020 15:36:00 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 45A931DE8F;\n\tWed, 14 Oct 2020 15:30:52 +0200 (CEST)", "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n by dpdk.org (Postfix) with ESMTP id 06CD61DE72\n for <dev@dpdk.org>; Wed, 14 Oct 2020 15:30:39 +0200 (CEST)", "from fmsmga006.fm.intel.com ([10.253.24.20])\n by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 14 Oct 2020 06:30:39 -0700", "from silpixa00399498.ir.intel.com (HELO\n silpixa00399498.ger.corp.intel.com) ([10.237.222.52])\n by fmsmga006.fm.intel.com with ESMTP; 14 Oct 2020 06:30:36 -0700" ], "IronPort-SDR": [ "\n Gch85eJFj+L64rRCKEa/3tF5p9n/Wb70tMoYdM508UTIiYiD6PVlP0uIhifBhuPb12WxotXIU8\n 9oqb2JGc3DIw==", "\n pfOmsdJZ4gYFetj4wHYQlhc14Rfn5IRfAxgGypZqJyeD2rpITL1sk6WhjQ8iJP/uj+/T6iypAw\n NfEgo+5lTb4A==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9773\"; a=\"183621983\"", "E=Sophos;i=\"5.77,374,1596524400\"; d=\"scan'208\";a=\"183621983\"", "E=Sophos;i=\"5.77,374,1596524400\"; d=\"scan'208\";a=\"520378244\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Anatoly Burakov <anatoly.burakov@intel.com>", "To": "dev@dpdk.org", "Cc": "Liang Ma <liang.j.ma@intel.com>, David Hunt <david.hunt@intel.com>,\n Ray Kinsella <mdr@ashroe.eu>, Neil Horman <nhorman@tuxdriver.com>,\n konstantin.ananyev@intel.com, jerinjacobk@gmail.com,\n bruce.richardson@intel.com, thomas@monjalon.net,\n timothy.mcdaniel@intel.com, gage.eads@intel.com, chris.macnamara@intel.com", "Date": "Wed, 14 Oct 2020 14:30:18 +0100", "Message-Id": "\n <efeaf2e7e5577eaf1879749b638ced8eaa21a5c1.1602682206.git.anatoly.burakov@intel.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": [ "\n <c6b56362a7c4773b7fcb0e788ecc852caa4192fa.1602682206.git.anatoly.burakov@intel.com>", "\n <532f45c5d79b4c30a919553d322bb66e91534466.1602258833.git.anatoly.burakov@intel.com>" ], "References": [ "\n <c6b56362a7c4773b7fcb0e788ecc852caa4192fa.1602682206.git.anatoly.burakov@intel.com>", "\n <532f45c5d79b4c30a919553d322bb66e91534466.1602258833.git.anatoly.burakov@intel.com>" ], "Subject": "[dpdk-dev] [PATCH v6 05/10] power: add PMD power management API and\n\tcallback", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Liang Ma <liang.j.ma@intel.com>\n\nAdd a simple on/off switch that will enable saving power when no\npackets are arriving. It is based on counting the number of empty\npolls and, when the number reaches a certain threshold, entering an\narchitecture-defined optimized power state that will either wait\nuntil a TSC timestamp expires, or when packets arrive.\n\nThis API mandates a core-to-single-queue mapping (that is, multiple\nqueued per device are supported, but they have to be polled on different\ncores).\n\nThis design is using PMD RX callbacks.\n\n1. UMWAIT/UMONITOR:\n\n When a certain threshold of empty polls is reached, the core will go\n into a power optimized sleep while waiting on an address of next RX\n descriptor to be written to.\n\n2. Pause instruction\n\n Instead of move the core into deeper C state, this method uses the\n pause instruction to avoid busy polling.\n\n3. Frequency scaling\n Reuse existing DPDK power library to scale up/down core frequency\n depending on traffic volume.\n\nSigned-off-by: Liang Ma <liang.j.ma@intel.com>\nSigned-off-by: Anatoly Burakov <anatoly.burakov@intel.com>\n---\n\nNotes:\n v6:\n - Added wakeup mechanism for UMWAIT\n - Removed memory allocation (everything is now allocated statically)\n - Fixed various typos and comments\n - Check for invalid queue ID\n - Moved release notes to this patch\n \n v5:\n - Make error checking more robust\n - Prevent initializing scaling if ACPI or PSTATE env wasn't set\n - Prevent initializing UMWAIT path if PMD doesn't support get_wake_addr\n - Add some debug logging\n - Replace x86-specific code path to generic path using the intrinsic check\n\n doc/guides/rel_notes/release_20_11.rst | 11 +\n lib/librte_power/meson.build | 5 +-\n lib/librte_power/rte_power_pmd_mgmt.c | 300 +++++++++++++++++++++++++\n lib/librte_power/rte_power_pmd_mgmt.h | 92 ++++++++\n lib/librte_power/rte_power_version.map | 4 +\n 5 files changed, 410 insertions(+), 2 deletions(-)\n create mode 100644 lib/librte_power/rte_power_pmd_mgmt.c\n create mode 100644 lib/librte_power/rte_power_pmd_mgmt.h", "diff": "diff --git a/doc/guides/rel_notes/release_20_11.rst b/doc/guides/rel_notes/release_20_11.rst\nindex ca4f43f7f9..06b822aa36 100644\n--- a/doc/guides/rel_notes/release_20_11.rst\n+++ b/doc/guides/rel_notes/release_20_11.rst\n@@ -197,6 +197,17 @@ New Features\n * Added new ``RTE_ACL_CLASSIFY_AVX512X32`` vector implementation,\n which can process up to 32 flows in parallel. Requires AVX512 support.\n \n+* **Add PMD power management mechanism**\n+\n+ 3 new Ethernet PMD power management mechanism is added through existing\n+ RX callback infrastructure.\n+\n+ * Add power saving scheme based on UMWAIT instruction (x86 only)\n+ * Add power saving scheme based on ``rte_pause()``\n+ * Add power saving scheme based on frequency scaling through the power library\n+ * Add new EXPERIMENTAL API ``rte_power_pmd_mgmt_queue_enable()``\n+ * Add new EXPERIMENTAL API ``rte_power_pmd_mgmt_queue_disable()``\n+\n \n Removed Items\n -------------\ndiff --git a/lib/librte_power/meson.build b/lib/librte_power/meson.build\nindex 78c031c943..cc3c7a8646 100644\n--- a/lib/librte_power/meson.build\n+++ b/lib/librte_power/meson.build\n@@ -9,6 +9,7 @@ sources = files('rte_power.c', 'power_acpi_cpufreq.c',\n \t\t'power_kvm_vm.c', 'guest_channel.c',\n \t\t'rte_power_empty_poll.c',\n \t\t'power_pstate_cpufreq.c',\n+\t\t'rte_power_pmd_mgmt.c',\n \t\t'power_common.c')\n-headers = files('rte_power.h','rte_power_empty_poll.h')\n-deps += ['timer']\n+headers = files('rte_power.h','rte_power_empty_poll.h','rte_power_pmd_mgmt.h')\n+deps += ['timer' ,'ethdev']\ndiff --git a/lib/librte_power/rte_power_pmd_mgmt.c b/lib/librte_power/rte_power_pmd_mgmt.c\nnew file mode 100644\nindex 0000000000..2b7d2a1a46\n--- /dev/null\n+++ b/lib/librte_power/rte_power_pmd_mgmt.c\n@@ -0,0 +1,300 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2010-2020 Intel Corporation\n+ */\n+\n+#include <rte_lcore.h>\n+#include <rte_cycles.h>\n+#include <rte_cpuflags.h>\n+#include <rte_malloc.h>\n+#include <rte_ethdev.h>\n+#include <rte_power_intrinsics.h>\n+\n+#include \"rte_power_pmd_mgmt.h\"\n+\n+#define EMPTYPOLL_MAX 512\n+\n+/**\n+ * Possible power management states of an ethdev port.\n+ */\n+enum pmd_mgmt_state {\n+\t/** Device power management is disabled. */\n+\tPMD_MGMT_DISABLED = 0,\n+\t/** Device power management is enabled. */\n+\tPMD_MGMT_ENABLED,\n+};\n+\n+struct pmd_queue_cfg {\n+\tenum pmd_mgmt_state pwr_mgmt_state;\n+\t/**< State of power management for this queue */\n+\tenum rte_power_pmd_mgmt_type cb_mode;\n+\t/**< Callback mode for this queue */\n+\tconst struct rte_eth_rxtx_callback *cur_cb;\n+\t/**< Callback instance */\n+\trte_spinlock_t umwait_lock;\n+\t/**< Per-queue status lock - used only for UMWAIT mode */\n+\tvolatile void *wait_addr;\n+\t/**< UMWAIT wakeup address */\n+\tuint64_t empty_poll_stats;\n+\t/**< Number of empty polls */\n+} __rte_cache_aligned;\n+\n+static struct pmd_queue_cfg port_cfg[RTE_MAX_ETHPORTS][RTE_MAX_QUEUES_PER_PORT];\n+\n+/* trigger a write to the cache line we're waiting on */\n+static void umwait_wakeup(volatile void *addr)\n+{\n+\tuint64_t val;\n+\n+\tval = __atomic_load_n((volatile uint64_t *)addr, __ATOMIC_RELAXED);\n+\t__atomic_compare_exchange_n((volatile uint64_t *)addr, &val, val, 0,\n+\t\t\t__ATOMIC_RELAXED, __ATOMIC_RELAXED);\n+}\n+\n+static uint16_t\n+clb_umwait(uint16_t port_id, uint16_t qidx,\n+\t\tstruct rte_mbuf **pkts __rte_unused, uint16_t nb_rx,\n+\t\tuint16_t max_pkts __rte_unused, void *addr __rte_unused)\n+{\n+\n+\tstruct pmd_queue_cfg *q_conf;\n+\n+\tq_conf = &port_cfg[port_id][qidx];\n+\n+\tif (unlikely(nb_rx == 0)) {\n+\t\tq_conf->empty_poll_stats++;\n+\t\tif (unlikely(q_conf->empty_poll_stats > EMPTYPOLL_MAX)) {\n+\t\t\tvolatile void *target_addr;\n+\t\t\tuint64_t expected, mask;\n+\t\t\tuint16_t ret;\n+\t\t\tuint8_t data_sz;\n+\n+\t\t\t/*\n+\t\t\t * get address of next descriptor in the RX\n+\t\t\t * ring for this queue, as well as expected\n+\t\t\t * value and a mask.\n+\t\t\t */\n+\t\t\tret = rte_eth_get_wake_addr(port_id, qidx,\n+\t\t\t\t\t&target_addr, &expected, &mask,\n+\t\t\t\t\t&data_sz);\n+\t\t\tif (ret == 0) {\n+\t\t\t\t/*\n+\t\t\t\t * we need to ensure we can wake up by another\n+\t\t\t\t * thread triggering a write, so we need the\n+\t\t\t\t * address to always be up to date.\n+\t\t\t\t */\n+\t\t\t\trte_spinlock_lock(&q_conf->umwait_lock);\n+\t\t\t\tq_conf->wait_addr = target_addr;\n+\t\t\t\t/* -1ULL is maximum value for TSC */\n+\t\t\t\trte_power_monitor_sync(target_addr, expected,\n+\t\t\t\t\t\tmask, -1ULL, data_sz,\n+\t\t\t\t\t\t&q_conf->umwait_lock);\n+\t\t\t\t/* erase the address */\n+\t\t\t\tq_conf->wait_addr = NULL;\n+\t\t\t\trte_spinlock_unlock(&q_conf->umwait_lock);\n+\t\t\t}\n+\t\t}\n+\t} else\n+\t\tq_conf->empty_poll_stats = 0;\n+\n+\treturn nb_rx;\n+}\n+\n+static uint16_t\n+clb_pause(uint16_t port_id, uint16_t qidx,\n+\t\tstruct rte_mbuf **pkts __rte_unused, uint16_t nb_rx,\n+\t\tuint16_t max_pkts __rte_unused, void *addr __rte_unused)\n+{\n+\tstruct pmd_queue_cfg *q_conf;\n+\n+\tq_conf = &port_cfg[port_id][qidx];\n+\n+\tif (unlikely(nb_rx == 0)) {\n+\t\tq_conf->empty_poll_stats++;\n+\t\t/* sleep for 1 microsecond */\n+\t\tif (unlikely(q_conf->empty_poll_stats > EMPTYPOLL_MAX))\n+\t\t\trte_delay_us(1);\n+\t} else\n+\t\tq_conf->empty_poll_stats = 0;\n+\n+\treturn nb_rx;\n+}\n+\n+static uint16_t\n+clb_scale_freq(uint16_t port_id, uint16_t qidx,\n+\t\tstruct rte_mbuf **pkts __rte_unused, uint16_t nb_rx,\n+\t\tuint16_t max_pkts __rte_unused, void *_ __rte_unused)\n+{\n+\tstruct pmd_queue_cfg *q_conf;\n+\n+\tq_conf = &port_cfg[port_id][qidx];\n+\n+\tif (unlikely(nb_rx == 0)) {\n+\t\tq_conf->empty_poll_stats++;\n+\t\tif (unlikely(q_conf->empty_poll_stats > EMPTYPOLL_MAX))\n+\t\t\t/* scale down freq */\n+\t\t\trte_power_freq_min(rte_lcore_id());\n+\t} else {\n+\t\tq_conf->empty_poll_stats = 0;\n+\t\t/* scale up freq */\n+\t\trte_power_freq_max(rte_lcore_id());\n+\t}\n+\n+\treturn nb_rx;\n+}\n+\n+int\n+rte_power_pmd_mgmt_queue_enable(unsigned int lcore_id,\n+\t\tuint16_t port_id, uint16_t queue_id,\n+\t\tenum rte_power_pmd_mgmt_type mode)\n+{\n+\tstruct rte_eth_dev *dev;\n+\tstruct pmd_queue_cfg *queue_cfg;\n+\tint ret;\n+\n+\tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);\n+\tdev = &rte_eth_devices[port_id];\n+\n+\t/* check if queue id is valid */\n+\tif (queue_id >= dev->data->nb_rx_queues ||\n+\t\t\tqueue_id >= RTE_MAX_QUEUES_PER_PORT) {\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tqueue_cfg = &port_cfg[port_id][queue_id];\n+\n+\tif (queue_cfg->pwr_mgmt_state == PMD_MGMT_ENABLED) {\n+\t\tret = -EINVAL;\n+\t\tgoto end;\n+\t}\n+\n+\tswitch (mode) {\n+\tcase RTE_POWER_MGMT_TYPE_WAIT:\n+\t{\n+\t\t/* check if rte_power_monitor is supported */\n+\t\tuint64_t dummy_expected, dummy_mask;\n+\t\tstruct rte_cpu_intrinsics i;\n+\t\tvolatile void *dummy_addr;\n+\t\tuint8_t dummy_sz;\n+\n+\t\trte_cpu_get_intrinsics_support(&i);\n+\n+\t\tif (!i.power_monitor) {\n+\t\t\tRTE_LOG(DEBUG, POWER, \"Monitoring intrinsics are not supported\\n\");\n+\t\t\tret = -ENOTSUP;\n+\t\t\tgoto end;\n+\t\t}\n+\n+\t\t/* check if the device supports the necessary PMD API */\n+\t\tif (rte_eth_get_wake_addr(port_id, queue_id,\n+\t\t\t\t&dummy_addr, &dummy_expected,\n+\t\t\t\t&dummy_mask, &dummy_sz) == -ENOTSUP) {\n+\t\t\tRTE_LOG(DEBUG, POWER, \"The device does not support rte_eth_rxq_ring_addr_get\\n\");\n+\t\t\tret = -ENOTSUP;\n+\t\t\tgoto end;\n+\t\t}\n+\t\t/* initialize UMWAIT spinlock */\n+\t\trte_spinlock_init(&queue_cfg->umwait_lock);\n+\n+\t\t/* initialize data before enabling the callback */\n+\t\tqueue_cfg->empty_poll_stats = 0;\n+\t\tqueue_cfg->cb_mode = mode;\n+\t\tqueue_cfg->pwr_mgmt_state = PMD_MGMT_ENABLED;\n+\n+\t\tqueue_cfg->cur_cb = rte_eth_add_rx_callback(port_id, queue_id,\n+\t\t\t\tclb_umwait, NULL);\n+\t\tbreak;\n+\t}\n+\tcase RTE_POWER_MGMT_TYPE_SCALE:\n+\t{\n+\t\tenum power_management_env env;\n+\t\t/* only PSTATE and ACPI modes are supported */\n+\t\tif (!rte_power_check_env_supported(PM_ENV_ACPI_CPUFREQ) &&\n+\t\t\t\t!rte_power_check_env_supported(\n+\t\t\t\t\tPM_ENV_PSTATE_CPUFREQ)) {\n+\t\t\tRTE_LOG(DEBUG, POWER, \"Neither ACPI nor PSTATE modes are supported\\n\");\n+\t\t\tret = -ENOTSUP;\n+\t\t\tgoto end;\n+\t\t}\n+\t\t/* ensure we could initialize the power library */\n+\t\tif (rte_power_init(lcore_id)) {\n+\t\t\tret = -EINVAL;\n+\t\t\tgoto end;\n+\t\t}\n+\t\t/* ensure we initialized the correct env */\n+\t\tenv = rte_power_get_env();\n+\t\tif (env != PM_ENV_ACPI_CPUFREQ &&\n+\t\t\t\tenv != PM_ENV_PSTATE_CPUFREQ) {\n+\t\t\tRTE_LOG(DEBUG, POWER, \"Neither ACPI nor PSTATE modes were initialized\\n\");\n+\t\t\tret = -ENOTSUP;\n+\t\t\tgoto end;\n+\t\t}\n+\t\t/* initialize data before enabling the callback */\n+\t\tqueue_cfg->empty_poll_stats = 0;\n+\t\tqueue_cfg->cb_mode = mode;\n+\t\tqueue_cfg->pwr_mgmt_state = PMD_MGMT_ENABLED;\n+\n+\t\tqueue_cfg->cur_cb = rte_eth_add_rx_callback(port_id,\n+\t\t\t\tqueue_id, clb_scale_freq, NULL);\n+\t\tbreak;\n+\t}\n+\tcase RTE_POWER_MGMT_TYPE_PAUSE:\n+\t\t/* initialize data before enabling the callback */\n+\t\tqueue_cfg->empty_poll_stats = 0;\n+\t\tqueue_cfg->cb_mode = mode;\n+\t\tqueue_cfg->pwr_mgmt_state = PMD_MGMT_ENABLED;\n+\n+\t\tqueue_cfg->cur_cb = rte_eth_add_rx_callback(port_id, queue_id,\n+\t\t\t\tclb_pause, NULL);\n+\t\tbreak;\n+\t}\n+\tret = 0;\n+\n+end:\n+\treturn ret;\n+}\n+\n+int\n+rte_power_pmd_mgmt_queue_disable(unsigned int lcore_id,\n+\t\tuint16_t port_id, uint16_t queue_id)\n+{\n+\tstruct pmd_queue_cfg *queue_cfg;\n+\tint ret;\n+\n+\tqueue_cfg = &port_cfg[port_id][queue_id];\n+\n+\tif (queue_cfg->pwr_mgmt_state == PMD_MGMT_DISABLED) {\n+\t\tret = -EINVAL;\n+\t\tgoto end;\n+\t}\n+\n+\tswitch (queue_cfg->cb_mode) {\n+\tcase RTE_POWER_MGMT_TYPE_WAIT:\n+\t\trte_spinlock_lock(&queue_cfg->umwait_lock);\n+\n+\t\t/* wake up the core from UMWAIT sleep, if any */\n+\t\tif (queue_cfg->wait_addr != NULL)\n+\t\t\tumwait_wakeup(queue_cfg->wait_addr);\n+\n+\t\trte_spinlock_unlock(&queue_cfg->umwait_lock);\n+\t\t/* fall-through */\n+\tcase RTE_POWER_MGMT_TYPE_PAUSE:\n+\t\trte_eth_remove_rx_callback(port_id, queue_id,\n+\t\t\t\tqueue_cfg->cur_cb);\n+\t\tbreak;\n+\tcase RTE_POWER_MGMT_TYPE_SCALE:\n+\t\trte_power_freq_max(lcore_id);\n+\t\trte_eth_remove_rx_callback(port_id, queue_id,\n+\t\t\t\tqueue_cfg->cur_cb);\n+\t\trte_power_exit(lcore_id);\n+\t\tbreak;\n+\t}\n+\t/*\n+\t * we don't free the RX callback here because it is unsafe to do so\n+\t * unless we know for a fact that all data plane threads have stopped.\n+\t */\n+\tqueue_cfg->cur_cb = NULL;\n+\tqueue_cfg->pwr_mgmt_state = PMD_MGMT_DISABLED;\n+\tret = 0;\n+end:\n+\treturn ret;\n+}\ndiff --git a/lib/librte_power/rte_power_pmd_mgmt.h b/lib/librte_power/rte_power_pmd_mgmt.h\nnew file mode 100644\nindex 0000000000..a7a3f98268\n--- /dev/null\n+++ b/lib/librte_power/rte_power_pmd_mgmt.h\n@@ -0,0 +1,92 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2010-2020 Intel Corporation\n+ */\n+\n+#ifndef _RTE_POWER_PMD_MGMT_H\n+#define _RTE_POWER_PMD_MGMT_H\n+\n+/**\n+ * @file\n+ * RTE PMD Power Management\n+ */\n+#include <stdint.h>\n+#include <stdbool.h>\n+\n+#include <rte_common.h>\n+#include <rte_byteorder.h>\n+#include <rte_log.h>\n+#include <rte_power.h>\n+#include <rte_atomic.h>\n+\n+#ifdef __cplusplus\n+extern \"C\" {\n+#endif\n+\n+/**\n+ * PMD Power Management Type\n+ */\n+enum rte_power_pmd_mgmt_type {\n+\t/** WAIT callback mode. */\n+\tRTE_POWER_MGMT_TYPE_WAIT = 1,\n+\t/** PAUSE callback mode. */\n+\tRTE_POWER_MGMT_TYPE_PAUSE,\n+\t/** Freq Scaling callback mode. */\n+\tRTE_POWER_MGMT_TYPE_SCALE,\n+};\n+\n+/**\n+ * @warning\n+ * @b EXPERIMENTAL: this API may change, or be removed, without prior notice\n+ *\n+ * Setup per-queue power management callback.\n+ *\n+ * @note This function is not thread-safe.\n+ *\n+ * @param lcore_id\n+ * lcore_id.\n+ * @param port_id\n+ * The port identifier of the Ethernet device.\n+ * @param queue_id\n+ * The queue identifier of the Ethernet device.\n+ * @param mode\n+ * The power management callback function type.\n+\n+ * @return\n+ * 0 on success\n+ * <0 on error\n+ */\n+__rte_experimental\n+int\n+rte_power_pmd_mgmt_queue_enable(unsigned int lcore_id,\n+\t\t\t\tuint16_t port_id,\n+\t\t\t\tuint16_t queue_id,\n+\t\t\t\tenum rte_power_pmd_mgmt_type mode);\n+\n+/**\n+ * @warning\n+ * @b EXPERIMENTAL: this API may change, or be removed, without prior notice\n+ *\n+ * Remove per-queue power management callback.\n+ *\n+ * @note This function is not thread-safe.\n+ *\n+ * @param lcore_id\n+ * lcore_id.\n+ * @param port_id\n+ * The port identifier of the Ethernet device.\n+ * @param queue_id\n+ * The queue identifier of the Ethernet device.\n+ * @return\n+ * 0 on success\n+ * <0 on error\n+ */\n+__rte_experimental\n+int\n+rte_power_pmd_mgmt_queue_disable(unsigned int lcore_id,\n+\t\t\t\tuint16_t port_id,\n+\t\t\t\tuint16_t queue_id);\n+#ifdef __cplusplus\n+}\n+#endif\n+\n+#endif\ndiff --git a/lib/librte_power/rte_power_version.map b/lib/librte_power/rte_power_version.map\nindex 69ca9af616..3f2f6cd6f6 100644\n--- a/lib/librte_power/rte_power_version.map\n+++ b/lib/librte_power/rte_power_version.map\n@@ -34,4 +34,8 @@ EXPERIMENTAL {\n \trte_power_guest_channel_receive_msg;\n \trte_power_poll_stat_fetch;\n \trte_power_poll_stat_update;\n+\t# added in 20.11\n+\trte_power_pmd_mgmt_queue_enable;\n+\trte_power_pmd_mgmt_queue_disable;\n+\n };\n", "prefixes": [ "v6", "05/10" ] }