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GET /api/patches/92262/?format=api
{ "id": 92262, "url": "http://patchwork.dpdk.org/api/patches/92262/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210427133912.261993-2-haiyue.wang@intel.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210427133912.261993-2-haiyue.wang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210427133912.261993-2-haiyue.wang@intel.com", "date": "2021-04-27T13:39:10", "name": "[v4,1/3] bus/pci: set PCI master in command register", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "e75641ef8cda0d0424faf4d254a8f055a3cd5975", "submitter": { "id": 1044, "url": "http://patchwork.dpdk.org/api/people/1044/?format=api", "name": "Wang, Haiyue", "email": "haiyue.wang@intel.com" }, "delegate": { "id": 24651, "url": "http://patchwork.dpdk.org/api/users/24651/?format=api", "username": "dmarchand", "first_name": "David", "last_name": "Marchand", "email": "david.marchand@redhat.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210427133912.261993-2-haiyue.wang@intel.com/mbox/", "series": [ { "id": 16704, "url": "http://patchwork.dpdk.org/api/series/16704/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=16704", "date": "2021-04-27T13:39:09", "name": "fix PF reset causes VF memory request failure", "version": 4, "mbox": "http://patchwork.dpdk.org/series/16704/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/92262/comments/", "check": "warning", "checks": "http://patchwork.dpdk.org/api/patches/92262/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 12839A0A02;\n\tTue, 27 Apr 2021 16:05:26 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 9AFE441254;\n\tTue, 27 Apr 2021 16:05:23 +0200 (CEST)", "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n by mails.dpdk.org (Postfix) with ESMTP id 27389410FC\n for <dev@dpdk.org>; Tue, 27 Apr 2021 16:05:19 +0200 (CEST)", "from fmsmga002.fm.intel.com ([10.253.24.26])\n by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 27 Apr 2021 07:05:19 -0700", "from npg-dpdk-haiyue-2.sh.intel.com ([10.67.119.63])\n by fmsmga002.fm.intel.com with ESMTP; 27 Apr 2021 07:05:17 -0700" ], "IronPort-SDR": [ "\n ROhZWyZ7Rnn++F/nQjzQEm+7odU5ap9Lz1jg+pI18Wp8tGWRevRQLuxQhHk9GtaT21JsaQ79Uz\n SZBvr/s8MEGA==", "\n EzyfrhZ3PVeA/sH3hwxfUFq6pERadpmjVn2NYh8keNLRO168RZGrgyTaJW14W51iRDuK1QUfHZ\n 07UL/tr2n1NA==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6200,9189,9967\"; a=\"183994830\"", "E=Sophos;i=\"5.82,254,1613462400\"; d=\"scan'208\";a=\"183994830\"", "E=Sophos;i=\"5.82,254,1613462400\"; d=\"scan'208\";a=\"457656359\"" ], "X-ExtLoop1": "1", "From": "Haiyue Wang <haiyue.wang@intel.com>", "To": "dev@dpdk.org", "Cc": "qi.z.zhang@intel.com, liang-min.wang@intel.com, david.marchand@redhat.com,\n Haiyue Wang <haiyue.wang@intel.com>, Ray Kinsella <mdr@ashroe.eu>,\n Neil Horman <nhorman@tuxdriver.com>, Gaetan Rivet <grive@u256.net>", "Date": "Tue, 27 Apr 2021 21:39:10 +0800", "Message-Id": "<20210427133912.261993-2-haiyue.wang@intel.com>", "X-Mailer": "git-send-email 2.31.1", "In-Reply-To": "<20210427133912.261993-1-haiyue.wang@intel.com>", "References": "<20210421050243.130585-1-haiyue.wang@intel.com>\n <20210427133912.261993-1-haiyue.wang@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v4 1/3] bus/pci: set PCI master in command\n register", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add the API to set 'Bus Master Enable' bit to be enabled or disabled in\nthe PCI command register.\n\nSigned-off-by: Haiyue Wang <haiyue.wang@intel.com>\n---\n drivers/bus/pci/pci_common.c | 28 ++++++++++++++++++++++++++++\n drivers/bus/pci/rte_bus_pci.h | 14 ++++++++++++++\n drivers/bus/pci/version.map | 3 +++\n lib/pci/rte_pci.h | 4 ++++\n 4 files changed, 49 insertions(+)", "diff": "diff --git a/drivers/bus/pci/pci_common.c b/drivers/bus/pci/pci_common.c\nindex ee7f96635..35d7d092d 100644\n--- a/drivers/bus/pci/pci_common.c\n+++ b/drivers/bus/pci/pci_common.c\n@@ -746,6 +746,34 @@ rte_pci_find_ext_capability(struct rte_pci_device *dev, uint32_t cap)\n \treturn 0;\n }\n \n+int\n+rte_pci_set_bus_master(struct rte_pci_device *dev, bool enable)\n+{\n+\tuint16_t old_cmd, cmd;\n+\n+\tif (rte_pci_read_config(dev, &old_cmd, sizeof(old_cmd),\n+\t\t\t\tRTE_PCI_COMMAND) < 0) {\n+\t\tRTE_LOG(ERR, EAL, \"error in reading PCI command register\\n\");\n+\t\treturn -1;\n+\t}\n+\n+\tif (enable)\n+\t\tcmd = old_cmd | RTE_PCI_COMMAND_MASTER;\n+\telse\n+\t\tcmd = old_cmd & ~RTE_PCI_COMMAND_MASTER;\n+\n+\tif (cmd == old_cmd)\n+\t\treturn 0;\n+\n+\tif (rte_pci_write_config(dev, &cmd, sizeof(cmd),\n+\t\t\t\t RTE_PCI_COMMAND) < 0) {\n+\t\tRTE_LOG(ERR, EAL, \"error in writing PCI command register\\n\");\n+\t\treturn -1;\n+\t}\n+\n+\treturn 0;\n+}\n+\n struct rte_pci_bus rte_pci_bus = {\n \t.bus = {\n \t\t.scan = rte_pci_scan,\ndiff --git a/drivers/bus/pci/rte_bus_pci.h b/drivers/bus/pci/rte_bus_pci.h\nindex 64886b473..976c33c92 100644\n--- a/drivers/bus/pci/rte_bus_pci.h\n+++ b/drivers/bus/pci/rte_bus_pci.h\n@@ -249,6 +249,20 @@ void rte_pci_dump(FILE *f);\n __rte_experimental\n off_t rte_pci_find_ext_capability(struct rte_pci_device *dev, uint32_t cap);\n \n+/**\n+ * Enables/Disables Bus Master for device's PCI command register.\n+ *\n+ * @param dev\n+ * A pointer to rte_pci_device structure.\n+ * @param enable\n+ * Enable or disable Bus Master.\n+ *\n+ * @return\n+ * 0 on success, -1 on error in PCI config space read/write.\n+ */\n+__rte_experimental\n+int rte_pci_set_bus_master(struct rte_pci_device *dev, bool enable);\n+\n /**\n * Register a PCI driver.\n *\ndiff --git a/drivers/bus/pci/version.map b/drivers/bus/pci/version.map\nindex f33ed0abd..c6e5f797c 100644\n--- a/drivers/bus/pci/version.map\n+++ b/drivers/bus/pci/version.map\n@@ -21,4 +21,7 @@ EXPERIMENTAL {\n \tglobal:\n \n \trte_pci_find_ext_capability;\n+\n+\t# added in 21.05\n+\trte_pci_set_bus_master;\n };\ndiff --git a/lib/pci/rte_pci.h b/lib/pci/rte_pci.h\nindex a8f8e404a..1f33d687f 100644\n--- a/lib/pci/rte_pci.h\n+++ b/lib/pci/rte_pci.h\n@@ -32,6 +32,10 @@ extern \"C\" {\n \n #define RTE_PCI_VENDOR_ID\t0x00\t/* 16 bits */\n #define RTE_PCI_DEVICE_ID\t0x02\t/* 16 bits */\n+#define RTE_PCI_COMMAND\t\t0x04\t/* 16 bits */\n+\n+/* PCI Command Register */\n+#define RTE_PCI_COMMAND_MASTER\t0x4\t/* Bus Master Enable */\n \n /* PCI Express capability registers */\n #define RTE_PCI_EXP_DEVCTL\t8\t/* Device Control */\n", "prefixes": [ "v4", "1/3" ] }