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GET /api/patches/92565/?format=api
{ "id": 92565, "url": "http://patchwork.dpdk.org/api/patches/92565/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210430150637.362610-12-bruce.richardson@intel.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210430150637.362610-12-bruce.richardson@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210430150637.362610-12-bruce.richardson@intel.com", "date": "2021-04-30T15:06:36", "name": "[v4,11/12] raw/ioat: add API to query remaining ring space", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "0042203d46f8f3405ab825f31f62857244a81843", "submitter": { "id": 20, "url": "http://patchwork.dpdk.org/api/people/20/?format=api", "name": "Bruce Richardson", "email": "bruce.richardson@intel.com" }, "delegate": { "id": 1, "url": "http://patchwork.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210430150637.362610-12-bruce.richardson@intel.com/mbox/", "series": [ { "id": 16778, "url": "http://patchwork.dpdk.org/api/series/16778/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=16778", "date": "2021-04-30T15:06:25", "name": "ioat driver updates", "version": 4, "mbox": "http://patchwork.dpdk.org/series/16778/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/92565/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/92565/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 8FAA2A0546;\n\tFri, 30 Apr 2021 17:08:13 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 3FFDB412A1;\n\tFri, 30 Apr 2021 17:07:14 +0200 (CEST)", "from mga07.intel.com (mga07.intel.com [134.134.136.100])\n by mails.dpdk.org (Postfix) with ESMTP id ADF5540688\n for <dev@dpdk.org>; Fri, 30 Apr 2021 17:07:06 +0200 (CEST)", "from fmsmga003.fm.intel.com ([10.253.24.29])\n by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 30 Apr 2021 08:07:06 -0700", "from silpixa00399126.ir.intel.com ([10.237.223.78])\n by FMSMGA003.fm.intel.com with ESMTP; 30 Apr 2021 08:07:04 -0700" ], "IronPort-SDR": [ "\n 2Ctxa0AwWH8exGIzdP9VLDLEjbXaZPWHYSLYBQlztjNilDg7FYMb1Vwswu0QBskhv2Hk02ToDu\n NbZCnPryb4qA==", "\n vONpxUMWRwJ+TETCm1qVsLrNq1YHE7Zqv+p9LQFQ2Wr3d+ELc59uCLOC+ntIOZodSU45wTAc1c\n se+1hJGYqsRw==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6200,9189,9970\"; a=\"261240890\"", "E=Sophos;i=\"5.82,263,1613462400\"; d=\"scan'208\";a=\"261240890\"", "E=Sophos;i=\"5.82,263,1613462400\"; d=\"scan'208\";a=\"456011390\"" ], "X-ExtLoop1": "1", "From": "Bruce Richardson <bruce.richardson@intel.com>", "To": "dev@dpdk.org", "Cc": "kevin.laatz@intel.com, sunil.pai.g@intel.com, jiayu.hu@intel.com,\n Bruce Richardson <bruce.richardson@intel.com>", "Date": "Fri, 30 Apr 2021 16:06:36 +0100", "Message-Id": "<20210430150637.362610-12-bruce.richardson@intel.com>", "X-Mailer": "git-send-email 2.30.2", "In-Reply-To": "<20210430150637.362610-1-bruce.richardson@intel.com>", "References": "<20210318182042.43658-1-bruce.richardson@intel.com>\n <20210430150637.362610-1-bruce.richardson@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v4 11/12] raw/ioat: add API to query remaining\n ring space", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Kevin Laatz <kevin.laatz@intel.com>\n\nAdd a new API to query remaining descriptor ring capacity. This API is\nuseful, for example, when an application needs to enqueue a fragmented\npacket and wants to ensure that all segments of the packet will be enqueued\ntogether.\n\nSigned-off-by: Kevin Laatz <kevin.laatz@intel.com>\nSigned-off-by: Bruce Richardson <bruce.richardson@intel.com>\n---\n drivers/raw/ioat/ioat_rawdev_test.c | 70 +++++++++++++++++++++++++-\n drivers/raw/ioat/rte_idxd_rawdev_fns.h | 22 ++++++++\n drivers/raw/ioat/rte_ioat_rawdev_fns.h | 24 +++++++++\n 3 files changed, 115 insertions(+), 1 deletion(-)", "diff": "diff --git a/drivers/raw/ioat/ioat_rawdev_test.c b/drivers/raw/ioat/ioat_rawdev_test.c\nindex 51eebe152f..839a716a21 100644\n--- a/drivers/raw/ioat/ioat_rawdev_test.c\n+++ b/drivers/raw/ioat/ioat_rawdev_test.c\n@@ -277,6 +277,70 @@ test_enqueue_fill(int dev_id)\n \treturn 0;\n }\n \n+static int\n+test_burst_capacity(int dev_id)\n+{\n+#define BURST_SIZE\t\t\t64\n+\tconst unsigned int ring_space = rte_ioat_burst_capacity(dev_id);\n+\tstruct rte_mbuf *src, *dst;\n+\tunsigned int length = 1024;\n+\tunsigned int i, j, iter;\n+\tunsigned int old_cap, cap;\n+\tuintptr_t completions[BURST_SIZE];\n+\n+\tsrc = rte_pktmbuf_alloc(pool);\n+\tdst = rte_pktmbuf_alloc(pool);\n+\n+\told_cap = ring_space;\n+\t/* to test capacity, we enqueue elements and check capacity is reduced\n+\t * by one each time - rebaselining the expected value after each burst\n+\t * as the capacity is only for a burst. We enqueue multiple bursts to\n+\t * fill up half the ring, before emptying it again. We do this twice to\n+\t * ensure that we get to test scenarios where we get ring wrap-around\n+\t */\n+\tfor (iter = 0; iter < 2; iter++) {\n+\t\tfor (i = 0; i < ring_space / (2 * BURST_SIZE); i++) {\n+\t\t\tcap = rte_ioat_burst_capacity(dev_id);\n+\t\t\tif (cap > old_cap) {\n+\t\t\t\tPRINT_ERR(\"Error, avail ring capacity has gone up, not down\\n\");\n+\t\t\t\treturn -1;\n+\t\t\t}\n+\t\t\told_cap = cap;\n+\n+\t\t\tfor (j = 0; j < BURST_SIZE; j++) {\n+\t\t\t\tif (rte_ioat_enqueue_copy(dev_id, rte_pktmbuf_iova(src),\n+\t\t\t\t\t\trte_pktmbuf_iova(dst), length, 0, 0) != 1) {\n+\t\t\t\t\tPRINT_ERR(\"Error with rte_ioat_enqueue_copy\\n\");\n+\t\t\t\t\treturn -1;\n+\t\t\t\t}\n+\t\t\t\tif (cap - rte_ioat_burst_capacity(dev_id) != j + 1) {\n+\t\t\t\t\tPRINT_ERR(\"Error, ring capacity did not change as expected\\n\");\n+\t\t\t\t\treturn -1;\n+\t\t\t\t}\n+\t\t\t}\n+\t\t\trte_ioat_perform_ops(dev_id);\n+\t\t}\n+\t\tusleep(100);\n+\t\tfor (i = 0; i < ring_space / (2 * BURST_SIZE); i++) {\n+\t\t\tif (rte_ioat_completed_ops(dev_id, BURST_SIZE,\n+\t\t\t\t\tcompletions, completions) != BURST_SIZE) {\n+\t\t\t\tPRINT_ERR(\"Error with completions\\n\");\n+\t\t\t\treturn -1;\n+\t\t\t}\n+\t\t}\n+\t\tif (rte_ioat_burst_capacity(dev_id) != ring_space) {\n+\t\t\tPRINT_ERR(\"Error, ring capacity has not reset to original value\\n\");\n+\t\t\treturn -1;\n+\t\t}\n+\t\told_cap = ring_space;\n+\t}\n+\n+\trte_pktmbuf_free(src);\n+\trte_pktmbuf_free(dst);\n+\n+\treturn 0;\n+}\n+\n int\n ioat_rawdev_test(uint16_t dev_id)\n {\n@@ -321,7 +385,7 @@ ioat_rawdev_test(uint16_t dev_id)\n \t}\n \n \tpool = rte_pktmbuf_pool_create(\"TEST_IOAT_POOL\",\n-\t\t\t256, /* n == num elements */\n+\t\t\tp.ring_size * 2, /* n == num elements */\n \t\t\t32, /* cache size */\n \t\t\t0, /* priv size */\n \t\t\t2048, /* data room size */\n@@ -385,6 +449,10 @@ ioat_rawdev_test(uint16_t dev_id)\n \t}\n \tprintf(\"\\n\");\n \n+\tprintf(\"Running Burst Capacity Test\\n\");\n+\tif (test_burst_capacity(dev_id) != 0)\n+\t\tgoto err;\n+\n \trte_rawdev_stop(dev_id);\n \tif (rte_rawdev_xstats_reset(dev_id, NULL, 0) != 0) {\n \t\tPRINT_ERR(\"Error resetting xstat values\\n\");\ndiff --git a/drivers/raw/ioat/rte_idxd_rawdev_fns.h b/drivers/raw/ioat/rte_idxd_rawdev_fns.h\nindex 4c49d2b84a..41f0ad6e99 100644\n--- a/drivers/raw/ioat/rte_idxd_rawdev_fns.h\n+++ b/drivers/raw/ioat/rte_idxd_rawdev_fns.h\n@@ -106,6 +106,28 @@ struct rte_idxd_rawdev {\n \tstruct rte_idxd_user_hdl *hdl_ring;\n };\n \n+static __rte_always_inline uint16_t\n+__idxd_burst_capacity(int dev_id)\n+{\n+\tstruct rte_idxd_rawdev *idxd =\n+\t\t\t(struct rte_idxd_rawdev *)rte_rawdevs[dev_id].dev_private;\n+\tuint16_t write_idx = idxd->batch_start + idxd->batch_size;\n+\tuint16_t used_space;\n+\n+\t/* Check for space in the batch ring */\n+\tif ((idxd->batch_idx_read == 0 && idxd->batch_idx_write == idxd->max_batches) ||\n+\t\t\tidxd->batch_idx_write + 1 == idxd->batch_idx_read)\n+\t\treturn 0;\n+\n+\t/* for descriptors, check for wrap-around on write but not read */\n+\tif (idxd->hdls_read > write_idx)\n+\t\twrite_idx += idxd->desc_ring_mask + 1;\n+\tused_space = write_idx - idxd->hdls_read;\n+\n+\t/* Return amount of free space in the descriptor ring */\n+\treturn idxd->desc_ring_mask - used_space;\n+}\n+\n static __rte_always_inline rte_iova_t\n __desc_idx_to_iova(struct rte_idxd_rawdev *idxd, uint16_t n)\n {\ndiff --git a/drivers/raw/ioat/rte_ioat_rawdev_fns.h b/drivers/raw/ioat/rte_ioat_rawdev_fns.h\nindex 598852b1fa..92ccdd03b9 100644\n--- a/drivers/raw/ioat/rte_ioat_rawdev_fns.h\n+++ b/drivers/raw/ioat/rte_ioat_rawdev_fns.h\n@@ -100,6 +100,19 @@ struct rte_ioat_rawdev {\n #define RTE_IOAT_CHANSTS_HALTED\t\t\t0x3\n #define RTE_IOAT_CHANSTS_ARMED\t\t\t0x4\n \n+static __rte_always_inline uint16_t\n+__ioat_burst_capacity(int dev_id)\n+{\n+\tstruct rte_ioat_rawdev *ioat =\n+\t\t\t(struct rte_ioat_rawdev *)rte_rawdevs[dev_id].dev_private;\n+\tunsigned short size = ioat->ring_size - 1;\n+\tunsigned short read = ioat->next_read;\n+\tunsigned short write = ioat->next_write;\n+\tunsigned short space = size - (write - read);\n+\n+\treturn space;\n+}\n+\n static __rte_always_inline int\n __ioat_write_desc(int dev_id, uint32_t op, uint64_t src, phys_addr_t dst,\n \t\tunsigned int length, uintptr_t src_hdl, uintptr_t dst_hdl)\n@@ -260,6 +273,17 @@ __ioat_completed_ops(int dev_id, uint8_t max_copies,\n \treturn count;\n }\n \n+static inline uint16_t\n+rte_ioat_burst_capacity(int dev_id)\n+{\n+\tenum rte_ioat_dev_type *type =\n+\t\t(enum rte_ioat_dev_type *)rte_rawdevs[dev_id].dev_private;\n+\tif (*type == RTE_IDXD_DEV)\n+\t\treturn __idxd_burst_capacity(dev_id);\n+\telse\n+\t\treturn __ioat_burst_capacity(dev_id);\n+}\n+\n static inline int\n rte_ioat_enqueue_fill(int dev_id, uint64_t pattern, phys_addr_t dst,\n \t\tunsigned int len, uintptr_t dst_hdl)\n", "prefixes": [ "v4", "11/12" ] }