Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/93167/?format=api
{ "id": 93167, "url": "http://patchwork.dpdk.org/api/patches/93167/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/819ef1ace187365a615d3383e54579e3d9fb216e.1620747068.git.anatoly.burakov@intel.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<819ef1ace187365a615d3383e54579e3d9fb216e.1620747068.git.anatoly.burakov@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/819ef1ace187365a615d3383e54579e3d9fb216e.1620747068.git.anatoly.burakov@intel.com", "date": "2021-05-11T15:31:52", "name": "[21.08,v1,1/2] power: invert the monitor check", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "a5d6ae0d38bb3d230d9060d2cfd52bebcdfb6ab1", "submitter": { "id": 4, "url": "http://patchwork.dpdk.org/api/people/4/?format=api", "name": "Burakov, Anatoly", "email": "anatoly.burakov@intel.com" }, "delegate": { "id": 1, "url": "http://patchwork.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/819ef1ace187365a615d3383e54579e3d9fb216e.1620747068.git.anatoly.burakov@intel.com/mbox/", "series": [ { "id": 16930, "url": "http://patchwork.dpdk.org/api/series/16930/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=16930", "date": "2021-05-11T15:31:52", "name": "[21.08,v1,1/2] power: invert the monitor check", "version": 1, "mbox": "http://patchwork.dpdk.org/series/16930/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/93167/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/93167/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 80E9DA0A0E;\n\tTue, 11 May 2021 17:33:04 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id F044D40140;\n\tTue, 11 May 2021 17:33:03 +0200 (CEST)", "from mga05.intel.com (mga05.intel.com [192.55.52.43])\n by mails.dpdk.org (Postfix) with ESMTP id D5D364003E\n for <dev@dpdk.org>; Tue, 11 May 2021 17:33:01 +0200 (CEST)", "from orsmga001.jf.intel.com ([10.7.209.18])\n by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 11 May 2021 08:32:54 -0700", "from silpixa00399498.ir.intel.com (HELO\n silpixa00399498.ger.corp.intel.com) ([10.237.223.81])\n by orsmga001.jf.intel.com with ESMTP; 11 May 2021 08:31:59 -0700" ], "IronPort-SDR": [ "\n yXnGKI1J5QDsTXUTYn3PVhU6TlzRmjFpBCmvdlozZ4POMv6Tan/Zj9vjX1vCUWFCj60SlLi1kW\n rXgwxCT0VGmA==", "\n kCDzsfgU+vQtlwT1ihtasP4pfeB3JEJUFl1SZi4xR0bESP3eboz0T5FRpGFyUDPTbl6dpwCh7J\n uBssmBkXbfKg==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6200,9189,9981\"; a=\"284963186\"", "E=Sophos;i=\"5.82,291,1613462400\"; d=\"scan'208\";a=\"284963186\"", "E=Sophos;i=\"5.82,291,1613462400\"; d=\"scan'208\";a=\"471162521\"" ], "X-ExtLoop1": "1", "From": "Anatoly Burakov <anatoly.burakov@intel.com>", "To": "dev@dpdk.org, Timothy McDaniel <timothy.mcdaniel@intel.com>,\n Beilei Xing <beilei.xing@intel.com>, Jingjing Wu <jingjing.wu@intel.com>,\n Qiming Yang <qiming.yang@intel.com>, Qi Zhang <qi.z.zhang@intel.com>,\n Haiyue Wang <haiyue.wang@intel.com>, Matan Azrad <matan@nvidia.com>,\n Shahaf Shuler <shahafs@nvidia.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>,\n Bruce Richardson <bruce.richardson@intel.com>,\n Konstantin Ananyev <konstantin.ananyev@intel.com>", "Cc": "ciara.loftus@intel.com", "Date": "Tue, 11 May 2021 15:31:52 +0000", "Message-Id": "\n <819ef1ace187365a615d3383e54579e3d9fb216e.1620747068.git.anatoly.burakov@intel.com>", "X-Mailer": "git-send-email 2.25.1", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [21.08 PATCH v1 1/2] power: invert the monitor check", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Previously, the semantics of power monitor were such that we were\nchecking current value against the expected value, and if they matched,\nthen the sleep was aborted. This is somewhat inflexible, because it only\nallowed us to check for a specific value.\n\nWe can reverse the check, and instead have monitor sleep to be aborted\nif the expected value *doesn't* match what's in memory. This allows us\nto both implement all currently implemented driver code, as well as\nsupport more use cases which don't easily map to previous semantics\n(such as waiting on writes to AF_XDP counter value).\n\nThis commit also adjusts all current driver implementations to match the\nnew semantics.\n\nSigned-off-by: Anatoly Burakov <anatoly.burakov@intel.com>\n---\n drivers/event/dlb2/dlb2.c | 2 +-\n drivers/net/i40e/i40e_rxtx.c | 2 +-\n drivers/net/iavf/iavf_rxtx.c | 2 +-\n drivers/net/ice/ice_rxtx.c | 2 +-\n drivers/net/ixgbe/ixgbe_rxtx.c | 2 +-\n drivers/net/mlx5/mlx5_rx.c | 2 +-\n lib/eal/include/generic/rte_power_intrinsics.h | 8 ++++----\n lib/eal/x86/rte_power_intrinsics.c | 4 ++--\n 8 files changed, 12 insertions(+), 12 deletions(-)", "diff": "diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c\nindex 3570678b9e..5701bbb8ab 100644\n--- a/drivers/event/dlb2/dlb2.c\n+++ b/drivers/event/dlb2/dlb2.c\n@@ -3188,7 +3188,7 @@ dlb2_dequeue_wait(struct dlb2_eventdev *dlb2,\n \t\t\t&cq_base[qm_port->cq_idx];\n \t\tmonitor_addr++; /* cq_gen bit is in second 64bit location */\n \n-\t\tif (qm_port->gen_bit)\n+\t\tif (!qm_port->gen_bit)\n \t\t\texpected_value = qe_mask.raw_qe[1];\n \t\telse\n \t\t\texpected_value = 0;\ndiff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c\nindex 02cf5e787c..4617ae914a 100644\n--- a/drivers/net/i40e/i40e_rxtx.c\n+++ b/drivers/net/i40e/i40e_rxtx.c\n@@ -88,7 +88,7 @@ i40e_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)\n \t * we expect the DD bit to be set to 1 if this descriptor was already\n \t * written to.\n \t */\n-\tpmc->val = rte_cpu_to_le_64(1 << I40E_RX_DESC_STATUS_DD_SHIFT);\n+\tpmc->val = 0;\n \tpmc->mask = rte_cpu_to_le_64(1 << I40E_RX_DESC_STATUS_DD_SHIFT);\n \n \t/* registers are 64-bit */\ndiff --git a/drivers/net/iavf/iavf_rxtx.c b/drivers/net/iavf/iavf_rxtx.c\nindex 87f7eebc65..d8d9cc860c 100644\n--- a/drivers/net/iavf/iavf_rxtx.c\n+++ b/drivers/net/iavf/iavf_rxtx.c\n@@ -73,7 +73,7 @@ iavf_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)\n \t * we expect the DD bit to be set to 1 if this descriptor was already\n \t * written to.\n \t */\n-\tpmc->val = rte_cpu_to_le_64(1 << IAVF_RX_DESC_STATUS_DD_SHIFT);\n+\tpmc->val = 0;\n \tpmc->mask = rte_cpu_to_le_64(1 << IAVF_RX_DESC_STATUS_DD_SHIFT);\n \n \t/* registers are 64-bit */\ndiff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c\nindex 92fbbc18da..4e349bfa3f 100644\n--- a/drivers/net/ice/ice_rxtx.c\n+++ b/drivers/net/ice/ice_rxtx.c\n@@ -43,7 +43,7 @@ ice_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)\n \t * we expect the DD bit to be set to 1 if this descriptor was already\n \t * written to.\n \t */\n-\tpmc->val = rte_cpu_to_le_16(1 << ICE_RX_FLEX_DESC_STATUS0_DD_S);\n+\tpmc->val = 0;\n \tpmc->mask = rte_cpu_to_le_16(1 << ICE_RX_FLEX_DESC_STATUS0_DD_S);\n \n \t/* register is 16-bit */\ndiff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c\nindex d69f36e977..2793718171 100644\n--- a/drivers/net/ixgbe/ixgbe_rxtx.c\n+++ b/drivers/net/ixgbe/ixgbe_rxtx.c\n@@ -1385,7 +1385,7 @@ ixgbe_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)\n \t * we expect the DD bit to be set to 1 if this descriptor was already\n \t * written to.\n \t */\n-\tpmc->val = rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD);\n+\tpmc->val = 0;\n \tpmc->mask = rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD);\n \n \t/* the registers are 32-bit */\ndiff --git a/drivers/net/mlx5/mlx5_rx.c b/drivers/net/mlx5/mlx5_rx.c\nindex 6cd71a44eb..3cbbe5bf59 100644\n--- a/drivers/net/mlx5/mlx5_rx.c\n+++ b/drivers/net/mlx5/mlx5_rx.c\n@@ -282,7 +282,7 @@ int mlx5_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)\n \t\treturn -rte_errno;\n \t}\n \tpmc->addr = &cqe->op_own;\n-\tpmc->val = !!idx;\n+\tpmc->val = !idx;\n \tpmc->mask = MLX5_CQE_OWNER_MASK;\n \tpmc->size = sizeof(uint8_t);\n \treturn 0;\ndiff --git a/lib/eal/include/generic/rte_power_intrinsics.h b/lib/eal/include/generic/rte_power_intrinsics.h\nindex dddca3d41c..28c481a8d2 100644\n--- a/lib/eal/include/generic/rte_power_intrinsics.h\n+++ b/lib/eal/include/generic/rte_power_intrinsics.h\n@@ -45,10 +45,10 @@ struct rte_power_monitor_cond {\n * Additionally, an expected value (`pmc->val`), mask (`pmc->mask`), and data\n * size (`pmc->size`) are provided in the `pmc` power monitoring condition. If\n * the mask is non-zero, the current value pointed to by the `pmc->addr` pointer\n- * will be read and compared against the expected value, and if they match, the\n- * entering of optimized power state will be aborted. This is intended to\n- * prevent the CPU from entering optimized power state and waiting on a write\n- * that has already happened by the time this API is called.\n+ * will be read and compared against the expected value, and if they do not\n+ * match, the entering of optimized power state will be aborted. This is\n+ * intended to prevent the CPU from entering optimized power state and waiting\n+ * on a write that has already happened by the time this API is called.\n *\n * @warning It is responsibility of the user to check if this function is\n * supported at runtime using `rte_cpu_get_intrinsics_support()` API call.\ndiff --git a/lib/eal/x86/rte_power_intrinsics.c b/lib/eal/x86/rte_power_intrinsics.c\nindex 39ea9fdecd..7f0588d70e 100644\n--- a/lib/eal/x86/rte_power_intrinsics.c\n+++ b/lib/eal/x86/rte_power_intrinsics.c\n@@ -116,8 +116,8 @@ rte_power_monitor(const struct rte_power_monitor_cond *pmc,\n \t\t\t\tpmc->addr, pmc->size);\n \t\tconst uint64_t masked = cur_value & pmc->mask;\n \n-\t\t/* if the masked value is already matching, abort */\n-\t\tif (masked == pmc->val)\n+\t\t/* if the masked value is not matching, abort */\n+\t\tif (masked != pmc->val)\n \t\t\tgoto end;\n \t}\n \n", "prefixes": [ "21.08", "v1", "1/2" ] }