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GET /api/patches/93660/?format=api
{ "id": 93660, "url": "http://patchwork.dpdk.org/api/patches/93660/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210531214142.30167-22-tduszynski@marvell.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210531214142.30167-22-tduszynski@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210531214142.30167-22-tduszynski@marvell.com", "date": "2021-05-31T21:41:35", "name": "[21/28] common/cnxk: add support for clearing bphy irq handler", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "c870f651cda13ff438fe9ed5749405ba3d5068cf", "submitter": { "id": 2215, "url": "http://patchwork.dpdk.org/api/people/2215/?format=api", "name": "Tomasz Duszynski", "email": "tduszynski@marvell.com" }, "delegate": { "id": 1, "url": "http://patchwork.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210531214142.30167-22-tduszynski@marvell.com/mbox/", "series": [ { "id": 17173, "url": "http://patchwork.dpdk.org/api/series/17173/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=17173", "date": "2021-05-31T21:41:14", "name": "add support for baseband phy", "version": 1, "mbox": "http://patchwork.dpdk.org/series/17173/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/93660/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/93660/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 5B19AA0524;\n\tMon, 31 May 2021 23:44:01 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 0D52E40E32;\n\tMon, 31 May 2021 23:42:48 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id 9C7A840FDF\n for <dev@dpdk.org>; Mon, 31 May 2021 23:42:46 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 14VLeDUF025917; Mon, 31 May 2021 14:42:43 -0700", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0a-0016f401.pphosted.com with ESMTP id 38vjqj339x-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Mon, 31 May 2021 14:42:43 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Mon, 31 May 2021 14:42:42 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Mon, 31 May 2021 14:42:42 -0700", "from EH-LT0048.marvell.com (unknown [10.193.32.52])\n by maili.marvell.com (Postfix) with ESMTP id 3B3EB3F7040;\n Mon, 31 May 2021 14:42:40 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=AoTUGXVkqTkoaD1nD73AnyqDS3zKDuMHgzzlo6fPw1c=;\n b=jCBEAf0tsJC1x2u/44PnrmnR1vfPcC27DfwltEvQ+5mwL4sw/psZfz4vjVFk4bfnJ8oy\n /B0kGdkxP/v22IatvaLWbTxZFuUXLfhAq4IlW5Ee6xpyE6IxT3dKDtmgQ56InabbYvwd\n bLDLjWbgSCOzHAxgMCFZlOnzMJZaMCmRxtUmy3vTlDDLscijuyH9yHDfydbt8YdE+fW8\n voNdqpM0NzYtSEHQ0nBFb293KgWF5O5+enWt/pLbxQY7x/49VGqpADO8c2RguT9y2S/y\n 45l1plCyYbuFAcd89BCjluC/DNakCEIFYRLP3+O0oA8JjBScB7N1YR4PfJK1I9WwuXD4 1Q==", "From": "Tomasz Duszynski <tduszynski@marvell.com>", "To": "<dev@dpdk.org>", "CC": "<jpalider@marvell.com>, <jerinj@marvell.com>, Tomasz Duszynski\n <tduszynski@marvell.com>, Nithin Dabilpuram <ndabilpuram@marvell.com>,\n \"Kiran Kumar K\" <kirankumark@marvell.com>,\n Sunil Kumar Kori <skori@marvell.com>,\n Satha Rao <skoteshwar@marvell.com>, Ray Kinsella <mdr@ashroe.eu>,\n Neil Horman <nhorman@tuxdriver.com>", "Date": "Mon, 31 May 2021 23:41:35 +0200", "Message-ID": "<20210531214142.30167-22-tduszynski@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20210531214142.30167-1-tduszynski@marvell.com>", "References": "<20210531214142.30167-1-tduszynski@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "TL1e9MprKOF_YYTYeZIr-_3u5j34zPnM", "X-Proofpoint-ORIG-GUID": "TL1e9MprKOF_YYTYeZIr-_3u5j34zPnM", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761\n definitions=2021-05-31_15:2021-05-31,\n 2021-05-31 signatures=0", "Subject": "[dpdk-dev] [PATCH 21/28] common/cnxk: add support for clearing bphy\n irq handler", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add support for clearing previously register baseband phy irq handler.\n\nSigned-off-by: Jakub Palider <jpalider@marvell.com>\nSigned-off-by: Tomasz Duszynski <tduszynski@marvell.com>\n---\n drivers/common/cnxk/roc_bphy_irq.c | 66 ++++++++++++++++++++++++++++++\n drivers/common/cnxk/roc_bphy_irq.h | 2 +\n drivers/common/cnxk/version.map | 1 +\n 3 files changed, 69 insertions(+)", "diff": "diff --git a/drivers/common/cnxk/roc_bphy_irq.c b/drivers/common/cnxk/roc_bphy_irq.c\nindex f988abf51..4b87fc801 100644\n--- a/drivers/common/cnxk/roc_bphy_irq.c\n+++ b/drivers/common/cnxk/roc_bphy_irq.c\n@@ -33,6 +33,7 @@ struct roc_bphy_irq_stack {\n #define ROC_BPHY_IOC_MAGIC 0xF3\n #define ROC_BPHY_IOC_SET_BPHY_HANDLER \\\n \t_IOW(ROC_BPHY_IOC_MAGIC, 1, struct roc_bphy_irq_usr_data)\n+#define ROC_BPHY_IOC_CLR_BPHY_HANDLER\t_IO(ROC_BPHY_IOC_MAGIC, 2)\n #define ROC_BPHY_IOC_GET_BPHY_MAX_IRQ\t_IOR(ROC_BPHY_IOC_MAGIC, 3, uint64_t)\n #define ROC_BPHY_IOC_GET_BPHY_BMASK_IRQ _IOR(ROC_BPHY_IOC_MAGIC, 4, uint64_t)\n \n@@ -316,3 +317,68 @@ roc_bphy_intr_available(struct roc_bphy_irq_chip *irq_chip, int irq_num)\n \n \treturn irq_chip->avail_irq_bmask & BIT(irq_num);\n }\n+\n+int\n+roc_bphy_handler_clear(struct roc_bphy_irq_chip *chip, int irq_num)\n+{\n+\troc_cpuset_t orig_cpuset, intr_cpuset;\n+\tconst struct plt_memzone *mz;\n+\tint retval;\n+\n+\tif (chip == NULL)\n+\t\treturn -EINVAL;\n+\tif ((uint64_t)irq_num >= chip->max_irq || irq_num < 0)\n+\t\treturn -EINVAL;\n+\tif (!roc_bphy_intr_available(chip, irq_num))\n+\t\treturn -ENOTSUP;\n+\tif (chip->irq_vecs[irq_num].handler == NULL)\n+\t\treturn -EINVAL;\n+\tmz = plt_memzone_lookup(chip->mz_name);\n+\tif (mz == NULL)\n+\t\treturn -ENXIO;\n+\n+\tretval = pthread_getaffinity_np(pthread_self(), sizeof(orig_cpuset),\n+\t\t\t\t\t&orig_cpuset);\n+\tif (retval < 0) {\n+\t\tplt_warn(\"Failed to get affinity mask\");\n+\t\tCPU_ZERO(&orig_cpuset);\n+\t\tCPU_SET(0, &orig_cpuset);\n+\t}\n+\n+\tCPU_ZERO(&intr_cpuset);\n+\tCPU_SET(chip->irq_vecs[irq_num].handler_cpu, &intr_cpuset);\n+\tretval = pthread_setaffinity_np(pthread_self(), sizeof(intr_cpuset),\n+\t\t\t\t\t&intr_cpuset);\n+\tif (retval < 0) {\n+\t\tplt_warn(\"Failed to set affinity mask\");\n+\t\tCPU_ZERO(&orig_cpuset);\n+\t\tCPU_SET(0, &orig_cpuset);\n+\t}\n+\n+\tretval = ioctl(chip->intfd, ROC_BPHY_IOC_CLR_BPHY_HANDLER, irq_num);\n+\tif (retval == 0) {\n+\t\troc_bphy_irq_stack_remove(chip->irq_vecs[irq_num].handler_cpu);\n+\t\tchip->n_handlers--;\n+\t\tchip->irq_vecs[irq_num].isr_data = NULL;\n+\t\tchip->irq_vecs[irq_num].handler = NULL;\n+\t\tchip->irq_vecs[irq_num].handler_cpu = -1;\n+\t\tif (chip->n_handlers == 0) {\n+\t\t\tretval = plt_memzone_free(mz);\n+\t\t\tif (retval < 0)\n+\t\t\t\tplt_err(\"Failed to free memzone: irq %d\",\n+\t\t\t\t\tirq_num);\n+\t\t}\n+\t} else {\n+\t\tplt_err(\"Failed to clear bphy interrupt handler\");\n+\t}\n+\n+\tretval = pthread_setaffinity_np(pthread_self(), sizeof(orig_cpuset),\n+\t\t\t\t\t&orig_cpuset);\n+\tif (retval < 0) {\n+\t\tplt_warn(\"Failed to restore affinity mask\");\n+\t\tCPU_ZERO(&orig_cpuset);\n+\t\tCPU_SET(0, &orig_cpuset);\n+\t}\n+\n+\treturn retval;\n+}\ndiff --git a/drivers/common/cnxk/roc_bphy_irq.h b/drivers/common/cnxk/roc_bphy_irq.h\nindex 7dd23f4ab..778764f68 100644\n--- a/drivers/common/cnxk/roc_bphy_irq.h\n+++ b/drivers/common/cnxk/roc_bphy_irq.h\n@@ -32,5 +32,7 @@ roc_bphy_irq_handler_set(struct roc_bphy_irq_chip *chip, int irq_num,\n \t\t\t void *isr_data);\n __roc_api bool roc_bphy_intr_available(struct roc_bphy_irq_chip *irq_chip,\n \t\t\t\t int irq_num);\n+__roc_api int roc_bphy_handler_clear(struct roc_bphy_irq_chip *chip,\n+\t\t\t\t int irq_num);\n \n #endif /* _ROC_BPHY_IRQ_ */\ndiff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map\nindex 861a97cc0..941055ba0 100644\n--- a/drivers/common/cnxk/version.map\n+++ b/drivers/common/cnxk/version.map\n@@ -22,6 +22,7 @@ INTERNAL {\n \troc_bphy_cgx_stop_rxtx;\n \troc_bphy_dev_fini;\n \troc_bphy_dev_init;\n+\troc_bphy_handler_clear;\n \troc_bphy_intr_available;\n \troc_bphy_intr_fini;\n \troc_bphy_intr_handler;\n", "prefixes": [ "21/28" ] }