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GET /api/patches/95022/?format=api
{ "id": 95022, "url": "http://patchwork.dpdk.org/api/patches/95022/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210630020415.95411-2-feifei.wang2@arm.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210630020415.95411-2-feifei.wang2@arm.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210630020415.95411-2-feifei.wang2@arm.com", "date": "2021-06-30T02:04:13", "name": "[v2,1/2] net/i40e: improve performance for scalar Tx", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "b6a92aac07ea6493baf201d48bcba0eace7ad05e", "submitter": { "id": 1771, "url": "http://patchwork.dpdk.org/api/people/1771/?format=api", "name": "Feifei Wang", "email": "feifei.wang2@arm.com" }, "delegate": { "id": 1540, "url": "http://patchwork.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210630020415.95411-2-feifei.wang2@arm.com/mbox/", "series": [ { "id": 17535, "url": "http://patchwork.dpdk.org/api/series/17535/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=17535", "date": "2021-06-30T02:04:12", "name": "net/i40e: improve free mbuf for Tx", "version": 2, "mbox": "http://patchwork.dpdk.org/series/17535/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/95022/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/95022/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id D3993A0A0F;\n\tWed, 30 Jun 2021 04:04:28 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 101E241219;\n\tWed, 30 Jun 2021 04:04:27 +0200 (CEST)", "from foss.arm.com (foss.arm.com [217.140.110.172])\n by mails.dpdk.org (Postfix) with ESMTP id 9B52B41218\n for <dev@dpdk.org>; Wed, 30 Jun 2021 04:04:25 +0200 (CEST)", "from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14])\n by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 158AAD6E;\n Tue, 29 Jun 2021 19:04:25 -0700 (PDT)", "from net-x86-dell-8268.shanghai.arm.com\n (net-x86-dell-8268.shanghai.arm.com [10.169.210.141])\n by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 2BAC43F694;\n Tue, 29 Jun 2021 19:04:22 -0700 (PDT)" ], "From": "Feifei Wang <feifei.wang2@arm.com>", "To": "Beilei Xing <beilei.xing@intel.com>", "Cc": "dev@dpdk.org, nd@arm.com, Feifei Wang <feifei.wang2@arm.com>,\n Ruifeng Wang <ruifeng.wang@arm.com>", "Date": "Wed, 30 Jun 2021 10:04:13 +0800", "Message-Id": "<20210630020415.95411-2-feifei.wang2@arm.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20210630020415.95411-1-feifei.wang2@arm.com>", "References": "<20210630020415.95411-1-feifei.wang2@arm.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v2 1/2] net/i40e: improve performance for scalar\n Tx", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "For i40e scalar Tx path, if implement FAST_FREE_MBUF mode, it means\nper-queue all mbufs come from the same mempool and have refcnt = 1.\n\nThus we can use bulk free of the buffers when mbuf fast free mode is\nenabled.\n\nFollowing are the test results with this patch:\n\nMRR L3FWD Test:\ntwo ports & bi-directional flows & one core\nRX API: i40e_recv_pkts_bulk_alloc\nTX API: i40e_xmit_pkts_simple\nring_descs_size = 1024;\nRing_I40E_TX_MAX_FREE_SZ = 64;\ntx_rs_thresh = I40E_DEFAULT_TX_RSBIT_THRESH = 32;\ntx_free_thresh = I40E_DEFAULT_TX_FREE_THRESH = 32;\n\nFor scalar path in arm platform with default 'tx_rs_thresh':\nIn n1sdp, performance is improved by 7.9%;\nIn thunderx2, performance is improved by 7.6%.\n\nFor scalar path in x86 platform with default 'tx_rs_thresh':\nperformance is improved by 4.7%.\n\nSuggested-by: Ruifeng Wang <ruifeng.wang@arm.com>\nSigned-off-by: Feifei Wang <feifei.wang2@arm.com>\nReviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>\n---\n drivers/net/i40e/i40e_rxtx.c | 26 ++++++++++++++++++++++----\n 1 file changed, 22 insertions(+), 4 deletions(-)", "diff": "diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c\nindex 6c58decece..8c72391cde 100644\n--- a/drivers/net/i40e/i40e_rxtx.c\n+++ b/drivers/net/i40e/i40e_rxtx.c\n@@ -1294,7 +1294,11 @@ static __rte_always_inline int\n i40e_tx_free_bufs(struct i40e_tx_queue *txq)\n {\n \tstruct i40e_tx_entry *txep;\n-\tuint16_t i;\n+\tint n = txq->tx_rs_thresh;\n+\tuint16_t i = 0, j = 0;\n+\tstruct rte_mbuf *free[RTE_I40E_TX_MAX_FREE_BUF_SZ];\n+\tconst int32_t k = RTE_ALIGN_FLOOR(n, RTE_I40E_TX_MAX_FREE_BUF_SZ);\n+\tconst int32_t m = n % RTE_I40E_TX_MAX_FREE_BUF_SZ;\n \n \tif ((txq->tx_ring[txq->tx_next_dd].cmd_type_offset_bsz &\n \t\t\trte_cpu_to_le_64(I40E_TXD_QW1_DTYPE_MASK)) !=\n@@ -1307,9 +1311,23 @@ i40e_tx_free_bufs(struct i40e_tx_queue *txq)\n \t\trte_prefetch0((txep + i)->mbuf);\n \n \tif (txq->offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE) {\n-\t\tfor (i = 0; i < txq->tx_rs_thresh; ++i, ++txep) {\n-\t\t\trte_mempool_put(txep->mbuf->pool, txep->mbuf);\n-\t\t\ttxep->mbuf = NULL;\n+\t\tif (k) {\n+\t\t\tfor (j = 0; j != k; j += RTE_I40E_TX_MAX_FREE_BUF_SZ) {\n+\t\t\t\tfor (i = 0; i < RTE_I40E_TX_MAX_FREE_BUF_SZ; ++i, ++txep) {\n+\t\t\t\t\tfree[i] = txep->mbuf;\n+\t\t\t\t\ttxep->mbuf = NULL;\n+\t\t\t\t}\n+\t\t\t\trte_mempool_put_bulk(free[0]->pool, (void **)free,\n+\t\t\t\t\t\tRTE_I40E_TX_MAX_FREE_BUF_SZ);\n+\t\t\t}\n+\t\t}\n+\n+\t\tif (m) {\n+\t\t\tfor (i = 0; i < m; ++i, ++txep) {\n+\t\t\t\tfree[i] = txep->mbuf;\n+\t\t\t\ttxep->mbuf = NULL;\n+\t\t\t}\n+\t\t\trte_mempool_put_bulk(free[0]->pool, (void **)free, m);\n \t\t}\n \t} else {\n \t\tfor (i = 0; i < txq->tx_rs_thresh; ++i, ++txep) {\n", "prefixes": [ "v2", "1/2" ] }