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GET /api/patches/95070/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 95070,
    "url": "http://patchwork.dpdk.org/api/patches/95070/?format=api",
    "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210630124609.8711-17-suanmingm@nvidia.com/",
    "project": {
        "id": 1,
        "url": "http://patchwork.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
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    "msgid": "<20210630124609.8711-17-suanmingm@nvidia.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20210630124609.8711-17-suanmingm@nvidia.com",
    "date": "2021-06-30T12:46:03",
    "name": "[v2,16/22] net/mlx5: enable index pool per-core cache",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "5716fa85a0b40d702c186b7d2dd51c7591a97111",
    "submitter": {
        "id": 1887,
        "url": "http://patchwork.dpdk.org/api/people/1887/?format=api",
        "name": "Suanming Mou",
        "email": "suanmingm@nvidia.com"
    },
    "delegate": {
        "id": 3268,
        "url": "http://patchwork.dpdk.org/api/users/3268/?format=api",
        "username": "rasland",
        "first_name": "Raslan",
        "last_name": "Darawsheh",
        "email": "rasland@nvidia.com"
    },
    "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210630124609.8711-17-suanmingm@nvidia.com/mbox/",
    "series": [
        {
            "id": 17549,
            "url": "http://patchwork.dpdk.org/api/series/17549/?format=api",
            "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=17549",
            "date": "2021-06-30T12:45:47",
            "name": "net/mlx5: insertion rate optimization",
            "version": 2,
            "mbox": "http://patchwork.dpdk.org/series/17549/mbox/"
        }
    ],
    "comments": "http://patchwork.dpdk.org/api/patches/95070/comments/",
    "check": "success",
    "checks": "http://patchwork.dpdk.org/api/patches/95070/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "From": "Suanming Mou <suanmingm@nvidia.com>",
        "To": "<viacheslavo@nvidia.com>, <matan@nvidia.com>",
        "CC": "<rasland@nvidia.com>, <orika@nvidia.com>, <dev@dpdk.org>",
        "Date": "Wed, 30 Jun 2021 15:46:03 +0300",
        "Message-ID": "<20210630124609.8711-17-suanmingm@nvidia.com>",
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        "Subject": "[dpdk-dev] [PATCH v2 16/22] net/mlx5: enable index pool per-core\n cache",
        "X-BeenThere": "dev@dpdk.org",
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        "Errors-To": "dev-bounces@dpdk.org",
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    },
    "content": "This commit enables the tag and header modify action index pool\nper-core cache in non-reclaim memory mode.\n\nSigned-off-by: Suanming Mou <suanmingm@nvidia.com>\nAcked-by: Matan Azrad <matan@nvidia.com>\n---\n drivers/net/mlx5/mlx5.c         | 4 +++-\n drivers/net/mlx5/mlx5.h         | 1 +\n drivers/net/mlx5/mlx5_flow_dv.c | 3 ++-\n 3 files changed, 6 insertions(+), 2 deletions(-)",
    "diff": "diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c\nindex 8fb7f4442d..bf1463c289 100644\n--- a/drivers/net/mlx5/mlx5.c\n+++ b/drivers/net/mlx5/mlx5.c\n@@ -214,7 +214,8 @@ static const struct mlx5_indexed_pool_config mlx5_ipool_cfg[] = {\n \t\t.grow_trunk = 3,\n \t\t.grow_shift = 2,\n \t\t.need_lock = 1,\n-\t\t.release_mem_en = 1,\n+\t\t.release_mem_en = 0,\n+\t\t.per_core_cache = (1 << 16),\n \t\t.malloc = mlx5_malloc,\n \t\t.free = mlx5_free,\n \t\t.type = \"mlx5_tag_ipool\",\n@@ -1128,6 +1129,7 @@ mlx5_alloc_shared_dev_ctx(const struct mlx5_dev_spawn_data *spawn,\n \t}\n \tsh->refcnt = 1;\n \tsh->max_port = spawn->max_port;\n+\tsh->reclaim_mode = config->reclaim_mode;\n \tstrncpy(sh->ibdev_name, mlx5_os_get_ctx_device_name(sh->ctx),\n \t\tsizeof(sh->ibdev_name) - 1);\n \tstrncpy(sh->ibdev_path, mlx5_os_get_ctx_device_path(sh->ctx),\ndiff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex 5774f63244..516f3ffae5 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -1093,6 +1093,7 @@ struct mlx5_dev_ctx_shared {\n \tuint32_t qp_ts_format:2; /* QP timestamp formats supported. */\n \tuint32_t meter_aso_en:1; /* Flow Meter ASO is supported. */\n \tuint32_t ct_aso_en:1; /* Connection Tracking ASO is supported. */\n+\tuint32_t reclaim_mode:1; /* Reclaim memory. */\n \tuint32_t max_port; /* Maximal IB device port index. */\n \tstruct mlx5_bond_info bond; /* Bonding information. */\n \tvoid *ctx; /* Verbs/DV/DevX context. */\ndiff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c\nindex 08704d892a..f79c60e489 100644\n--- a/drivers/net/mlx5/mlx5_flow_dv.c\n+++ b/drivers/net/mlx5/mlx5_flow_dv.c\n@@ -5321,7 +5321,8 @@ flow_dv_modify_ipool_get(struct mlx5_dev_ctx_shared *sh, uint8_t index)\n \t\t       .grow_trunk = 3,\n \t\t       .grow_shift = 2,\n \t\t       .need_lock = 1,\n-\t\t       .release_mem_en = 1,\n+\t\t       .release_mem_en = !!sh->reclaim_mode,\n+\t\t       .per_core_cache = sh->reclaim_mode ? 0 : (1 << 16),\n \t\t       .malloc = mlx5_malloc,\n \t\t       .free = mlx5_free,\n \t\t       .type = \"mlx5_modify_action_resource\",\n",
    "prefixes": [
        "v2",
        "16/22"
    ]
}