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GET /api/patches/95352/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 95352,
    "url": "http://patchwork.dpdk.org/api/patches/95352/?format=api",
    "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210706095545.10776-8-jiawenwu@trustnetic.com/",
    "project": {
        "id": 1,
        "url": "http://patchwork.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20210706095545.10776-8-jiawenwu@trustnetic.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20210706095545.10776-8-jiawenwu@trustnetic.com",
    "date": "2021-07-06T09:55:33",
    "name": "[v7,07/19] net/ngbe: add HW initialization",
    "commit_ref": null,
    "pull_url": null,
    "state": "changes-requested",
    "archived": true,
    "hash": "20065c2e4034fdcc047d6aa5ca5535a2324214b7",
    "submitter": {
        "id": 1932,
        "url": "http://patchwork.dpdk.org/api/people/1932/?format=api",
        "name": "Jiawen Wu",
        "email": "jiawenwu@trustnetic.com"
    },
    "delegate": {
        "id": 3961,
        "url": "http://patchwork.dpdk.org/api/users/3961/?format=api",
        "username": "arybchenko",
        "first_name": "Andrew",
        "last_name": "Rybchenko",
        "email": "andrew.rybchenko@oktetlabs.ru"
    },
    "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210706095545.10776-8-jiawenwu@trustnetic.com/mbox/",
    "series": [
        {
            "id": 17659,
            "url": "http://patchwork.dpdk.org/api/series/17659/?format=api",
            "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=17659",
            "date": "2021-07-06T09:55:28",
            "name": "net: ngbe PMD",
            "version": 7,
            "mbox": "http://patchwork.dpdk.org/series/17659/mbox/"
        }
    ],
    "comments": "http://patchwork.dpdk.org/api/patches/95352/comments/",
    "check": "success",
    "checks": "http://patchwork.dpdk.org/api/patches/95352/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id AD21DA0C47;\n\tTue,  6 Jul 2021 11:57:18 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 08E6D412A6;\n\tTue,  6 Jul 2021 11:56:12 +0200 (CEST)",
            "from smtpbgsg2.qq.com (smtpbgsg2.qq.com [54.254.200.128])\n by mails.dpdk.org (Postfix) with ESMTP id 513DD41288\n for <dev@dpdk.org>; Tue,  6 Jul 2021 11:56:08 +0200 (CEST)",
            "from jiawenwu.trustnetic.com (unknown [183.129.236.74])\n by esmtp6.qq.com (ESMTP) with\n id ; Tue, 06 Jul 2021 17:56:04 +0800 (CST)"
        ],
        "X-QQ-mid": "bizesmtp51t1625565364t78a2sir",
        "X-QQ-SSF": "01400000002000D0E000B00A0000000",
        "X-QQ-FEAT": "fOE8QyBTlyHsAX1tYa3b1G8CwQ+/CdJb7OJAjXt8MdFIAXyKZae49xPhjedl7\n uxPft5E69IuC3R/0DQczBU8WGqCH/GxHHI2z1DuQRbpf6s4JEf1B/Oh4nsrD/v6tCKYA2S2\n vGwwYBGJ5Phc6GRvYpu/2plrlzkC4+v/SDZh286JBdHvF8e57KAHP6whWSa3ST2j1KfSbnk\n tcqDZj26wfH+Ma2gOizS6WKBcqvBo0kPepzaEl3szh8Nq/a141qI0iDlWmszDdRnIEs24m/\n 0V5xeP59IZo8KV5pYfF4vnhIEY4dMVe+TNd0HRh6NpDQ14R+16dp+uTIgdWgyjLC4H1h4t6\n /0mxe2yIEbnScS5vfpz1wGPrkwVccAxEe7AKgRy",
        "X-QQ-GoodBg": "2",
        "From": "Jiawen Wu <jiawenwu@trustnetic.com>",
        "To": "dev@dpdk.org",
        "Cc": "Jiawen Wu <jiawenwu@trustnetic.com>",
        "Date": "Tue,  6 Jul 2021 17:55:33 +0800",
        "Message-Id": "<20210706095545.10776-8-jiawenwu@trustnetic.com>",
        "X-Mailer": "git-send-email 2.21.0.windows.1",
        "In-Reply-To": "<20210706095545.10776-1-jiawenwu@trustnetic.com>",
        "References": "<20210706095545.10776-1-jiawenwu@trustnetic.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "X-QQ-SENDSIZE": "520",
        "Feedback-ID": "bizesmtp:trustnetic.com:qybgforeign:qybgforeign2",
        "X-QQ-Bgrelay": "1",
        "Subject": "[dpdk-dev] [PATCH v7 07/19] net/ngbe: add HW initialization",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Initialize the hardware by resetting the hardware in base code.\n\nSigned-off-by: Jiawen Wu <jiawenwu@trustnetic.com>\n---\n drivers/net/ngbe/base/ngbe_dummy.h |  21 +++\n drivers/net/ngbe/base/ngbe_hw.c    | 235 +++++++++++++++++++++++++++++\n drivers/net/ngbe/base/ngbe_hw.h    |   9 ++\n drivers/net/ngbe/base/ngbe_type.h  |  30 ++++\n drivers/net/ngbe/ngbe_ethdev.c     |  16 ++\n 5 files changed, 311 insertions(+)",
    "diff": "diff --git a/drivers/net/ngbe/base/ngbe_dummy.h b/drivers/net/ngbe/base/ngbe_dummy.h\nindex c9c17dcad8..3445e7475a 100644\n--- a/drivers/net/ngbe/base/ngbe_dummy.h\n+++ b/drivers/net/ngbe/base/ngbe_dummy.h\n@@ -38,6 +38,19 @@ static inline s32 ngbe_rom_validate_checksum_dummy(struct ngbe_hw *TUP0,\n {\n \treturn NGBE_ERR_OPS_DUMMY;\n }\n+/* struct ngbe_mac_operations */\n+static inline s32 ngbe_mac_init_hw_dummy(struct ngbe_hw *TUP0)\n+{\n+\treturn NGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 ngbe_mac_reset_hw_dummy(struct ngbe_hw *TUP0)\n+{\n+\treturn NGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 ngbe_mac_stop_hw_dummy(struct ngbe_hw *TUP0)\n+{\n+\treturn NGBE_ERR_OPS_DUMMY;\n+}\n static inline s32 ngbe_mac_acquire_swfw_sync_dummy(struct ngbe_hw *TUP0,\n \t\t\t\t\tu32 TUP1)\n {\n@@ -47,13 +60,21 @@ static inline void ngbe_mac_release_swfw_sync_dummy(struct ngbe_hw *TUP0,\n \t\t\t\t\tu32 TUP1)\n {\n }\n+static inline s32 ngbe_mac_init_thermal_ssth_dummy(struct ngbe_hw *TUP0)\n+{\n+\treturn NGBE_ERR_OPS_DUMMY;\n+}\n static inline void ngbe_init_ops_dummy(struct ngbe_hw *hw)\n {\n \thw->bus.set_lan_id = ngbe_bus_set_lan_id_dummy;\n \thw->rom.init_params = ngbe_rom_init_params_dummy;\n \thw->rom.validate_checksum = ngbe_rom_validate_checksum_dummy;\n+\thw->mac.init_hw = ngbe_mac_init_hw_dummy;\n+\thw->mac.reset_hw = ngbe_mac_reset_hw_dummy;\n+\thw->mac.stop_hw = ngbe_mac_stop_hw_dummy;\n \thw->mac.acquire_swfw_sync = ngbe_mac_acquire_swfw_sync_dummy;\n \thw->mac.release_swfw_sync = ngbe_mac_release_swfw_sync_dummy;\n+\thw->mac.init_thermal_sensor_thresh = ngbe_mac_init_thermal_ssth_dummy;\n }\n \n #endif /* _NGBE_TYPE_DUMMY_H_ */\ndiff --git a/drivers/net/ngbe/base/ngbe_hw.c b/drivers/net/ngbe/base/ngbe_hw.c\nindex a9819e4a84..446f4b52b5 100644\n--- a/drivers/net/ngbe/base/ngbe_hw.c\n+++ b/drivers/net/ngbe/base/ngbe_hw.c\n@@ -8,6 +8,133 @@\n #include \"ngbe_mng.h\"\n #include \"ngbe_hw.h\"\n \n+/**\n+ *  ngbe_init_hw - Generic hardware initialization\n+ *  @hw: pointer to hardware structure\n+ *\n+ *  Initialize the hardware by resetting the hardware, filling the bus info\n+ *  structure and media type, clears all on chip counters, initializes receive\n+ *  address registers, multicast table, VLAN filter table, calls routine to set\n+ *  up link and flow control settings, and leaves transmit and receive units\n+ *  disabled and uninitialized\n+ **/\n+s32 ngbe_init_hw(struct ngbe_hw *hw)\n+{\n+\ts32 status;\n+\n+\tDEBUGFUNC(\"ngbe_init_hw\");\n+\n+\t/* Reset the hardware */\n+\tstatus = hw->mac.reset_hw(hw);\n+\n+\tif (status != 0)\n+\t\tDEBUGOUT(\"Failed to initialize HW, STATUS = %d\\n\", status);\n+\n+\treturn status;\n+}\n+\n+static void\n+ngbe_reset_misc_em(struct ngbe_hw *hw)\n+{\n+\tint i;\n+\n+\twr32(hw, NGBE_ISBADDRL, hw->isb_dma & 0xFFFFFFFF);\n+\twr32(hw, NGBE_ISBADDRH, hw->isb_dma >> 32);\n+\n+\t/* receive packets that size > 2048 */\n+\twr32m(hw, NGBE_MACRXCFG,\n+\t\tNGBE_MACRXCFG_JUMBO, NGBE_MACRXCFG_JUMBO);\n+\n+\twr32m(hw, NGBE_FRMSZ, NGBE_FRMSZ_MAX_MASK,\n+\t\tNGBE_FRMSZ_MAX(NGBE_FRAME_SIZE_DFT));\n+\n+\t/* clear counters on read */\n+\twr32m(hw, NGBE_MACCNTCTL,\n+\t\tNGBE_MACCNTCTL_RC, NGBE_MACCNTCTL_RC);\n+\n+\twr32m(hw, NGBE_RXFCCFG,\n+\t\tNGBE_RXFCCFG_FC, NGBE_RXFCCFG_FC);\n+\twr32m(hw, NGBE_TXFCCFG,\n+\t\tNGBE_TXFCCFG_FC, NGBE_TXFCCFG_FC);\n+\n+\twr32m(hw, NGBE_MACRXFLT,\n+\t\tNGBE_MACRXFLT_PROMISC, NGBE_MACRXFLT_PROMISC);\n+\n+\twr32m(hw, NGBE_RSTSTAT,\n+\t\tNGBE_RSTSTAT_TMRINIT_MASK, NGBE_RSTSTAT_TMRINIT(30));\n+\n+\t/* errata 4: initialize mng flex tbl and wakeup flex tbl*/\n+\twr32(hw, NGBE_MNGFLEXSEL, 0);\n+\tfor (i = 0; i < 16; i++) {\n+\t\twr32(hw, NGBE_MNGFLEXDWL(i), 0);\n+\t\twr32(hw, NGBE_MNGFLEXDWH(i), 0);\n+\t\twr32(hw, NGBE_MNGFLEXMSK(i), 0);\n+\t}\n+\twr32(hw, NGBE_LANFLEXSEL, 0);\n+\tfor (i = 0; i < 16; i++) {\n+\t\twr32(hw, NGBE_LANFLEXDWL(i), 0);\n+\t\twr32(hw, NGBE_LANFLEXDWH(i), 0);\n+\t\twr32(hw, NGBE_LANFLEXMSK(i), 0);\n+\t}\n+\n+\t/* set pause frame dst mac addr */\n+\twr32(hw, NGBE_RXPBPFCDMACL, 0xC2000001);\n+\twr32(hw, NGBE_RXPBPFCDMACH, 0x0180);\n+\n+\twr32(hw, NGBE_MDIOMODE, 0xF);\n+\n+\twr32m(hw, NGBE_GPIE, NGBE_GPIE_MSIX, NGBE_GPIE_MSIX);\n+\n+\tif ((hw->sub_system_id & NGBE_OEM_MASK) == NGBE_LY_M88E1512_SFP ||\n+\t\t(hw->sub_system_id & NGBE_OEM_MASK) == NGBE_LY_YT8521S_SFP) {\n+\t\t/* gpio0 is used to power on/off control*/\n+\t\twr32(hw, NGBE_GPIODIR, NGBE_GPIODIR_DDR(1));\n+\t\twr32(hw, NGBE_GPIODATA, NGBE_GPIOBIT_0);\n+\t}\n+\n+\thw->mac.init_thermal_sensor_thresh(hw);\n+\n+\t/* enable mac transmitter */\n+\twr32m(hw, NGBE_MACTXCFG, NGBE_MACTXCFG_TE, NGBE_MACTXCFG_TE);\n+\n+\t/* sellect GMII */\n+\twr32m(hw, NGBE_MACTXCFG,\n+\t\tNGBE_MACTXCFG_SPEED_MASK, NGBE_MACTXCFG_SPEED_1G);\n+\n+\tfor (i = 0; i < 4; i++)\n+\t\twr32m(hw, NGBE_IVAR(i), 0x80808080, 0);\n+}\n+\n+/**\n+ *  ngbe_reset_hw_em - Perform hardware reset\n+ *  @hw: pointer to hardware structure\n+ *\n+ *  Resets the hardware by resetting the transmit and receive units, masks\n+ *  and clears all interrupts, perform a PHY reset, and perform a link (MAC)\n+ *  reset.\n+ **/\n+s32 ngbe_reset_hw_em(struct ngbe_hw *hw)\n+{\n+\ts32 status;\n+\n+\tDEBUGFUNC(\"ngbe_reset_hw_em\");\n+\n+\t/* Call adapter stop to disable tx/rx and clear interrupts */\n+\tstatus = hw->mac.stop_hw(hw);\n+\tif (status != 0)\n+\t\treturn status;\n+\n+\twr32(hw, NGBE_RST, NGBE_RST_LAN(hw->bus.lan_id));\n+\tngbe_flush(hw);\n+\tmsec_delay(50);\n+\n+\tngbe_reset_misc_em(hw);\n+\n+\tmsec_delay(50);\n+\n+\treturn status;\n+}\n+\n /**\n  *  ngbe_set_lan_id_multi_port - Set LAN id for PCIe multiple port devices\n  *  @hw: pointer to the HW structure\n@@ -27,6 +154,57 @@ void ngbe_set_lan_id_multi_port(struct ngbe_hw *hw)\n \tbus->func = bus->lan_id;\n }\n \n+/**\n+ *  ngbe_stop_hw - Generic stop Tx/Rx units\n+ *  @hw: pointer to hardware structure\n+ *\n+ *  Sets the adapter_stopped flag within ngbe_hw struct. Clears interrupts,\n+ *  disables transmit and receive units. The adapter_stopped flag is used by\n+ *  the shared code and drivers to determine if the adapter is in a stopped\n+ *  state and should not touch the hardware.\n+ **/\n+s32 ngbe_stop_hw(struct ngbe_hw *hw)\n+{\n+\tu32 reg_val;\n+\tu16 i;\n+\n+\tDEBUGFUNC(\"ngbe_stop_hw\");\n+\n+\t/*\n+\t * Set the adapter_stopped flag so other driver functions stop touching\n+\t * the hardware\n+\t */\n+\thw->adapter_stopped = true;\n+\n+\t/* Disable the receive unit */\n+\tngbe_disable_rx(hw);\n+\n+\t/* Clear interrupt mask to stop interrupts from being generated */\n+\twr32(hw, NGBE_IENMISC, 0);\n+\twr32(hw, NGBE_IMS(0), NGBE_IMS_MASK);\n+\n+\t/* Clear any pending interrupts, flush previous writes */\n+\twr32(hw, NGBE_ICRMISC, NGBE_ICRMISC_MASK);\n+\twr32(hw, NGBE_ICR(0), NGBE_ICR_MASK);\n+\n+\t/* Disable the transmit unit.  Each queue must be disabled. */\n+\tfor (i = 0; i < hw->mac.max_tx_queues; i++)\n+\t\twr32(hw, NGBE_TXCFG(i), NGBE_TXCFG_FLUSH);\n+\n+\t/* Disable the receive unit by stopping each queue */\n+\tfor (i = 0; i < hw->mac.max_rx_queues; i++) {\n+\t\treg_val = rd32(hw, NGBE_RXCFG(i));\n+\t\treg_val &= ~NGBE_RXCFG_ENA;\n+\t\twr32(hw, NGBE_RXCFG(i), reg_val);\n+\t}\n+\n+\t/* flush all queues disables */\n+\tngbe_flush(hw);\n+\tmsec_delay(2);\n+\n+\treturn 0;\n+}\n+\n /**\n  *  ngbe_acquire_swfw_sync - Acquire SWFW semaphore\n  *  @hw: pointer to hardware structure\n@@ -98,6 +276,54 @@ void ngbe_release_swfw_sync(struct ngbe_hw *hw, u32 mask)\n \tngbe_release_eeprom_semaphore(hw);\n }\n \n+/**\n+ *  ngbe_init_thermal_sensor_thresh - Inits thermal sensor thresholds\n+ *  @hw: pointer to hardware structure\n+ *\n+ *  Inits the thermal sensor thresholds according to the NVM map\n+ *  and save off the threshold and location values into mac.thermal_sensor_data\n+ **/\n+s32 ngbe_init_thermal_sensor_thresh(struct ngbe_hw *hw)\n+{\n+\tstruct ngbe_thermal_sensor_data *data = &hw->mac.thermal_sensor_data;\n+\n+\tDEBUGFUNC(\"ngbe_init_thermal_sensor_thresh\");\n+\n+\tmemset(data, 0, sizeof(struct ngbe_thermal_sensor_data));\n+\n+\tif (hw->bus.lan_id != 0)\n+\t\treturn NGBE_NOT_IMPLEMENTED;\n+\n+\twr32(hw, NGBE_TSINTR,\n+\t\tNGBE_TSINTR_AEN | NGBE_TSINTR_DEN);\n+\twr32(hw, NGBE_TSEN, NGBE_TSEN_ENA);\n+\n+\n+\tdata->sensor[0].alarm_thresh = 115;\n+\twr32(hw, NGBE_TSATHRE, 0x344);\n+\tdata->sensor[0].dalarm_thresh = 110;\n+\twr32(hw, NGBE_TSDTHRE, 0x330);\n+\n+\treturn 0;\n+}\n+\n+void ngbe_disable_rx(struct ngbe_hw *hw)\n+{\n+\tu32 pfdtxgswc;\n+\n+\tpfdtxgswc = rd32(hw, NGBE_PSRCTL);\n+\tif (pfdtxgswc & NGBE_PSRCTL_LBENA) {\n+\t\tpfdtxgswc &= ~NGBE_PSRCTL_LBENA;\n+\t\twr32(hw, NGBE_PSRCTL, pfdtxgswc);\n+\t\thw->mac.set_lben = true;\n+\t} else {\n+\t\thw->mac.set_lben = false;\n+\t}\n+\n+\twr32m(hw, NGBE_PBRXCTL, NGBE_PBRXCTL_ENA, 0);\n+\twr32m(hw, NGBE_MACRXCFG, NGBE_MACRXCFG_ENA, 0);\n+}\n+\n /**\n  *  ngbe_set_mac_type - Sets MAC type\n  *  @hw: pointer to the HW structure\n@@ -216,13 +442,22 @@ s32 ngbe_init_ops_pf(struct ngbe_hw *hw)\n \tbus->set_lan_id = ngbe_set_lan_id_multi_port;\n \n \t/* MAC */\n+\tmac->init_hw = ngbe_init_hw;\n+\tmac->reset_hw = ngbe_reset_hw_em;\n+\tmac->stop_hw = ngbe_stop_hw;\n \tmac->acquire_swfw_sync = ngbe_acquire_swfw_sync;\n \tmac->release_swfw_sync = ngbe_release_swfw_sync;\n \n+\t/* Manageability interface */\n+\tmac->init_thermal_sensor_thresh = ngbe_init_thermal_sensor_thresh;\n+\n \t/* EEPROM */\n \trom->init_params = ngbe_init_eeprom_params;\n \trom->validate_checksum = ngbe_validate_eeprom_checksum_em;\n \n+\tmac->max_rx_queues\t= NGBE_EM_MAX_RX_QUEUES;\n+\tmac->max_tx_queues\t= NGBE_EM_MAX_TX_QUEUES;\n+\n \treturn 0;\n }\n \ndiff --git a/drivers/net/ngbe/base/ngbe_hw.h b/drivers/net/ngbe/base/ngbe_hw.h\nindex a7b80f8200..207d4b269d 100644\n--- a/drivers/net/ngbe/base/ngbe_hw.h\n+++ b/drivers/net/ngbe/base/ngbe_hw.h\n@@ -8,11 +8,20 @@\n \n #include \"ngbe_type.h\"\n \n+#define NGBE_EM_MAX_TX_QUEUES 8\n+#define NGBE_EM_MAX_RX_QUEUES 8\n+\n+s32 ngbe_init_hw(struct ngbe_hw *hw);\n+s32 ngbe_reset_hw_em(struct ngbe_hw *hw);\n+s32 ngbe_stop_hw(struct ngbe_hw *hw);\n+\n void ngbe_set_lan_id_multi_port(struct ngbe_hw *hw);\n \n s32 ngbe_acquire_swfw_sync(struct ngbe_hw *hw, u32 mask);\n void ngbe_release_swfw_sync(struct ngbe_hw *hw, u32 mask);\n \n+s32 ngbe_init_thermal_sensor_thresh(struct ngbe_hw *hw);\n+void ngbe_disable_rx(struct ngbe_hw *hw);\n s32 ngbe_init_shared_code(struct ngbe_hw *hw);\n s32 ngbe_set_mac_type(struct ngbe_hw *hw);\n s32 ngbe_init_ops_pf(struct ngbe_hw *hw);\ndiff --git a/drivers/net/ngbe/base/ngbe_type.h b/drivers/net/ngbe/base/ngbe_type.h\nindex 689184b368..9741cb7687 100644\n--- a/drivers/net/ngbe/base/ngbe_type.h\n+++ b/drivers/net/ngbe/base/ngbe_type.h\n@@ -6,10 +6,25 @@\n #ifndef _NGBE_TYPE_H_\n #define _NGBE_TYPE_H_\n \n+#define NGBE_FRAME_SIZE_DFT       (1522) /* Default frame size, +FCS */\n+\n+#define NGBE_ALIGN\t\t128 /* as intel did */\n+#define NGBE_ISB_SIZE\t\t16\n+\n #include \"ngbe_status.h\"\n #include \"ngbe_osdep.h\"\n #include \"ngbe_devids.h\"\n \n+struct ngbe_thermal_diode_data {\n+\ts16 temp;\n+\ts16 alarm_thresh;\n+\ts16 dalarm_thresh;\n+};\n+\n+struct ngbe_thermal_sensor_data {\n+\tstruct ngbe_thermal_diode_data sensor[1];\n+};\n+\n enum ngbe_eeprom_type {\n \tngbe_eeprom_unknown = 0,\n \tngbe_eeprom_spi,\n@@ -71,9 +86,20 @@ struct ngbe_rom_info {\n };\n \n struct ngbe_mac_info {\n+\ts32 (*init_hw)(struct ngbe_hw *hw);\n+\ts32 (*reset_hw)(struct ngbe_hw *hw);\n+\ts32 (*stop_hw)(struct ngbe_hw *hw);\n \ts32 (*acquire_swfw_sync)(struct ngbe_hw *hw, u32 mask);\n \tvoid (*release_swfw_sync)(struct ngbe_hw *hw, u32 mask);\n+\n+\t/* Manageability interface */\n+\ts32 (*init_thermal_sensor_thresh)(struct ngbe_hw *hw);\n+\n \tenum ngbe_mac_type type;\n+\tu32 max_tx_queues;\n+\tu32 max_rx_queues;\n+\tstruct ngbe_thermal_sensor_data  thermal_sensor_data;\n+\tbool set_lben;\n };\n \n struct ngbe_phy_info {\n@@ -92,6 +118,10 @@ struct ngbe_hw {\n \tu16 vendor_id;\n \tu16 sub_device_id;\n \tu16 sub_system_id;\n+\tbool adapter_stopped;\n+\n+\tuint64_t isb_dma;\n+\tvoid IOMEM *isb_mem;\n \n \tbool is_pf;\n };\ndiff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c\nindex 4548ddd1c4..db929ac99b 100644\n--- a/drivers/net/ngbe/ngbe_ethdev.c\n+++ b/drivers/net/ngbe/ngbe_ethdev.c\n@@ -60,6 +60,7 @@ eth_ngbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);\n \tstruct ngbe_hw *hw = ngbe_dev_hw(eth_dev);\n+\tconst struct rte_memzone *mz;\n \tint err;\n \n \tPMD_INIT_FUNC_TRACE();\n@@ -76,6 +77,15 @@ eth_ngbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)\n \tngbe_map_device_id(hw);\n \thw->hw_addr = (void *)pci_dev->mem_resource[0].addr;\n \n+\t/* Reserve memory for interrupt status block */\n+\tmz = rte_eth_dma_zone_reserve(eth_dev, \"ngbe_driver\", -1,\n+\t\tNGBE_ISB_SIZE, NGBE_ALIGN, SOCKET_ID_ANY);\n+\tif (mz == NULL)\n+\t\treturn -ENOMEM;\n+\n+\thw->isb_dma = TMZ_PADDR(mz);\n+\thw->isb_mem = TMZ_VADDR(mz);\n+\n \t/* Initialize the shared code (base driver) */\n \terr = ngbe_init_shared_code(hw);\n \tif (err != 0) {\n@@ -99,6 +109,12 @@ eth_ngbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)\n \t\treturn -EIO;\n \t}\n \n+\terr = hw->mac.init_hw(hw);\n+\tif (err != 0) {\n+\t\tPMD_INIT_LOG(ERR, \"Hardware Initialization Failure: %d\", err);\n+\t\treturn -EIO;\n+\t}\n+\n \treturn 0;\n }\n \n",
    "prefixes": [
        "v7",
        "07/19"
    ]
}