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GET /api/patches/95686/?format=api
{ "id": 95686, "url": "http://patchwork.dpdk.org/api/patches/95686/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210712064901.1619583-2-psatheesh@marvell.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210712064901.1619583-2-psatheesh@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210712064901.1619583-2-psatheesh@marvell.com", "date": "2021-07-12T06:49:01", "name": "[2/2] net/cnxk: add support for rte flow item raw", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "eb03ca14877b379b7a4b4e907f3af0a3f8992bc0", "submitter": { "id": 1663, "url": "http://patchwork.dpdk.org/api/people/1663/?format=api", "name": "Satheesh Paul Antonysamy", "email": "psatheesh@marvell.com" }, "delegate": { "id": 310, "url": "http://patchwork.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210712064901.1619583-2-psatheesh@marvell.com/mbox/", "series": [ { "id": 17761, "url": "http://patchwork.dpdk.org/api/series/17761/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=17761", "date": "2021-07-12T06:49:00", "name": "[1/2] common/cnxk: add support for rte flow item raw", "version": 1, "mbox": "http://patchwork.dpdk.org/series/17761/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/95686/comments/", "check": "fail", "checks": "http://patchwork.dpdk.org/api/patches/95686/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 8CA4EA0C4F;\n\tMon, 12 Jul 2021 08:49:16 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 9D69841169;\n\tMon, 12 Jul 2021 08:49:14 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id 6B78841169\n for <dev@dpdk.org>; Mon, 12 Jul 2021 08:49:13 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 16C6jTNb003106 for <dev@dpdk.org>; Sun, 11 Jul 2021 23:49:12 -0700", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0a-0016f401.pphosted.com with ESMTP id 39r9hjh5qy-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Sun, 11 Jul 2021 23:49:12 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Sun, 11 Jul 2021 23:49:10 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Sun, 11 Jul 2021 23:49:10 -0700", "from localhost.localdomain (unknown [10.28.34.33])\n by maili.marvell.com (Postfix) with ESMTP id DD6DC5B6940;\n Sun, 11 Jul 2021 23:49:08 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=NRPrBOBH6c8T6tvaDmdyOD7AshbcFMFoJXa44Sre/GA=;\n b=ijxhpseZoOr1Blbz1Y2hsrM6fFr2Hanm+xsyQgt1gBIdwqKxS8uzbNNKuraep7VQ7wgP\n SheV0R+adrbsLLV4I+LG3VIwHMOaqy+ufw+6HnV8LC5IDSC2oHOQONRcy6nFafe6Bnie\n pkJ1w4777xqqmQwz3lhRZFJc0XO3oZKrWm5ddquCGvgiqZ5fE/ITAVEXJ+EJ9pNb8GYQ\n +xcz4e/ajOpIR3k/ui8Dm6xCGPYg9m8no7T04RQ3/8KXKXRgfUPOFRY4QUYazywO4L6h\n R0EauwH5r/TSNFsZ2guN0ixp2RLKFHNn0tRmLfbbe3n+PbCAtO3jbrQY4uCW+G8fAXIs gg==", "From": "<psatheesh@marvell.com>", "To": "Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao\n <skoteshwar@marvell.com>", "CC": "<dev@dpdk.org>, Satheesh Paul <psatheesh@marvell.com>", "Date": "Mon, 12 Jul 2021 12:19:01 +0530", "Message-ID": "<20210712064901.1619583-2-psatheesh@marvell.com>", "X-Mailer": "git-send-email 2.25.4", "In-Reply-To": "<20210712064901.1619583-1-psatheesh@marvell.com>", "References": "<20210712064901.1619583-1-psatheesh@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "g37LTwF-N4dPwVVF1aUfGl341f_yuPCL", "X-Proofpoint-ORIG-GUID": "g37LTwF-N4dPwVVF1aUfGl341f_yuPCL", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790\n definitions=2021-07-12_04:2021-07-12,\n 2021-07-12 signatures=0", "Subject": "[dpdk-dev] [PATCH 2/2] net/cnxk: add support for rte flow item raw", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Satheesh Paul <psatheesh@marvell.com>\n\nAdd support for rte_flow_item_raw to parse custom L2 and L3\nprotocols.\n\nSigned-off-by: Satheesh Paul <psatheesh@marvell.com>\n---\n doc/guides/nics/cnxk.rst | 37 +++++++++++++++++++++++++-\n doc/guides/nics/features/cnxk.ini | 1 +\n doc/guides/nics/features/cnxk_vec.ini | 1 +\n doc/guides/nics/features/cnxk_vf.ini | 1 +\n drivers/net/cnxk/cnxk_ethdev_devargs.c | 7 +++++\n drivers/net/cnxk/cnxk_rte_flow.c | 12 ++++-----\n 6 files changed, 52 insertions(+), 7 deletions(-)", "diff": "diff --git a/doc/guides/nics/cnxk.rst b/doc/guides/nics/cnxk.rst\nindex cb2a51e1d..90d27dbaa 100644\n--- a/doc/guides/nics/cnxk.rst\n+++ b/doc/guides/nics/cnxk.rst\n@@ -165,7 +165,7 @@ Runtime Config Options\n \n With the above configuration, higig2 will be enabled on that port and the\n traffic on this port should be higig2 traffic only. Supported switch header\n- types are \"higig2\", \"dsa\", \"chlen90b\" and \"chlen24b\".\n+ types are \"chlen24b\", \"chlen90b\", \"dsa\", \"exdsa\", \"higig2\" and \"vlan_exdsa\".\n \n - ``RSS tag as XOR`` (default ``0``)\n \n@@ -215,6 +215,41 @@ RTE flow GRE support\n - ``RTE_FLOW_ITEM_TYPE_GRE_KEY`` works only when checksum and routing\n bits in the GRE header are equal to 0.\n \n+Custom protocols supported in RTE Flow\n+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n+\n+The ``RTE_FLOW_ITEM_TYPE_RAW`` can be used to parse the below custom protocols.\n+\n+* ``vlan_exdsa`` and ``exdsa`` can be parsed at L2 level.\n+* ``NGIO`` can be parsed at L3 level.\n+\n+For ``vlan_exdsa`` and ``exdsa``, the port has to be configured with the\n+respective switch header.\n+\n+For example::\n+\n+ -a 0002:02:00.0,switch_header=\"vlan_exdsa\"\n+\n+The below fields of ``struct rte_flow_item_raw`` shall be used to specify the\n+pattern.\n+\n+- ``relative`` Selects the layer at which parsing is done.\n+\n+ - 0 for ``exdsa`` and ``vlan_exdsa``.\n+\n+ - 1 for ``NGIO``.\n+\n+- ``offset`` The offset in the header where the pattern should be matched.\n+- ``length`` Length of the pattern.\n+- ``pattern`` Pattern as a byte string.\n+\n+Example usage in testpmd::\n+\n+ ./dpdk-testpmd -c 3 -w 0002:02:00.0,switch_header=exdsa -- -i \\\n+ --rx-offloads=0x00080000 --rxq 8 --txq 8\n+ testpmd> flow create 0 ingress pattern eth / raw relative is 0 pattern \\\n+ spec ab pattern mask ab offset is 4 / end actions queue index 1 / end\n+\n Debugging Options\n -----------------\n \ndiff --git a/doc/guides/nics/features/cnxk.ini b/doc/guides/nics/features/cnxk.ini\nindex 23cad293d..5d456257b 100644\n--- a/doc/guides/nics/features/cnxk.ini\n+++ b/doc/guides/nics/features/cnxk.ini\n@@ -65,6 +65,7 @@ ipv6 = Y\n ipv6_ext = Y\n mpls = Y\n nvgre = Y\n+raw = Y\n sctp = Y\n tcp = Y\n udp = Y\ndiff --git a/doc/guides/nics/features/cnxk_vec.ini b/doc/guides/nics/features/cnxk_vec.ini\nindex aa899d358..abf2b8d70 100644\n--- a/doc/guides/nics/features/cnxk_vec.ini\n+++ b/doc/guides/nics/features/cnxk_vec.ini\n@@ -61,6 +61,7 @@ ipv6 = Y\n ipv6_ext = Y\n mpls = Y\n nvgre = Y\n+raw = Y\n sctp = Y\n tcp = Y\n udp = Y\ndiff --git a/doc/guides/nics/features/cnxk_vf.ini b/doc/guides/nics/features/cnxk_vf.ini\nindex 09dd6ad48..7b4299f0b 100644\n--- a/doc/guides/nics/features/cnxk_vf.ini\n+++ b/doc/guides/nics/features/cnxk_vf.ini\n@@ -57,6 +57,7 @@ ipv6 = Y\n ipv6_ext = Y\n mpls = Y\n nvgre = Y\n+raw = Y\n sctp = Y\n tcp = Y\n udp = Y\ndiff --git a/drivers/net/cnxk/cnxk_ethdev_devargs.c b/drivers/net/cnxk/cnxk_ethdev_devargs.c\nindex c76b6281c..36b437a18 100644\n--- a/drivers/net/cnxk/cnxk_ethdev_devargs.c\n+++ b/drivers/net/cnxk/cnxk_ethdev_devargs.c\n@@ -99,6 +99,13 @@ parse_switch_header_type(const char *key, const char *value, void *extra_args)\n \n \tif (strcmp(value, \"chlen90b\") == 0)\n \t\t*(uint16_t *)extra_args = ROC_PRIV_FLAGS_LEN_90B;\n+\n+\tif (strcmp(value, \"exdsa\") == 0)\n+\t\t*(uint16_t *)extra_args = ROC_PRIV_FLAGS_EXDSA;\n+\n+\tif (strcmp(value, \"vlan_exdsa\") == 0)\n+\t\t*(uint16_t *)extra_args = ROC_PRIV_FLAGS_VLAN_EXDSA;\n+\n \treturn 0;\n }\n \ndiff --git a/drivers/net/cnxk/cnxk_rte_flow.c b/drivers/net/cnxk/cnxk_rte_flow.c\nindex 213125b56..32c1b5dee 100644\n--- a/drivers/net/cnxk/cnxk_rte_flow.c\n+++ b/drivers/net/cnxk/cnxk_rte_flow.c\n@@ -15,8 +15,8 @@ const struct cnxk_rte_flow_term_info term[] = {\n \t[RTE_FLOW_ITEM_TYPE_IPV6] = {ROC_NPC_ITEM_TYPE_IPV6,\n \t\t\t\t sizeof(struct rte_flow_item_ipv6)},\n \t[RTE_FLOW_ITEM_TYPE_ARP_ETH_IPV4] = {\n-\t\tROC_NPC_ITEM_TYPE_ARP_ETH_IPV4,\n-\t\tsizeof(struct rte_flow_item_arp_eth_ipv4)},\n+\t\t\tROC_NPC_ITEM_TYPE_ARP_ETH_IPV4,\n+\t\t\tsizeof(struct rte_flow_item_arp_eth_ipv4)},\n \t[RTE_FLOW_ITEM_TYPE_MPLS] = {ROC_NPC_ITEM_TYPE_MPLS,\n \t\t\t\t sizeof(struct rte_flow_item_mpls)},\n \t[RTE_FLOW_ITEM_TYPE_ICMP] = {ROC_NPC_ITEM_TYPE_ICMP,\n@@ -50,10 +50,10 @@ const struct cnxk_rte_flow_term_info term[] = {\n \t[RTE_FLOW_ITEM_TYPE_ANY] = {ROC_NPC_ITEM_TYPE_ANY, 0},\n \t[RTE_FLOW_ITEM_TYPE_GRE_KEY] = {ROC_NPC_ITEM_TYPE_GRE_KEY,\n \t\t\t\t\tsizeof(uint32_t)},\n-\t[RTE_FLOW_ITEM_TYPE_HIGIG2] = {\n-\t\tROC_NPC_ITEM_TYPE_HIGIG2,\n-\t\tsizeof(struct rte_flow_item_higig2_hdr)}\n-};\n+\t[RTE_FLOW_ITEM_TYPE_HIGIG2] = {ROC_NPC_ITEM_TYPE_HIGIG2,\n+\t\t\t\t sizeof(struct rte_flow_item_higig2_hdr)},\n+\t[RTE_FLOW_ITEM_TYPE_RAW] = {ROC_NPC_ITEM_TYPE_RAW,\n+\t\t\t\t sizeof(struct rte_flow_item_raw)}};\n \n static int\n npc_rss_action_validate(struct rte_eth_dev *eth_dev,\n", "prefixes": [ "2/2" ] }