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GET /api/patches/96035/?format=api
{ "id": 96035, "url": "http://patchwork.dpdk.org/api/patches/96035/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210719025410.15483-13-xuemingl@nvidia.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210719025410.15483-13-xuemingl@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210719025410.15483-13-xuemingl@nvidia.com", "date": "2021-07-19T02:54:07", "name": "[v3,12/15] vdpa/mlx5: remove PCI specifics", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "7718a498c068a63e69025b62ef6a570bfda6113c", "submitter": { "id": 1904, "url": "http://patchwork.dpdk.org/api/people/1904/?format=api", "name": "Xueming Li", "email": "xuemingl@nvidia.com" }, "delegate": { "id": 1, "url": "http://patchwork.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210719025410.15483-13-xuemingl@nvidia.com/mbox/", "series": [ { "id": 17884, "url": "http://patchwork.dpdk.org/api/series/17884/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=17884", "date": "2021-07-19T02:53:55", "name": "net/mlx5: support Sub-Function", "version": 3, "mbox": "http://patchwork.dpdk.org/series/17884/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/96035/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/96035/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 3053AA0C45;\n\tMon, 19 Jul 2021 04:56:10 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id CF22C4117E;\n\tMon, 19 Jul 2021 04:55:59 +0200 (CEST)", "from NAM11-DM6-obe.outbound.protection.outlook.com\n (mail-dm6nam11on2089.outbound.protection.outlook.com [40.107.223.89])\n by mails.dpdk.org (Postfix) with ESMTP id 1D32A4117E\n for <dev@dpdk.org>; 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helo=mail.nvidia.com;", "From": "Xueming Li <xuemingl@nvidia.com>", "To": "Viacheslav Ovsiienko <viacheslavo@nvidia.com>", "CC": "Thomas Monjalon <thomas@monjalon.net>, <dev@dpdk.org>,\n <xuemingl@nvidia.com>, Matan Azrad <matan@nvidia.com>", "Date": "Mon, 19 Jul 2021 10:54:07 +0800", "Message-ID": "<20210719025410.15483-13-xuemingl@nvidia.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20210713131437.30170-2-xuemingl@nvidia.com>", "References": "<20210713131437.30170-2-xuemingl@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[172.20.187.5]", "X-ClientProxiedBy": "HQMAIL105.nvidia.com (172.20.187.12) To\n HQMAIL107.nvidia.com (172.20.187.13)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "780453dd-7a41-4957-2b95-08d94a60ba30", "X-MS-TrafficTypeDiagnostic": "BYAPR12MB3173:", "X-LD-Processed": "43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr", "X-Microsoft-Antispam-PRVS": "\n <BYAPR12MB3173481CE979B3AD02F6E15AA1E19@BYAPR12MB3173.namprd12.prod.outlook.com>", "X-MS-Oob-TLC-OOBClassifiers": "OLM:1850;", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n 4VHdN6Dnf+vmNZWBqJ9c75y4PBHFlDBl771POzQo2hdCGBIc5cJVZdAvaCv+lLvKq6RaV7CENfsHkHQaOeJIOxREtiv67jUKu8sNpDK15ZUA2yED8zopa0fDVedBRIyi1qeSW5LSXDwm0uVrVb66xpnyNmoU4zMAJjcTymshBUDC3t5Ugo/N62gDdOpnLJYX7otPEyLYBOHz7a13okv9kZqA03nJsOfdIb1q8PSWF//1QlPUpYE122y+ZgCP3gmOanaPcFDz5ZVh+Fa2LRH9EuaEj5xzuusw9VOnvp5Vta8F8fNzFfsTqfwKY36X1p5nTpTnmwpaU7P7vOX21p+7pQ7D+ErYvuK987M8R/ApNotHkNRi+xBqF17nDfhMYdZwIsWEnRzUAbDKEV6q8K1YD7qoKUkdZsbC9/whhLMcTyvz6ldYP16cY6r0aiJFFebHEyCpSsl0xfX18iloG1jD31yWSQrQedX2QbO7NpCnWzfEfIXL1SB1LMpBZeaB5Rp7ti4mniL3LUEMlEd+6JEOOwP1T6mWOvrCuPIGEtjwHmLf6CVy/WUjRBico508K7pG73IJKTlqLUzBEG2EeBrAxfMmPvACqmRHR6w2YFS0IiurqOQD+XRo2e+7P2DQg+FamXs/Jn72NJqHvg/rJ2A2J2Swr9NciOJiEx9rxn+Uvf+pnfkW+FyX/qNvdll2JHqyDGjAb+tAFkjaXZap3qn3Yw==", "X-Forefront-Antispam-Report": "CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE;\n SFS:(4636009)(346002)(136003)(396003)(39860400002)(376002)(36840700001)(46966006)(86362001)(83380400001)(6862004)(1076003)(82310400003)(26005)(82740400003)(107886003)(4326008)(2906002)(356005)(7636003)(316002)(36860700001)(5660300002)(70586007)(47076005)(55016002)(36906005)(2616005)(186003)(16526019)(37006003)(8676002)(336012)(36756003)(7696005)(70206006)(54906003)(6636002)(426003)(8936002)(6666004)(478600001)(6286002);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "19 Jul 2021 02:55:54.9711 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 780453dd-7a41-4957-2b95-08d94a60ba30", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n CO1NAM11FT058.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BYAPR12MB3173", "Subject": "[dpdk-dev] [PATCH v3 12/15] vdpa/mlx5: remove PCI specifics", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Thomas Monjalon <thomas@monjalon.net>\n\nRemoves PCI specific driver, replaces with common class driver.\n\nSigned-off-by: Thomas Monjalon <thomas@monjalon.net>\n---\n drivers/vdpa/mlx5/mlx5_vdpa.c | 119 ++++++++++------------------------\n drivers/vdpa/mlx5/mlx5_vdpa.h | 1 -\n 2 files changed, 34 insertions(+), 86 deletions(-)", "diff": "diff --git a/drivers/vdpa/mlx5/mlx5_vdpa.c b/drivers/vdpa/mlx5/mlx5_vdpa.c\nindex 5ab7c525c2..9c9a552ba0 100644\n--- a/drivers/vdpa/mlx5/mlx5_vdpa.c\n+++ b/drivers/vdpa/mlx5/mlx5_vdpa.c\n@@ -11,12 +11,11 @@\n #include <rte_malloc.h>\n #include <rte_log.h>\n #include <rte_errno.h>\n-#include <rte_pci.h>\n #include <rte_string_fns.h>\n+#include <rte_bus_pci.h>\n \n #include <mlx5_glue.h>\n #include <mlx5_common.h>\n-#include <mlx5_common_pci.h>\n #include <mlx5_devx_cmds.h>\n #include <mlx5_prm.h>\n #include <mlx5_nl.h>\n@@ -552,34 +551,13 @@ mlx5_vdpa_sys_roce_disable(const char *addr)\n }\n \n static int\n-mlx5_vdpa_roce_disable(struct rte_pci_addr *addr, struct ibv_device **ibv)\n+mlx5_vdpa_roce_disable(struct rte_device *dev)\n {\n-\tchar addr_name[64] = {0};\n-\n-\trte_pci_device_name(addr, addr_name, sizeof(addr_name));\n \t/* Firstly try to disable ROCE by Netlink and fallback to sysfs. */\n-\tif (mlx5_vdpa_nl_roce_disable(addr_name) == 0 ||\n-\t mlx5_vdpa_sys_roce_disable(addr_name) == 0) {\n-\t\t/*\n-\t\t * Succeed to disable ROCE, wait for the IB device to appear\n-\t\t * again after reload.\n-\t\t */\n-\t\tint r;\n-\t\tstruct ibv_device *ibv_new;\n-\n-\t\tfor (r = MLX5_VDPA_MAX_RETRIES; r; r--) {\n-\t\t\tibv_new = mlx5_os_get_ibv_device(addr);\n-\t\t\tif (ibv_new) {\n-\t\t\t\t*ibv = ibv_new;\n-\t\t\t\treturn 0;\n-\t\t\t}\n-\t\t\tusleep(MLX5_VDPA_USEC);\n-\t\t}\n-\t\tDRV_LOG(ERR, \"Cannot much device %s after ROCE disable, \"\n-\t\t\t\"retries exceed %d\", addr_name, MLX5_VDPA_MAX_RETRIES);\n-\t\trte_errno = EAGAIN;\n-\t}\n-\treturn -rte_errno;\n+\tif (mlx5_vdpa_nl_roce_disable(dev->name) != 0 &&\n+\t mlx5_vdpa_sys_roce_disable(dev->name) != 0)\n+\t\treturn -rte_errno;\n+\treturn 0;\n }\n \n static int\n@@ -647,44 +625,33 @@ mlx5_vdpa_config_get(struct rte_devargs *devargs, struct mlx5_vdpa_priv *priv)\n \tDRV_LOG(DEBUG, \"no traffic max is %u.\", priv->no_traffic_max);\n }\n \n-/**\n- * DPDK callback to register a mlx5 PCI device.\n- *\n- * This function spawns vdpa device out of a given PCI device.\n- *\n- * @param[in] pci_drv\n- * PCI driver structure (mlx5_vpda_driver).\n- * @param[in] pci_dev\n- * PCI device information.\n- *\n- * @return\n- * 0 on success, 1 to skip this driver, a negative errno value otherwise\n- * and rte_errno is set.\n- */\n static int\n-mlx5_vdpa_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,\n-\t\t struct rte_pci_device *pci_dev __rte_unused)\n+mlx5_vdpa_dev_probe(struct rte_device *dev)\n {\n \tstruct ibv_device *ibv;\n \tstruct mlx5_vdpa_priv *priv = NULL;\n \tstruct ibv_context *ctx = NULL;\n \tstruct mlx5_hca_attr attr;\n+\tint retry;\n \tint ret;\n \n-\tibv = mlx5_os_get_ibv_device(&pci_dev->addr);\n-\tif (!ibv) {\n-\t\tDRV_LOG(ERR, \"No matching IB device for PCI slot \"\n-\t\t\tPCI_PRI_FMT \".\", pci_dev->addr.domain,\n-\t\t\tpci_dev->addr.bus, pci_dev->addr.devid,\n-\t\t\tpci_dev->addr.function);\n+\tif (mlx5_vdpa_roce_disable(dev) != 0) {\n+\t\tDRV_LOG(WARNING, \"Failed to disable ROCE for \\\"%s\\\".\",\n+\t\t\tdev->name);\n \t\treturn -rte_errno;\n-\t} else {\n-\t\tDRV_LOG(INFO, \"PCI information matches for device \\\"%s\\\".\",\n-\t\t\tibv->name);\n \t}\n-\tif (mlx5_vdpa_roce_disable(&pci_dev->addr, &ibv) != 0) {\n-\t\tDRV_LOG(WARNING, \"Failed to disable ROCE for \\\"%s\\\".\",\n-\t\t\tibv->name);\n+\t/* Wait for the IB device to appear again after reload. */\n+\tfor (retry = MLX5_VDPA_MAX_RETRIES; retry > 0; --retry) {\n+\t\tibv = mlx5_os_get_ibv_dev(dev);\n+\t\tif (ibv != NULL)\n+\t\t\tbreak;\n+\t\tusleep(MLX5_VDPA_USEC);\n+\t}\n+\tif (ibv == NULL) {\n+\t\tDRV_LOG(ERR, \"Cannot get IB device after disabling RoCE for \"\n+\t\t\t\t\"\\\"%s\\\", retries exceed %d.\",\n+\t\t\t\tdev->name, MLX5_VDPA_MAX_RETRIES);\n+\t\trte_errno = EAGAIN;\n \t\treturn -rte_errno;\n \t}\n \tctx = mlx5_glue->dv_open_device(ibv);\n@@ -722,20 +689,18 @@ mlx5_vdpa_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,\n \tif (attr.num_lag_ports == 0)\n \t\tpriv->num_lag_ports = 1;\n \tpriv->ctx = ctx;\n-\tpriv->pci_dev = pci_dev;\n \tpriv->var = mlx5_glue->dv_alloc_var(ctx, 0);\n \tif (!priv->var) {\n \t\tDRV_LOG(ERR, \"Failed to allocate VAR %u.\", errno);\n \t\tgoto error;\n \t}\n-\tpriv->vdev = rte_vdpa_register_device(&pci_dev->device,\n-\t\t\t&mlx5_vdpa_ops);\n+\tpriv->vdev = rte_vdpa_register_device(dev, &mlx5_vdpa_ops);\n \tif (priv->vdev == NULL) {\n \t\tDRV_LOG(ERR, \"Failed to register vDPA device.\");\n \t\trte_errno = rte_errno ? rte_errno : EINVAL;\n \t\tgoto error;\n \t}\n-\tmlx5_vdpa_config_get(pci_dev->device.devargs, priv);\n+\tmlx5_vdpa_config_get(dev->devargs, priv);\n \tSLIST_INIT(&priv->mr_list);\n \tpthread_mutex_init(&priv->vq_config_lock, NULL);\n \tpthread_mutex_lock(&priv_list_lock);\n@@ -754,26 +719,15 @@ mlx5_vdpa_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,\n \treturn -rte_errno;\n }\n \n-/**\n- * DPDK callback to remove a PCI device.\n- *\n- * This function removes all vDPA devices belong to a given PCI device.\n- *\n- * @param[in] pci_dev\n- * Pointer to the PCI device.\n- *\n- * @return\n- * 0 on success, the function cannot fail.\n- */\n static int\n-mlx5_vdpa_pci_remove(struct rte_pci_device *pci_dev)\n+mlx5_vdpa_dev_remove(struct rte_device *dev)\n {\n \tstruct mlx5_vdpa_priv *priv = NULL;\n \tint found = 0;\n \n \tpthread_mutex_lock(&priv_list_lock);\n \tTAILQ_FOREACH(priv, &priv_list, next) {\n-\t\tif (!rte_pci_addr_cmp(&priv->pci_dev->addr, &pci_dev->addr)) {\n+\t\tif (priv->vdev->device == dev) {\n \t\t\tfound = 1;\n \t\t\tbreak;\n \t\t}\n@@ -831,17 +785,12 @@ static const struct rte_pci_id mlx5_vdpa_pci_id_map[] = {\n \t}\n };\n \n-static struct mlx5_pci_driver mlx5_vdpa_driver = {\n-\t.driver_class = MLX5_CLASS_VDPA,\n-\t.pci_driver = {\n-\t\t.driver = {\n-\t\t\t.name = RTE_STR(MLX5_VDPA_DRIVER_NAME),\n-\t\t},\n-\t\t.id_table = mlx5_vdpa_pci_id_map,\n-\t\t.probe = mlx5_vdpa_pci_probe,\n-\t\t.remove = mlx5_vdpa_pci_remove,\n-\t\t.drv_flags = 0,\n-\t},\n+static struct mlx5_class_driver mlx5_vdpa_driver = {\n+\t.drv_class = MLX5_CLASS_VDPA,\n+\t.name = RTE_STR(MLX5_VDPA_DRIVER_NAME),\n+\t.id_table = mlx5_vdpa_pci_id_map,\n+\t.probe = mlx5_vdpa_dev_probe,\n+\t.remove = mlx5_vdpa_dev_remove,\n };\n \n RTE_LOG_REGISTER_DEFAULT(mlx5_vdpa_logtype, NOTICE)\n@@ -853,7 +802,7 @@ RTE_INIT(rte_mlx5_vdpa_init)\n {\n \tmlx5_common_init();\n \tif (mlx5_glue)\n-\t\tmlx5_pci_driver_register(&mlx5_vdpa_driver);\n+\t\tmlx5_class_driver_register(&mlx5_vdpa_driver);\n }\n \n RTE_PMD_EXPORT_NAME(MLX5_VDPA_DRIVER_NAME, __COUNTER__);\ndiff --git a/drivers/vdpa/mlx5/mlx5_vdpa.h b/drivers/vdpa/mlx5/mlx5_vdpa.h\nindex 722c72b65e..2a04e36607 100644\n--- a/drivers/vdpa/mlx5/mlx5_vdpa.h\n+++ b/drivers/vdpa/mlx5/mlx5_vdpa.h\n@@ -133,7 +133,6 @@ struct mlx5_vdpa_priv {\n \tstruct rte_vdpa_device *vdev; /* vDPA device. */\n \tint vid; /* vhost device id. */\n \tstruct ibv_context *ctx; /* Device context. */\n-\tstruct rte_pci_device *pci_dev;\n \tstruct mlx5_hca_vdpa_attr caps;\n \tuint32_t pdn; /* Protection Domain number. */\n \tstruct ibv_pd *pd;\n", "prefixes": [ "v3", "12/15" ] }