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GET /api/patches/96223/?format=api
{ "id": 96223, "url": "http://patchwork.dpdk.org/api/patches/96223/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210723031049.2201665-3-feifei.wang2@arm.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210723031049.2201665-3-feifei.wang2@arm.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210723031049.2201665-3-feifei.wang2@arm.com", "date": "2021-07-23T03:10:47", "name": "[v1,2/4] drivers/net: fix note error for Rx vector", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "ac4b89a44ced904dc14c51d76d1d4695461117b1", "submitter": { "id": 1771, "url": "http://patchwork.dpdk.org/api/people/1771/?format=api", "name": "Feifei Wang", "email": "feifei.wang2@arm.com" }, "delegate": { "id": 1540, "url": "http://patchwork.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210723031049.2201665-3-feifei.wang2@arm.com/mbox/", "series": [ { "id": 17960, "url": "http://patchwork.dpdk.org/api/series/17960/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=17960", "date": "2021-07-23T03:10:45", "name": "fix note error", "version": 1, "mbox": "http://patchwork.dpdk.org/series/17960/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/96223/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/96223/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 86225A0C46;\n\tFri, 23 Jul 2021 05:11:14 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 74CD9410DB;\n\tFri, 23 Jul 2021 05:11:14 +0200 (CEST)", "from foss.arm.com (foss.arm.com [217.140.110.172])\n by mails.dpdk.org (Postfix) with ESMTP id 03D7D410DB;\n Fri, 23 Jul 2021 05:11:12 +0200 (CEST)", "from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14])\n by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 60B5D106F;\n Thu, 22 Jul 2021 20:11:12 -0700 (PDT)", "from net-x86-dell-8268.shanghai.arm.com\n (net-x86-dell-8268.shanghai.arm.com [10.169.210.99])\n by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id E51E23F694;\n Thu, 22 Jul 2021 20:11:05 -0700 (PDT)" ], "From": "Feifei Wang <feifei.wang2@arm.com>", "To": "Qi Zhang <qi.z.zhang@intel.com>, Xiao Wang <xiao.w.wang@intel.com>,\n David Christensen <drc@linux.vnet.ibm.com>,\n Beilei Xing <beilei.xing@intel.com>, Ruifeng Wang <ruifeng.wang@arm.com>,\n Bruce Richardson <bruce.richardson@intel.com>,\n Konstantin Ananyev <konstantin.ananyev@intel.com>,\n Jingjing Wu <jingjing.wu@intel.com>, Qiming Yang <qiming.yang@intel.com>,\n Haiyue Wang <haiyue.wang@intel.com>,\n \"Chen Jing D(Mark)\" <jing.d.chen@intel.com>,\n Cunming Liang <cunming.liang@intel.com>,\n Chao Zhu <chaozhu@linux.vnet.ibm.com>,\n Gowrishankar Muthukrishnan <gowrishankar.m@linux.vnet.ibm.com>,\n Jerin Jacob <jerin.jacob@caviumnetworks.com>,\n Jianbo Liu <jianbo.liu@linaro.org>, Zhe Tao <zhe.tao@intel.com>,\n Leyi Rong <leyi.rong@intel.com>, Wenzhuo Lu <wenzhuo.lu@intel.com>", "Cc": "dev@dpdk.org, nd@arm.com, Feifei Wang <feifei.wang2@arm.com>,\n stable@dpdk.org", "Date": "Fri, 23 Jul 2021 11:10:47 +0800", "Message-Id": "<20210723031049.2201665-3-feifei.wang2@arm.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20210723031049.2201665-1-feifei.wang2@arm.com>", "References": "<20210723031049.2201665-1-feifei.wang2@arm.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v1 2/4] drivers/net: fix note error for Rx vector", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "For the loop to process packets in Rx vector path, some notes for the\ncode are wrong, fix these errors.\n\nfm10k:\nFixes: 7092be8437bd (\"fm10k: add vector Rx\")\nCc: jing.d.chen@intel.com\n\ni40e-altive:\nFixes: c3def6a8724c (\"net/i40e: implement vector PMD for altivec\")\nCc: gowrishankar.m@linux.vnet.ibm.com\n\ni40e-neon:\nFixes: ae0eb310f253 (\"net/i40e: implement vector PMD for ARM\")\n\ni40e-sse:\nFixes: 9ed94e5bb04e (\"i40e: add vector Rx\")\nCc: zhe.tao@intel.com\n\niavf:\nFixes: 319c421f3890 (\"net/avf: enable SSE Rx Tx\")\nCc: jingjing.wu@intel.com\nFixes: 1162f5a0ef31 (\"net/iavf: support flexible Rx descriptor in SSE path\")\nCc: leyi.rong@intel.com\n\nice:\nFixes: c68a52b8b38c (\"net/ice: support vector SSE in Rx\")\nCc: wenzhuo.lu@intel.com\n\nixgbe:\nFixes: cf4b4708a88a (\"ixgbe: improve slow-path perf with vector scattered Rx\")\nCc: bruce.richardson@intel.com\n\nCc: stable@dpdk.org\n\nSuggested-by: Ruifeng Wang <ruifeng.wang@arm.com>\nSigned-off-by: Feifei Wang <feifei.wang2@arm.com>\nReviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>\n---\n drivers/net/fm10k/fm10k_rxtx_vec.c | 4 ++--\n drivers/net/i40e/i40e_rxtx_vec_altivec.c | 8 ++++----\n drivers/net/i40e/i40e_rxtx_vec_neon.c | 8 ++++----\n drivers/net/i40e/i40e_rxtx_vec_sse.c | 4 ++--\n drivers/net/iavf/iavf_rxtx_vec_sse.c | 8 ++++----\n drivers/net/ice/ice_rxtx_vec_sse.c | 4 ++--\n drivers/net/ixgbe/ixgbe_rxtx_vec_sse.c | 4 ++--\n 7 files changed, 20 insertions(+), 20 deletions(-)", "diff": "diff --git a/drivers/net/fm10k/fm10k_rxtx_vec.c b/drivers/net/fm10k/fm10k_rxtx_vec.c\nindex cae5322d48..83af01dc2d 100644\n--- a/drivers/net/fm10k/fm10k_rxtx_vec.c\n+++ b/drivers/net/fm10k/fm10k_rxtx_vec.c\n@@ -472,7 +472,7 @@ fm10k_recv_raw_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,\n \t\tmbp1 = _mm_loadu_si128((__m128i *)&mbufp[pos]);\n \n \t\t/* Read desc statuses backwards to avoid race condition */\n-\t\t/* A.1 load 4 pkts desc */\n+\t\t/* A.1 load desc[3] */\n \t\tdescs0[3] = _mm_loadu_si128((__m128i *)(rxdp + 3));\n \t\trte_compiler_barrier();\n \n@@ -484,9 +484,9 @@ fm10k_recv_raw_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,\n \t\tmbp2 = _mm_loadu_si128((__m128i *)&mbufp[pos+2]);\n #endif\n \n+\t\t/* A.1 load desc[2-0] */\n \t\tdescs0[2] = _mm_loadu_si128((__m128i *)(rxdp + 2));\n \t\trte_compiler_barrier();\n-\t\t/* B.1 load 2 mbuf point */\n \t\tdescs0[1] = _mm_loadu_si128((__m128i *)(rxdp + 1));\n \t\trte_compiler_barrier();\n \t\tdescs0[0] = _mm_loadu_si128((__m128i *)(rxdp));\ndiff --git a/drivers/net/i40e/i40e_rxtx_vec_altivec.c b/drivers/net/i40e/i40e_rxtx_vec_altivec.c\nindex edaa462ac8..b99323992f 100644\n--- a/drivers/net/i40e/i40e_rxtx_vec_altivec.c\n+++ b/drivers/net/i40e/i40e_rxtx_vec_altivec.c\n@@ -281,22 +281,22 @@ _recv_raw_pkts_vec(struct i40e_rx_queue *rxq, struct rte_mbuf **rx_pkts,\n \t\t\t\t\t\t * in one XMM reg.\n \t\t\t\t\t\t */\n \n-\t\t/* B.1 load 1 mbuf point */\n+\t\t/* B.1 load 2 mbuf point */\n \t\tmbp1 = *(vector unsigned long *)&sw_ring[pos];\n \t\t/* Read desc statuses backwards to avoid race condition */\n-\t\t/* A.1 load 4 pkts desc */\n+\t\t/* A.1 load desc[3] */\n \t\tdescs[3] = *(vector unsigned long *)(rxdp + 3);\n \t\trte_compiler_barrier();\n \n \t\t/* B.2 copy 2 mbuf point into rx_pkts */\n \t\t*(vector unsigned long *)&rx_pkts[pos] = mbp1;\n \n-\t\t/* B.1 load 1 mbuf point */\n+\t\t/* B.1 load 2 mbuf point */\n \t\tmbp2 = *(vector unsigned long *)&sw_ring[pos + 2];\n \n+\t\t/* A.1 load desc[2-0] */\n \t\tdescs[2] = *(vector unsigned long *)(rxdp + 2);\n \t\trte_compiler_barrier();\n-\t\t/* B.1 load 2 mbuf point */\n \t\tdescs[1] = *(vector unsigned long *)(rxdp + 1);\n \t\trte_compiler_barrier();\n \t\tdescs[0] = *(vector unsigned long *)(rxdp);\ndiff --git a/drivers/net/i40e/i40e_rxtx_vec_neon.c b/drivers/net/i40e/i40e_rxtx_vec_neon.c\nindex 32336fdb80..fb624a4882 100644\n--- a/drivers/net/i40e/i40e_rxtx_vec_neon.c\n+++ b/drivers/net/i40e/i40e_rxtx_vec_neon.c\n@@ -280,20 +280,20 @@ _recv_raw_pkts_vec(struct i40e_rx_queue *__rte_restrict rxq,\n \n \t\tint32x4_t len_shl = {0, 0, 0, PKTLEN_SHIFT};\n \n-\t\t/* B.1 load 1 mbuf point */\n+\t\t/* B.1 load 2 mbuf point */\n \t\tmbp1 = vld1q_u64((uint64_t *)&sw_ring[pos]);\n \t\t/* Read desc statuses backwards to avoid race condition */\n-\t\t/* A.1 load 4 pkts desc */\n+\t\t/* A.1 load desc[3] */\n \t\tdescs[3] = vld1q_u64((uint64_t *)(rxdp + 3));\n \n \t\t/* B.2 copy 2 mbuf point into rx_pkts */\n \t\tvst1q_u64((uint64_t *)&rx_pkts[pos], mbp1);\n \n-\t\t/* B.1 load 1 mbuf point */\n+\t\t/* B.1 load 2 mbuf point */\n \t\tmbp2 = vld1q_u64((uint64_t *)&sw_ring[pos + 2]);\n \n+\t\t/* A.1 load desc[2-0] */\n \t\tdescs[2] = vld1q_u64((uint64_t *)(rxdp + 2));\n-\t\t/* B.1 load 2 mbuf point */\n \t\tdescs[1] = vld1q_u64((uint64_t *)(rxdp + 1));\n \t\tdescs[0] = vld1q_u64((uint64_t *)(rxdp));\n \ndiff --git a/drivers/net/i40e/i40e_rxtx_vec_sse.c b/drivers/net/i40e/i40e_rxtx_vec_sse.c\nindex 03a0320353..b235502db5 100644\n--- a/drivers/net/i40e/i40e_rxtx_vec_sse.c\n+++ b/drivers/net/i40e/i40e_rxtx_vec_sse.c\n@@ -462,7 +462,7 @@ _recv_raw_pkts_vec(struct i40e_rx_queue *rxq, struct rte_mbuf **rx_pkts,\n \t\t/* B.1 load 2 (64 bit) or 4 (32 bit) mbuf points */\n \t\tmbp1 = _mm_loadu_si128((__m128i *)&sw_ring[pos]);\n \t\t/* Read desc statuses backwards to avoid race condition */\n-\t\t/* A.1 load 4 pkts desc */\n+\t\t/* A.1 load desc[3] */\n \t\tdescs[3] = _mm_loadu_si128((__m128i *)(rxdp + 3));\n \t\trte_compiler_barrier();\n \n@@ -474,9 +474,9 @@ _recv_raw_pkts_vec(struct i40e_rx_queue *rxq, struct rte_mbuf **rx_pkts,\n \t\tmbp2 = _mm_loadu_si128((__m128i *)&sw_ring[pos+2]);\n #endif\n \n+\t\t/* A.1 load desc[2-0] */\n \t\tdescs[2] = _mm_loadu_si128((__m128i *)(rxdp + 2));\n \t\trte_compiler_barrier();\n-\t\t/* B.1 load 2 mbuf point */\n \t\tdescs[1] = _mm_loadu_si128((__m128i *)(rxdp + 1));\n \t\trte_compiler_barrier();\n \t\tdescs[0] = _mm_loadu_si128((__m128i *)(rxdp));\ndiff --git a/drivers/net/iavf/iavf_rxtx_vec_sse.c b/drivers/net/iavf/iavf_rxtx_vec_sse.c\nindex b813d96ef4..ee1e905525 100644\n--- a/drivers/net/iavf/iavf_rxtx_vec_sse.c\n+++ b/drivers/net/iavf/iavf_rxtx_vec_sse.c\n@@ -494,7 +494,7 @@ _recv_raw_pkts_vec(struct iavf_rx_queue *rxq, struct rte_mbuf **rx_pkts,\n \t\t/* B.1 load 2 (64 bit) or 4 (32 bit) mbuf points */\n \t\tmbp1 = _mm_loadu_si128((__m128i *)&sw_ring[pos]);\n \t\t/* Read desc statuses backwards to avoid race condition */\n-\t\t/* A.1 load 4 pkts desc */\n+\t\t/* A.1 load desc[3] */\n \t\tdescs[3] = _mm_loadu_si128((__m128i *)(rxdp + 3));\n \t\trte_compiler_barrier();\n \n@@ -506,9 +506,9 @@ _recv_raw_pkts_vec(struct iavf_rx_queue *rxq, struct rte_mbuf **rx_pkts,\n \t\tmbp2 = _mm_loadu_si128((__m128i *)&sw_ring[pos + 2]);\n #endif\n \n+\t\t/* A.1 load desc[2-0] */\n \t\tdescs[2] = _mm_loadu_si128((__m128i *)(rxdp + 2));\n \t\trte_compiler_barrier();\n-\t\t/* B.1 load 2 mbuf point */\n \t\tdescs[1] = _mm_loadu_si128((__m128i *)(rxdp + 1));\n \t\trte_compiler_barrier();\n \t\tdescs[0] = _mm_loadu_si128((__m128i *)(rxdp));\n@@ -755,7 +755,7 @@ _recv_raw_pkts_vec_flex_rxd(struct iavf_rx_queue *rxq,\n \t\t/* B.1 load 2 (64 bit) or 4 (32 bit) mbuf points */\n \t\tmbp1 = _mm_loadu_si128((__m128i *)&sw_ring[pos]);\n \t\t/* Read desc statuses backwards to avoid race condition */\n-\t\t/* A.1 load 4 pkts desc */\n+\t\t/* A.1 load desc[3] */\n \t\tdescs[3] = _mm_loadu_si128((__m128i *)(rxdp + 3));\n \t\trte_compiler_barrier();\n \n@@ -767,9 +767,9 @@ _recv_raw_pkts_vec_flex_rxd(struct iavf_rx_queue *rxq,\n \t\tmbp2 = _mm_loadu_si128((__m128i *)&sw_ring[pos + 2]);\n #endif\n \n+\t\t/* A.1 load desc[2-0] */\n \t\tdescs[2] = _mm_loadu_si128((__m128i *)(rxdp + 2));\n \t\trte_compiler_barrier();\n-\t\t/* B.1 load 2 mbuf point */\n \t\tdescs[1] = _mm_loadu_si128((__m128i *)(rxdp + 1));\n \t\trte_compiler_barrier();\n \t\tdescs[0] = _mm_loadu_si128((__m128i *)(rxdp));\ndiff --git a/drivers/net/ice/ice_rxtx_vec_sse.c b/drivers/net/ice/ice_rxtx_vec_sse.c\nindex 5f7e13ee39..653bd28b41 100644\n--- a/drivers/net/ice/ice_rxtx_vec_sse.c\n+++ b/drivers/net/ice/ice_rxtx_vec_sse.c\n@@ -416,7 +416,7 @@ _ice_recv_raw_pkts_vec(struct ice_rx_queue *rxq, struct rte_mbuf **rx_pkts,\n \t\t/* B.1 load 2 (64 bit) or 4 (32 bit) mbuf points */\n \t\tmbp1 = _mm_loadu_si128((__m128i *)&sw_ring[pos]);\n \t\t/* Read desc statuses backwards to avoid race condition */\n-\t\t/* A.1 load 4 pkts desc */\n+\t\t/* A.1 load desc[3] */\n \t\tdescs[3] = _mm_loadu_si128((__m128i *)(rxdp + 3));\n \t\trte_compiler_barrier();\n \n@@ -428,9 +428,9 @@ _ice_recv_raw_pkts_vec(struct ice_rx_queue *rxq, struct rte_mbuf **rx_pkts,\n \t\tmbp2 = _mm_loadu_si128((__m128i *)&sw_ring[pos + 2]);\n #endif\n \n+\t\t/* A.1 load desc[2-0] */\n \t\tdescs[2] = _mm_loadu_si128((__m128i *)(rxdp + 2));\n \t\trte_compiler_barrier();\n-\t\t/* B.1 load 2 mbuf point */\n \t\tdescs[1] = _mm_loadu_si128((__m128i *)(rxdp + 1));\n \t\trte_compiler_barrier();\n \t\tdescs[0] = _mm_loadu_si128((__m128i *)(rxdp));\ndiff --git a/drivers/net/ixgbe/ixgbe_rxtx_vec_sse.c b/drivers/net/ixgbe/ixgbe_rxtx_vec_sse.c\nindex 3a3ef51172..1dea95e73b 100644\n--- a/drivers/net/ixgbe/ixgbe_rxtx_vec_sse.c\n+++ b/drivers/net/ixgbe/ixgbe_rxtx_vec_sse.c\n@@ -454,7 +454,7 @@ _recv_raw_pkts_vec(struct ixgbe_rx_queue *rxq, struct rte_mbuf **rx_pkts,\n \t\tmbp1 = _mm_loadu_si128((__m128i *)&sw_ring[pos]);\n \n \t\t/* Read desc statuses backwards to avoid race condition */\n-\t\t/* A.1 load 4 pkts desc */\n+\t\t/* A.1 load desc[3] */\n \t\tdescs[3] = _mm_loadu_si128((__m128i *)(rxdp + 3));\n \t\trte_compiler_barrier();\n \n@@ -466,9 +466,9 @@ _recv_raw_pkts_vec(struct ixgbe_rx_queue *rxq, struct rte_mbuf **rx_pkts,\n \t\tmbp2 = _mm_loadu_si128((__m128i *)&sw_ring[pos+2]);\n #endif\n \n+\t\t/* A.1 load desc[2-0] */\n \t\tdescs[2] = _mm_loadu_si128((__m128i *)(rxdp + 2));\n \t\trte_compiler_barrier();\n-\t\t/* B.1 load 2 mbuf point */\n \t\tdescs[1] = _mm_loadu_si128((__m128i *)(rxdp + 1));\n \t\trte_compiler_barrier();\n \t\tdescs[0] = _mm_loadu_si128((__m128i *)(rxdp));\n", "prefixes": [ "v1", "2/4" ] }