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GET /api/patches/96225/?format=api
{ "id": 96225, "url": "http://patchwork.dpdk.org/api/patches/96225/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20210723031049.2201665-5-feifei.wang2@arm.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210723031049.2201665-5-feifei.wang2@arm.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210723031049.2201665-5-feifei.wang2@arm.com", "date": "2021-07-23T03:10:49", "name": "[v1,4/4] net/i40e: change code order to reduce L1 cache misses", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "caf81c43212821ad52c0ad8595374184df33c21f", "submitter": { "id": 1771, "url": "http://patchwork.dpdk.org/api/people/1771/?format=api", "name": "Feifei Wang", "email": "feifei.wang2@arm.com" }, "delegate": { "id": 1540, "url": "http://patchwork.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210723031049.2201665-5-feifei.wang2@arm.com/mbox/", "series": [ { "id": 17960, "url": "http://patchwork.dpdk.org/api/series/17960/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=17960", "date": "2021-07-23T03:10:45", "name": "fix note error", "version": 1, "mbox": "http://patchwork.dpdk.org/series/17960/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/96225/comments/", "check": "fail", "checks": "http://patchwork.dpdk.org/api/patches/96225/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 2A208A0C46;\n\tFri, 23 Jul 2021 05:11:27 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 6B6FC410F1;\n\tFri, 23 Jul 2021 05:11:19 +0200 (CEST)", "from foss.arm.com (foss.arm.com [217.140.110.172])\n by mails.dpdk.org (Postfix) with ESMTP id 0702440DDA\n for <dev@dpdk.org>; Fri, 23 Jul 2021 05:11:18 +0200 (CEST)", "from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14])\n by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 73973106F;\n Thu, 22 Jul 2021 20:11:17 -0700 (PDT)", "from net-x86-dell-8268.shanghai.arm.com\n (net-x86-dell-8268.shanghai.arm.com [10.169.210.99])\n by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 9F55E3F694;\n Thu, 22 Jul 2021 20:11:15 -0700 (PDT)" ], "From": "Feifei Wang <feifei.wang2@arm.com>", "To": "Ruifeng Wang <ruifeng.wang@arm.com>,\n\tBeilei Xing <beilei.xing@intel.com>", "Cc": "dev@dpdk.org,\n\tnd@arm.com,\n\tFeifei Wang <feifei.wang2@arm.com>", "Date": "Fri, 23 Jul 2021 11:10:49 +0800", "Message-Id": "<20210723031049.2201665-5-feifei.wang2@arm.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20210723031049.2201665-1-feifei.wang2@arm.com>", "References": "<20210723031049.2201665-1-feifei.wang2@arm.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v1 4/4] net/i40e: change code order to reduce L1\n cache misses", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "For N1 platform, packet mbuf load and descs load are hot spots to limit\nthe performance for \"desc_to_ptype_v\" and \"desc_to_olflags_v\" functions\nin i40e rx NEON path. This is because packet mbuf and descs are evicted\nfrom l1d-cache to l2d-cache.\n\nTo reduce l1d-cache-misses and improve the performance, change the code\norder and move \"desc_to_ptype_v\" and \"desc_to_olflags_v\" functions\nforward to the location, where packet mbuf and descs are just loaded.\n\nTest Result:\ndpdk:21.08-rc1\ngcc-9\nFor n1sdp, the patch improves the performance by 1.8%.\nFor thunderx2, no performance changes.\n\nSigned-off-by: Feifei Wang <feifei.wang2@arm.com>\nReviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>\n---\n drivers/net/i40e/i40e_rxtx_vec_neon.c | 24 ++++++++++++------------\n 1 file changed, 12 insertions(+), 12 deletions(-)", "diff": "diff --git a/drivers/net/i40e/i40e_rxtx_vec_neon.c b/drivers/net/i40e/i40e_rxtx_vec_neon.c\nindex 8f3188e910..b2683fda60 100644\n--- a/drivers/net/i40e/i40e_rxtx_vec_neon.c\n+++ b/drivers/net/i40e/i40e_rxtx_vec_neon.c\n@@ -301,18 +301,6 @@ _recv_raw_pkts_vec(struct i40e_rx_queue *__rte_restrict rxq,\n \t\t\trte_mbuf_prefetch_part2(rx_pkts[pos + 3]);\n \t\t}\n \n-\t\t/* C.1 4=>2 filter staterr info only */\n-\t\tsterr_tmp2 = vzipq_u16(vreinterpretq_u16_u64(descs[1]),\n-\t\t\t\t vreinterpretq_u16_u64(descs[3]));\n-\t\tsterr_tmp1 = vzipq_u16(vreinterpretq_u16_u64(descs[0]),\n-\t\t\t\t vreinterpretq_u16_u64(descs[2]));\n-\n-\t\t/* C.2 get 4 pkts staterr value */\n-\t\tstaterr = vzipq_u16(sterr_tmp1.val[1],\n-\t\t\t\t sterr_tmp2.val[1]).val[0];\n-\n-\t\tdesc_to_olflags_v(rxq, descs, &rx_pkts[pos]);\n-\n \t\t/* pkts shift the pktlen field to be 16-bit aligned*/\n \t\tuint32x4_t len3 = vshlq_u32(vreinterpretq_u32_u64(descs[3]),\n \t\t\t\t\t len_shl);\n@@ -367,10 +355,22 @@ _recv_raw_pkts_vec(struct i40e_rx_queue *__rte_restrict rxq,\n \n \t\tdesc_to_ptype_v(descs, &rx_pkts[pos], ptype_tbl);\n \n+\t\tdesc_to_olflags_v(rxq, descs, &rx_pkts[pos]);\n+\n \t\tif (likely(pos + RTE_I40E_DESCS_PER_LOOP < nb_pkts)) {\n \t\t\trte_prefetch_non_temporal(rxdp + RTE_I40E_DESCS_PER_LOOP);\n \t\t}\n \n+\t\t/* C.1 4=>2 filter staterr info only */\n+\t\tsterr_tmp2 = vzipq_u16(vreinterpretq_u16_u64(descs[1]),\n+\t\t\t\t vreinterpretq_u16_u64(descs[3]));\n+\t\tsterr_tmp1 = vzipq_u16(vreinterpretq_u16_u64(descs[0]),\n+\t\t\t\t vreinterpretq_u16_u64(descs[2]));\n+\n+\t\t/* C.2 get 4 pkts staterr value */\n+\t\tstaterr = vzipq_u16(sterr_tmp1.val[1],\n+\t\t\t\t sterr_tmp2.val[1]).val[0];\n+\n \t\t/* C* extract and record EOP bit */\n \t\tif (split_packet) {\n \t\t\tuint8x16_t eop_shuf_mask = {\n", "prefixes": [ "v1", "4/4" ] }